JPH11195684A - Semiconductor integrated circuit disconnection detecting equipment and method, and recording medium storing control program therefor - Google Patents

Semiconductor integrated circuit disconnection detecting equipment and method, and recording medium storing control program therefor

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Publication number
JPH11195684A
JPH11195684A JP125998A JP125998A JPH11195684A JP H11195684 A JPH11195684 A JP H11195684A JP 125998 A JP125998 A JP 125998A JP 125998 A JP125998 A JP 125998A JP H11195684 A JPH11195684 A JP H11195684A
Authority
JP
Japan
Prior art keywords
potential
image
semiconductor integrated
integrated circuit
defective product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP125998A
Other languages
Japanese (ja)
Other versions
JP2976423B2 (en
Inventor
Hiroshi Sumitomo
洋志 住友
Toyoichi Nakamura
豊一 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP10001259A priority Critical patent/JP2976423B2/en
Publication of JPH11195684A publication Critical patent/JPH11195684A/en
Application granted granted Critical
Publication of JP2976423B2 publication Critical patent/JP2976423B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Locating Faults (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PROBLEM TO BE SOLVED: To easily and quickly detect a wiring failure in a semiconductor integrated circuit of CMOS structure. SOLUTION: A repetitive pulse potential is applied through a power supply wire and a grounding wire taking advantage of a feature of a circuit structure where either a power supply wire or a grounding wire is electrically connected to an inner signal wiring, when an input of data to a semiconductor integrated circuit of CMOS structure is kept in a steady state, whereby a potential change is propagated through an inner circuit. A non-defective unit is prepared as a specimen to detect a point of disconnection in a defective unit, an electronic beam tester mounted with an apparatus which is capable of replacing a semiconductor integrated circuit without decreasing a degree of vacuum is used to quickly obtain potential images formed by a potential change propagated through the inner wirings of both the non- defective and defective unit, one of the potential images obtained from a non-defective and a defective unit is subjected to picture image processing such as parallel displacement, deformation or inclination, so as to reduce a divergence of potential image between a non-defective and a defective unit to a minimum, then image processing where the image pictures are alternately displayed on the same picture plane is carried out, whereby only a point of disconnection is enhanced in visibility to easily detect a region as a point of disconnection where a potential change different from that in a normal wiring is indicated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体集積回路の断
線故障検出装置及びその方法並びにその制御プログラム
を記録した記録媒体に関し、特にCMOS構造の半導体
集積回路の断線故障検出方式の改良に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for detecting a disconnection fault in a semiconductor integrated circuit, and more particularly to an improvement in a method for detecting a disconnection fault in a semiconductor integrated circuit having a CMOS structure. .

【0002】[0002]

【従来の技術】従来の半導体集積回路(LSIと称す)
の故障信号の発生源を特定するために使用される電子ビ
ームテスタでは、ロジックテスタから供給されるテスト
ベクトルによる内部配線の電位変化がLSI表面に電子
ビームを照射した際の表面電位ポテンシャルに及ぼす二
次電子放出量の変化を測定することによって、着目する
配線の電位変化パターンを得て、これを良品と不良品の
LSI間で比較するようになっている。
2. Description of the Related Art Conventional semiconductor integrated circuits (LSI)
In the electron beam tester used to identify the source of the failure signal, the change in the potential of the internal wiring due to the test vector supplied from the logic tester affects the surface potential when the electron beam is irradiated on the LSI surface. By measuring the change in the amount of secondary electron emission, a potential change pattern of the wiring of interest is obtained, and this is compared between non-defective and defective LSIs.

【0003】この他にも、断線故障のみに特化した、よ
り簡便な検出方法として、断線のある配線と直接接続さ
れているゲートへ電子を注入することにより、電源線と
接地線との間に生じる電位変化を利用したCIVA(Ch
arge Induced Voltage Alternation)法が文献1(E.I.
Cole Jr. and R.E.Anderson,“Rapid Localization of
Open Conductors Using Charge Induced Voltage Alter
nation” Proceedingsof the 30th International Rel
iability Physics Symposium, 288-298(1992))に開示
されており、これが実用化されている。
[0003] In addition, as a simpler detection method specializing only in a disconnection failure, electrons are injected into a gate directly connected to a disconnected wiring, so that a gap between a power supply line and a ground line is reduced. CIVA (Ch
arge Induced Voltage Alternation) method is described in Reference 1 (EI
Cole Jr. and REAnderson, “Rapid Localization of
Open Conductors Using Charge Induced Voltage Alter
nation ”Proceedingsof the 30th International Rel
iability Physics Symposium, 288-298 (1992)), which has been put to practical use.

【0004】しかしながら、従来の単一モード故障に特
化した解析技術と比較して電子ビームテスタを使用した
故障解析では、解析標準時間が2時間以上を要すること
が欠点となっている。従来、電子ビームテスタでは、注
目した配線の電位変化を検証するためにLSIの動作試
験を行うためのテストベクトルと、それをLSIに与え
るためのロジックテスタとが必要である。LSIとロジ
ックテスタとの接続のために複雑な配線治具の準備に時
間をかける必要があり、LSIの大規模化による多ピン
化に伴い、解析の事前に不可欠な準備時間が増大すると
いう欠点がある。
However, the failure analysis using the electron beam tester has a disadvantage in that the analysis standard time requires two hours or more as compared with the conventional analysis technique specialized for single mode failure. 2. Description of the Related Art Conventionally, an electron beam tester requires a test vector for performing an operation test of an LSI in order to verify a potential change of a wiring of interest and a logic tester for providing the test vector to the LSI. It is necessary to take time to prepare a complicated wiring jig for connecting the LSI and the logic tester, and the increase in the number of pins due to the large scale of the LSI increases the preparation time that is indispensable in advance of analysis. There is.

【0005】また、CIVA法では、例えば、3入力の
NANDゲートにおいて、断線のある配線以外の二つの
入力がハイレベル(以下、Hと記す)とローレベル(L
と記す)とに別れていて出力が固定されている場合のよ
うに、断線のあるゲートの入力を変化させてもそのゲー
ト出力に変化が生じなければ断線を検知できない。即
ち、断線故障の場所によってはCIVA法では検出でき
ないという問題があった。更に、通常の走査電子顕微鏡
(SEM)装置に加えて、画像化のために別途演算処理
装置を必要とするため、システム構成が複雑になるとい
う欠点があった。
Further, in the CIVA method, for example, in a three-input NAND gate, two inputs other than a broken line have a high level (hereinafter, referred to as H) and a low level (L).
As in the case where the output is fixed and the input of the gate having a disconnection is changed, the disconnection cannot be detected unless a change occurs in the gate output. In other words, there is a problem that it cannot be detected by the CIVA method depending on the location of the disconnection failure. Further, in addition to a normal scanning electron microscope (SEM) device, a separate arithmetic processing device is required for imaging, which has a disadvantage that the system configuration is complicated.

【0006】そこで、これ等の従来提案されている技術
に対して指摘されている課題を解決するために、本願発
明者らが特願平8−294149号において、CMOS
構造の半導体集積回路の電源線と接地線から繰返しパル
ス電圧を印加することによって、静的な状態では半導体
集積回路の大半の内部配線は必ず電源線か接地線のいず
れか一方と電気的に接続する回路構造を利用して、テス
トベクトルを用いずに内部配線に電位変化を伝播させて
得た電位像にCADレイアウト像をマスクとして重ね合
せて断線箇所の視認性を向上し断線箇所を検出する技術
を出願している。
In order to solve the problems pointed out with respect to these conventionally proposed technologies, the present inventors disclosed in Japanese Patent Application No. 8-294149 a CMOS image sensor.
By applying pulse voltage repeatedly from the power line and the ground line of the semiconductor integrated circuit with the structure, most of the internal wiring of the semiconductor integrated circuit is always electrically connected to either the power line or the ground line in a static state Using the circuit structure to perform the above, the potential change obtained by propagating the potential change to the internal wiring without using the test vector is superimposed on the CAD layout image as a mask to improve the visibility of the disconnected portion and detect the disconnected portion. Application for technology.

【0007】更に、同じく本願発明者らが特願平9−0
80549号において、上記発明においてレイアウトデ
ータを用いずに良品と不良品の電位像の差像のみから断
線箇所を検出する技術を出願している。
Further, the inventors of the present invention have also disclosed in Japanese Patent Application No.
No. 80549 filed an application for a technique for detecting a broken portion only from a difference image between potential images of a good product and a defective product without using layout data in the above invention.

【0008】[0008]

【発明が解決しようとする課題】しかし、特願平8−2
94149号に記載の断線検出法では、電位像を取得す
る以外にレイアウトデータを用いて実時間画像処置を実
施するための高性能WS(ワークステーション)を必要
とし、運用コストがかかるため簡易な断線検出技術では
ない。
SUMMARY OF THE INVENTION However, Japanese Patent Application No. Hei 8-2
The disconnection detection method described in U.S. Pat. No. 94149 requires a high-performance WS (workstation) for performing real-time image processing using layout data in addition to acquiring an electric potential image. Not a detection technology.

【0009】また、特願平9−080549号に記載の
断線検出法では、良品と不良品の電位像を比較する場
合、良品と不良品の電位像を迅速に取得するために電子
ビームテスタを2台用意するかもしくは良品と不良品を
交換する毎に真空度を低下させるため画像取得に時間が
かかり、簡易で高速な検出技術ではない。
In the disconnection detection method described in Japanese Patent Application No. 9-080549, when comparing the potential images of good and defective products, an electron beam tester is used to quickly obtain the potential images of good and defective products. Each time two units are prepared or a good product and a defective product are exchanged, the degree of vacuum is reduced, so that it takes a long time to acquire an image, which is not a simple and high-speed detection technique.

【0010】そこで本発明は、大規模回路のLSIの断
線故障箇所を検出する簡易でかつ高速な方法を提供する
ことを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a simple and high-speed method for detecting a disconnection fault in an LSI of a large-scale circuit.

【0011】[0011]

【課題を解決するための手段】本発明によれば、CMO
S構造の半導体集積回路の信号線には定電圧を印加し電
源線及び接地線には夫々パルス状電圧を印加しつつ前記
半導体集積回路に対して電子ビームを照射し、この照射
による二次電子信号を検出して当該半導体集積回路の配
線の電位像を取得してこの電位像から断線故障検出をな
すようにした半導体集積回路の断線故障検出装置であっ
て、前記半導体集積回路の良品と不良品とを前記電子ビ
ームの照射部に移動交換して各々の前記電位像を取得す
る手段と、前記電位像を同一画面上に交互に表示する手
段とを含むことを特徴とする半導体集積回路の断線故障
検出装置が得られる。
According to the present invention, a CMO
The semiconductor integrated circuit is irradiated with an electron beam while applying a constant voltage to the signal line of the S-structured semiconductor integrated circuit and applying a pulsed voltage to the power supply line and the ground line, respectively. A disconnection failure detection device for a semiconductor integrated circuit, which detects a signal to obtain a potential image of a wiring of the semiconductor integrated circuit and detects a disconnection failure from the potential image. A semiconductor integrated circuit, comprising: means for transferring and exchanging a non-defective product with the electron beam irradiation unit to acquire each of the potential images; and means for alternately displaying the potential images on the same screen. A disconnection failure detection device is obtained.

【0012】また、本発明によれば、CMOS構造の半
導体集積回路の信号線には定電圧を印加し電源線及び接
地線には夫々パルス状電圧を印加しつつ前記半導体集積
回路に対して電子ビームを照射し、この照射による二次
電子信号を検出して当該半導体集積回路の配線の電位像
を取得してこの電位像から断線故障検出をなすようにし
た半導体集積回路の断線故障検出方法であって、前記半
導体集積回路の良品と不良品とを前記電子ビームの照射
部に移動交換して各々の前記電位像を取得するステップ
と、前記電位像の各々を同一画面上に交互に表示するス
テップとを含むことを特徴とする半導体集積回路の断線
故障検出方法が得られる。
Further, according to the present invention, a constant voltage is applied to a signal line of a semiconductor integrated circuit having a CMOS structure, and a pulsed voltage is applied to a power supply line and a ground line, respectively. In the method of detecting a disconnection failure of a semiconductor integrated circuit, a beam is irradiated, a secondary electron signal due to the irradiation is detected, a potential image of the wiring of the semiconductor integrated circuit is obtained, and a disconnection failure is detected from the potential image. A step of transferring and exchanging a non-defective product and a defective product of the semiconductor integrated circuit to the irradiation part of the electron beam to acquire each of the potential images; and alternately displaying each of the potential images on the same screen. And a method for detecting a disconnection failure of the semiconductor integrated circuit.

【0013】そして、前記電位像の各々の明度差により
前記不良品の断線箇所を検出するようにしたことを特徴
とし、前記良品及び不良品の前記電子ビームの被照射領
域の差が最小になるように一方の被照射領域を調整して
前記電位像の取得を行うステップを更に含むことを特徴
とする。
The disconnection of the defective product is detected based on the brightness difference of each of the potential images, and the difference between the irradiated areas of the non-defective product and the defective product with the electron beam is minimized. The method further includes the step of adjusting one of the irradiated areas to acquire the potential image.

【0014】また、前記良品及び不良品の電位像の明度
差が最小となるように一方の電位像の明度を調整して前
記電位像の取得を行うステップを含むことを特徴とし、
更に、前記良品及び不良品の電位像の差像を生成するス
テップを含み、この差像における中間明度領域の有無に
より前記不良品の断線箇所を検出するようにしたことを
特徴とする。
Further, the method further comprises the step of adjusting the brightness of one of the potential images so as to minimize the brightness difference between the potential images of the non-defective product and the defective product and acquiring the potential image.
Further, the method includes a step of generating a difference image between the potential images of the non-defective product and the defective product, and detects a broken portion of the defective product based on the presence or absence of an intermediate brightness area in the differential image.

【0015】更にはまた、前記良品及び不良品の電位像
の差像を生成するステップと、この差像の明度変更を行
うステップとを含み、この明度変更された差像により前
記不良品の断線箇所を検出するようにしたことを特徴と
する。
Further, the method includes a step of generating a difference image between the potential images of the non-defective product and the defective product, and a step of changing the brightness of the difference image, and the disconnection of the defective product is performed by the brightness-changed difference image. It is characterized in that a portion is detected.

【0016】また、本発明によれば、CMOS構造の半
導体集積回路の信号線には定電圧を印加し電源線及び接
地線には夫々パルス状電圧を印加しつつ前記半導体集積
回路に対して電子ビームを照射し、この照射による二次
電子信号を検出して当該半導体集積回路の配線の電位像
を取得してこの電位像から断線故障検出をなすようにし
た半導体集積回路の断線故障検出方法をコンピュータに
より実行せしめるための制御プログラムを記録した記録
媒体であって、前記半導体集積回路の良品と不良品とを
前記電子ビームの照射部に移動交換して各々の前記電位
像を取得するステップと、前記電位像の各々を同一画面
上に交互に表示するステップとを含むプログラムを記録
した記録媒体が得られる。
Further, according to the present invention, a constant voltage is applied to a signal line of a semiconductor integrated circuit having a CMOS structure, and a pulsed voltage is applied to a power supply line and a ground line, respectively. A method of detecting a disconnection failure of a semiconductor integrated circuit, which irradiates a beam, detects a secondary electron signal due to the irradiation, acquires a potential image of the wiring of the semiconductor integrated circuit, and detects a disconnection failure from the potential image. A recording medium recording a control program to be executed by a computer, wherein a non-defective product and a defective product of the semiconductor integrated circuit are moved to and exchanged with an irradiation unit of the electron beam to obtain each of the potential images. A step of alternately displaying each of the potential images on the same screen.

【0017】本発明の作用を述べる。上述の方法により
取得された良品と不良品の電位像は、断線した配線とL
SIの動作に寄与する構造をもたない領域及びLSIの
動作に寄与する構造を有する領域とを、画素の明度の差
異によって識別できる画像となり、断線箇所のみで明度
変化が異なる画像となり、極めて容易に迅速に断線箇所
の検出が可能となる。
The operation of the present invention will be described. The potential images of the non-defective product and the defective product obtained by the above-described method correspond to the broken wiring and L
A region having no structure contributing to the operation of the SI and a region having a structure contributing to the operation of the LSI are images that can be identified by the difference in the brightness of the pixels. Thus, the disconnection can be quickly detected.

【0018】また、良品と不良品とに対する電子ビーム
照射を、真空チャンバ内で移動交換自在とすることで、
真空度を低下させることなく試料の交換が可能であるた
めに、従来は試料交換時に真空度が低下して、当該真空
度を所定値に上げるための待ち時間が必要だったものを
省略できる、当該待機時間が10分以上から10秒以下
に短縮できる。
In addition, the electron beam irradiation for the non-defective product and the defective product can be moved and exchanged in a vacuum chamber.
Because it is possible to exchange the sample without lowering the degree of vacuum, the degree of vacuum is conventionally reduced at the time of sample replacement, it is possible to omit those that required a waiting time to raise the degree of vacuum to a predetermined value, The waiting time can be reduced from 10 minutes or more to 10 seconds or less.

【0019】更に、良品と不良品との電位像が同じ位置
座標を表示する様に、一方の電位像の中央の位置座標を
基準にしてもう一方の電位像が同じ位置座標を表示する
様に表示位置を移動し、更に電位像同士のずれが最小に
なる様に一方の像に歪みを持たせたり、傾ける等の画像
処理を施した後、電位像を取得し同一画面上に交互に表
示することで断線箇所をより検出しやすくする。
Further, the potential images of the non-defective product and the defective product display the same position coordinates, and the other potential image displays the same position coordinates with reference to the center position coordinate of one of the potential images. After moving the display position and applying image processing such as distorting or tilting one image to minimize the deviation between the potential images, the potential images are acquired and displayed alternately on the same screen This makes it easier to detect a broken portion.

【0020】上記の様にして得られる画像は、不良品と
良品で位置座標が同じ画素が重なり合う様に画像処理を
施しているので、断線した配線と半導体集積回路の動作
に寄与する構造を持たない領域及び半導体集積回路の動
作に寄与する構造を持つ領域とを明度変化の大きさによ
って識別できる画像であり、断線箇所で明度が異なる画
像である。この様に断線箇所の視認性が向上するので断
線箇所検出が容易となる。
The image obtained as described above is subjected to image processing so that defective pixels and non-defective pixels having the same position coordinates overlap each other, and thus have a structure that contributes to the operation of the broken wiring and the semiconductor integrated circuit. This is an image in which a non-existent area and an area having a structure contributing to the operation of the semiconductor integrated circuit can be identified by the magnitude of the change in brightness, and the brightness differs at the disconnection point. In this way, the visibility of the broken portion is improved, so that the broken portion can be easily detected.

【0021】また、不良品と良品の電位像同士が全く重
なり合う様に画像処理を施し、更に、電位像の明度分布
の差違が断線箇所以外では最小になる様に、一方の電位
像を基準としてもう一方の電位像に明度分布をずらす画
像処理を施し、同一画面上に交互に表示すること断線箇
所をより検出しやすくする。
Further, image processing is performed so that the potential images of the defective and non-defective products completely overlap each other, and further, one of the potential images is used as a reference so that the difference in the brightness distribution of the potential images is minimized except at the disconnection point. The other potential image is subjected to image processing for shifting the lightness distribution, and alternately displayed on the same screen to make it easier to detect a broken portion.

【0022】上記の様にして得られる画像は、単に不良
品と良品で位置座標が同じ画素が画面上で重なり合う様
に画像処理を施した画像よりも、断線した配線と半導体
集積回路の動作に寄与する構造を持たない領域及び半導
体集積回路の動作に寄与する構造を持つ領域とを画素の
明度によって識別しやすい画像であり、断線箇所のみで
大きな明度変化がある画像である。この様に断線箇所の
視認性が向上するので断線箇所検出が容易となる。
The image obtained as described above is more effective in the operation of the broken wiring and the semiconductor integrated circuit than the image processed so that pixels having the same position coordinates as defective and non-defective products overlap on the screen. This is an image in which a region having no contributing structure and a region having a structure contributing to the operation of the semiconductor integrated circuit can be easily distinguished by the brightness of the pixel, and the image has a large brightness change only at a broken portion. In this way, the visibility of the broken portion is improved, so that the broken portion can be easily detected.

【0023】また、不良品と良品の電位像が断線以外の
領域では同じ明度分布の電位像から差像を作成し画面上
に表示することで断線箇所をより検出しやすくする。
Further, in a region where the potential images of the defective product and the good product are other than the disconnection, a difference image is created from the potential image having the same brightness distribution and displayed on the screen, thereby making it easier to detect the disconnection portion.

【0024】上記の様にして得られる画像は、単に不良
品と良品で断線以外の領域では同じ明度分布になる様画
像処理を施した電位像とは異なり、断線した配線と他の
領域とを画素の明度によって識別できる画像であり、断
線箇所のみが中間明度とは異なる画像である。この様に
断線箇所の視認性が向上するので断線箇所検出が容易と
なる。
The image obtained as described above is different from a potential image which has been subjected to image processing so that the same lightness distribution is obtained in regions other than the defective product and the non-defective product other than the disconnection. The image is an image that can be identified by the brightness of the pixel, and is different from the intermediate brightness only in the broken portion. In this way, the visibility of the broken portion is improved, so that the broken portion can be easily detected.

【0025】更に、両電位像の差像中の画素の明度を断
線箇所特有の明度のものを白または黒に変更して表示し
た2つの画像を作成して同一画面上に交互表示すること
で、断線箇所をより検出しやすくする。
Further, by changing the brightness of the pixel in the difference image between the two potential images and the brightness specific to the broken portion to white or black, two images are displayed and alternately displayed on the same screen. , To make it easier to detect a broken portion.

【0026】上記の様にして得られる画像は、単に断線
した配線と他の領域とを画素の明度によって識別できる
画像よりも、断線箇所の視認性を向上させた画像であ
り、断線箇所検出が容易となる。
The image obtained as described above is an image in which the visibility of a broken portion is improved as compared with an image in which a broken wire and another region can be distinguished by the brightness of a pixel. It will be easier.

【0027】[0027]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0028】図1(A)は本発明を実施する半導体集積
回路の故障解析装置の一例を示す構成図である。この解
析装置は電子銃110を含む走査型電子顕微鏡(SE
M)101と、良品と不良品を真空度を低下させずに交
換する装置105と、試料CMOS−LSI100の電
位像を作成するワークステーション(WS)111とか
ら構成されている。尚、このSEM101等を含む装置
を電子ビームテスタ102として示している。SEM1
01の真空容器内に設置された試料LSI100には、
パルスジェネレータ103から電源線の端子106と接
地線の端子107に接続して繰返しパルス電圧が印加さ
れており、試料LSI100の信号入力を行う端子10
8に定電圧電源104を接続して初段入力電圧が印加さ
れている。
FIG. 1A is a block diagram showing an example of a failure analysis device for a semiconductor integrated circuit embodying the present invention. This analyzer is a scanning electron microscope (SE) including an electron gun 110.
M) 101, an apparatus 105 for exchanging non-defective products and defective products without lowering the degree of vacuum, and a workstation (WS) 111 for creating a potential image of the sample CMOS-LSI 100. An apparatus including the SEM 101 and the like is shown as an electron beam tester 102. SEM1
In the sample LSI 100 installed in the vacuum vessel No. 01,
The pulse generator 103 is connected to the power supply line terminal 106 and the ground line terminal 107 and is repeatedly applied with a pulse voltage.
8, a first-stage input voltage is applied by connecting a constant-voltage power supply 104.

【0029】CMOS−LSIの内部配線の電位変化
は、SEM101の真空容器内にてCMOS−LSIに
電子銃110を用いて一次電子ビーム109を走査しな
がら照射し、一次電子ビームが照射された部位に応じて
放出される二次電子の検出器への到達量によって測定さ
れる。測定結果はWS111によりピクセル分割された
所定の領域毎に二次電子の放出量を白黒の階調表示を行
う様に画像処理し、ディスプレイ112に表示させる。
記憶媒体118はWS111の動作制御プログラムを記
録したROM等のメモリ装置である。
The potential change of the internal wiring of the CMOS-LSI can be determined by irradiating the CMOS-LSI with the electron gun 110 while scanning the primary electron beam 109 in the vacuum vessel of the SEM 101, and irradiating the primary electron beam. Is measured by the amount of secondary electrons emitted according to the amount reaching the detector. The measurement result is subjected to image processing so that the emission amount of the secondary electrons is displayed in black and white gradation for each predetermined area divided by the WS 111 and displayed on the display 112.
The storage medium 118 is a memory device such as a ROM in which an operation control program of the WS 111 is recorded.

【0030】次に、電子ビーム109の照射領域に設置
された試料LSI100の移動交換について図1(B)
を用いて説明する。図1(B)は良品と不良品を電子ビ
ーム照射領域に移動させる装置105の構成図である。
水平方向116に移動することによって良品か不良品の
どちらか一方を電ビーム照射領域に設置し、更に垂直方
向117に移動することによってパルスジェネレータ1
03と定電圧電源104からの電気信号の供給を可能と
する。
Next, FIG. 1B shows the movement exchange of the sample LSI 100 placed in the irradiation area of the electron beam 109.
This will be described with reference to FIG. FIG. 1B is a configuration diagram of an apparatus 105 for moving non-defective products and defective products to an electron beam irradiation area.
Either a non-defective product or a defective product is set in the electron beam irradiation area by moving in the horizontal direction 116, and the pulse generator 1 is further moved in the vertical direction 117.
03 and an electric signal from the constant voltage power supply 104 can be supplied.

【0031】次に電気信号の供給と本発明における電位
像の取得法について図1(C)を用いて説明する。図1
(C)は印加する電圧の模式図である。パルスジェネレ
ータ103によって電源線に印加する繰返しパルス電圧
121の高い電圧と接地線に印加する繰返しパルス電圧
123の低い電圧の電位差は試料LSI毎に定められて
いる最大定格電圧120に、電源線に印加する繰返しパ
ルス電圧121の低い電圧は接地線に印加する繰返しパ
ルス電圧123の高い電圧より低くなる様に、信号線に
接続する定電圧電源104の電圧をパルス電圧121と
123が交差する範囲内の電圧値に設定する。その後、
電圧が高い状態での二次電子信号検出期間124もしく
は電圧が低い状態での二次電子信号検出期間125にお
いて、良品と不良品の電位像を取得し両者を比較するこ
とによって、断線箇所を検出する。
Next, supply of an electric signal and a method of acquiring a potential image in the present invention will be described with reference to FIG. FIG.
(C) is a schematic diagram of the applied voltage. The potential difference between the high voltage of the repetitive pulse voltage 121 applied to the power line by the pulse generator 103 and the low voltage of the repetitive pulse voltage 123 applied to the ground line is applied to the maximum rated voltage 120 determined for each sample LSI and to the power line. The voltage of the constant voltage power supply 104 connected to the signal line is set so that the low voltage of the repetitive pulse voltage 121 is lower than the high voltage of the repetitive pulse voltage 123 applied to the ground line. Set the voltage value. afterwards,
In the secondary electron signal detection period 124 when the voltage is high or in the secondary electron signal detection period 125 when the voltage is low, the potential images of the non-defective product and the defective product are acquired and the two are compared to detect a broken portion. I do.

【0032】尚、図1(C)において、二次電子信号検
出期間124と125との2つの期間を交互に設けてい
るのは、一方の期間で検出(サンプリング)を行い、他
方の期間でリセットを行うことにより、検出電位像がよ
り明瞭となる様にしたものであり、その詳細は前述した
本願発明者らによって提案中の特願平8−294149
号に開示されている。また、信号線への印加定電圧12
2をパルス電圧121と123とが交差する範囲内の電
圧値とするのは、この範囲内の電圧が最良の結果を生ず
ることによる。
In FIG. 1C, the reason why two periods of the secondary electron signal detection periods 124 and 125 are provided alternately is that the detection (sampling) is performed in one period and the secondary period is detected in the other period. By performing the reset, the detected potential image is made clearer, and details thereof are described in the above-mentioned Japanese Patent Application No. 8-294149, which has been proposed by the present inventors.
Issue. Further, the constant voltage 12 applied to the signal line
The reason why 2 is a voltage value in the range where the pulse voltages 121 and 123 intersect is that a voltage in this range produces the best result.

【0033】次に断線検出方法について、図2を用いて
説明する。図2は第一の実施の形態における断線検出の
アルゴリズムを示すフローチャートである。先ず、良品
と不良品の半導体集積回路において、不良品のLSIを
電子ビームの照射領域に固定する(ステップ200)。
電源線と接地線から繰返しパルス電圧を、信号入力線か
ら定電圧を印加し(ステップ201)電位像を取得する
(ステップ202)。
Next, a method for detecting disconnection will be described with reference to FIG. FIG. 2 is a flowchart showing an algorithm of disconnection detection according to the first embodiment. First, in the non-defective and defective semiconductor integrated circuits, the defective LSI is fixed to the electron beam irradiation area (step 200).
A pulse voltage is repeatedly applied from a power supply line and a ground line, and a constant voltage is applied from a signal input line (step 201), and a potential image is obtained (step 202).

【0034】次にパルス電圧の供給を停止し(ステップ
203)、不良品と良品を交換して(ステップ204)
パルス電圧の供給を再開してから(ステップ205)、
良品の電位像を取得する(ステップ206)。次にステ
ップ202とステップ206で取得した不良品と良品の
電位像を同一画面に交互に表示し(ステップ208)、
断線を示す良品と不良品の明度が異なる箇所の存否を確
認する(ステップ209)。
Next, the supply of the pulse voltage is stopped (step 203), and the defective and non-defective products are exchanged (step 204).
After restarting the supply of the pulse voltage (step 205),
A non-defective potential image is obtained (step 206). Next, the potential images of the defective product and the good product obtained in step 202 and step 206 are alternately displayed on the same screen (step 208).
It is confirmed whether or not there is a portion where the brightness of the non-defective product indicating the disconnection is different from that of the defective product (step 209).

【0035】電位像内において、明度が良品と不良品で
異なる画素が集中している領域が存在すればその画像内
に断線が接続している配線が存在すると判断し(ステッ
プ224)処理を終了する。断線に接続した配線が存在
しない場合、電子ビームの照射位置を変更し(ステップ
223)、ステップ200に戻って上記の動作を繰返
す。
In the potential image, if there is an area where pixels having different brightnesses are different between a good product and a bad product, it is determined that there is a wire to which a disconnection is connected in the image (step 224), and the process ends. I do. If there is no wiring connected to the disconnection, the irradiation position of the electron beam is changed (step 223), and the process returns to step 200 to repeat the above operation.

【0036】上記のステップ209における判断基準
は、電位像内の同じ位置の画素同士で明度が異なる画素
が一定密度以上で存在する領域の有無により判断を行う
ことができ、これは装置利用者が目視により判断しても
良く、また、断線と判断する明度の画素の密度に境界値
を設定する等の公知のソフトウェア技術により行うこと
もでき、その方法は特に限定されることはない。
The determination criterion in step 209 can be based on the presence or absence of an area where pixels of different brightness at the same position in the potential image are present at a certain density or higher. The determination may be made by visual inspection, or may be performed by a known software technique such as setting a boundary value for the density of pixels of brightness determined to be a disconnection, and the method is not particularly limited.

【0037】以下に、この第一の実施の形態に従った画
像比較による断線検出の方法について図3を参照して具
体的に説明する。図3(A)は装置構成図である図1に
おいて信号入力線から定電圧を印加され、かつ電源線と
接地線から繰返しパルス電圧を供給している良品の電位
像の模式図で、図3(B)は、不良品だが電位像内には
断線が存在しない電位像の模式図である。図3(C)は
不良品の電位像内に断線が存在する場合の模式図であ
る。
Hereinafter, a method for detecting a disconnection by comparing images according to the first embodiment will be specifically described with reference to FIG. FIG. 3A is a schematic diagram of a potential image of a non-defective product in which a constant voltage is applied from a signal input line and a pulse voltage is repeatedly supplied from a power supply line and a ground line in FIG. (B) is a schematic diagram of a potential image which is defective but has no disconnection in the potential image. FIG. 3C is a schematic diagram in the case where there is a disconnection in the potential image of a defective product.

【0038】各図中、301は高い電位が伝播している
配線,302は配線が存在しない領域,303は低い電
位が伝播している領域,304は断線箇所,305は断
線して電位変化が伝播しない配線を示している。
In each of the figures, 301 is a wiring through which a high potential propagates, 302 is a region where no wiring exists, 303 is a region through which a low potential propagates, 304 is a broken portion, and 305 is broken to change potential. The wiring which does not propagate is shown.

【0039】先ず、内部に断線が存在する不良品の半導
体集積回路に対して、図1(A)に示すパルスジェネレ
ータ103によって電源線に与えるパルス電圧を5Vと
2.5Vの間に振幅する様に設定し、接地線に与えるパ
ルス電圧を2.6Vと0Vとの間で振幅する様に設定す
る。パルス周波数は2000Hzに、電源線と接地線に
与えるパルスの位相差は90度に設定する。
First, a pulse generator 103 shown in FIG. 1A applies a pulse voltage applied to a power supply line between 5 V and 2.5 V to a defective semiconductor integrated circuit having a disconnection therein. , And the pulse voltage applied to the ground line is set to swing between 2.6V and 0V. The pulse frequency is set to 2000 Hz, and the phase difference between the pulses applied to the power supply line and the ground line is set to 90 degrees.

【0040】繰返し電圧パルスをトリガーとしてパルス
の立上がりまたは立下がり後15μsec以内に二次電
子到達数検出を行い、更に繰返し信号を積算してSN比
を向上させることによって、良品の電位像である図3
(A)を作成する。また不良品である半導体集積回路に
対して同じ条件で電圧を印加し電位像である図3(B)
を作成する。図3(A)と(B)の画像比較では断線箇
所は存在しないと判断し、隣接する領域を表示するよう
電子ビーム照射領域を移動する。
A potential image of a non-defective product by detecting the number of arrivals of secondary electrons within 15 μsec after the rising or falling of the pulse by using the repetitive voltage pulse as a trigger, and further integrating the repetitive signal to improve the S / N ratio. 3
(A) is created. FIG. 3B is a potential image obtained by applying a voltage to the defective semiconductor integrated circuit under the same conditions.
Create In the image comparison between FIGS. 3A and 3B, it is determined that there is no disconnection, and the electron beam irradiation area is moved so as to display an adjacent area.

【0041】図3(C)の様に、電位像内に断線が存在
する場合、図3(A)と(C)を交互に表示することに
よって断線を目視で検出する。またはソフトウェアによ
る自動判別を行うことによって、電位像内に断線を検出
することもできる。
As shown in FIG. 3C, when there is a disconnection in the potential image, the disconnection is visually detected by alternately displaying FIGS. 3A and 3C. Alternatively, disconnection can be detected in the potential image by performing automatic determination by software.

【0042】更に、本発明の第二の実施の形態を説明す
る。第一の実施の形態で示した方法で良品と不良品の電
位像を取得し、不良品と良品の電位像が同じ位置座標を
表示させるために一方の電位像の中央の位置座標を基準
にしてもう一方の電位像が同じ位置座標を表示する様に
表示位置を移動し、更に電位像同士のずれが最小になる
様に一方の像に画像の位置補正を施したり、傾ける等の
画像処理を施した後、電位像を取得し同一画面上に交互
に表示することで断線箇所の明度変化のみをより検出し
やすくする。
Further, a second embodiment of the present invention will be described. The potential images of the non-defective and non-defective products are obtained by the method described in the first embodiment, and the potential images of the defective and non-defective products are displayed with the same position coordinates as the reference position coordinates at the center of one of the potential images. Image processing such that the display position is moved so that the other potential image displays the same position coordinates, and the position of one image is corrected or tilted so that the displacement between the potential images is minimized. , The potential image is acquired and alternately displayed on the same screen, thereby making it easier to detect only the change in the brightness at the broken portion.

【0043】良品と不良品の電位像を基にして断線箇所
を容易に識別するために、電圧パルスを印加することに
よって生じる断線箇所の画像内での明度変化が、それ以
外の領域の画像内での明度変化よりも大きい像を作成す
る。
In order to easily identify a broken portion based on the potential images of good and defective products, a change in brightness in the image of the broken portion caused by application of a voltage pulse is caused by a change in the brightness of the image in other regions. Create an image that is larger than the brightness change at.

【0044】次に、この第二の実施例の形態における断
線検出の方法について、図4を用いて説明する。ハッチ
ングを付けているところが図2と異なる箇所であり、図
4はこの第二の実施の形態における断線検出方法を示す
フローチャートである。
Next, a method of detecting disconnection in the second embodiment will be described with reference to FIG. The hatching is different from FIG. 2, and FIG. 4 is a flowchart showing the disconnection detecting method according to the second embodiment.

【0045】先ず、不良品と良品の半導体集積回路にお
いて、先の第一の実施の形態に記載したステップ200
から206までを実行する。次にステップ202とステ
ップ206で取得した電位像を比較し、通常はチップ毎
にパッケージングする際のチップの位置ずれや傾きの違
いによって生じる不良品と良品の電位像の中心座標のず
れを検出し(ステップ207)、良品の電位像の座標を
ずらすことによって一致させ(ステップ210)、更に
電位像同士の位置ずれを調整し画像の対応する領域が同
じ位置に表示されるよう調整する(ステップ211)。
First, in the case of defective and non-defective semiconductor integrated circuits, step 200 described in the first embodiment is performed.
To 206 are executed. Next, the potential images acquired in step 202 and step 206 are compared to detect a shift in the center coordinates of the potential image between the defective product and the non-defective product, which is usually caused by a chip position shift or a difference in inclination when packaging each chip. (Step 207), the coordinates of the potential images of non-defective products are matched by shifting the coordinates (Step 210), and the positional shift between the potential images is further adjusted so that the corresponding area of the image is displayed at the same position (Step 210). 211).

【0046】尚、ステップ211において、「像を変形
するパラメータ」とは位置ずれ調整のためのパラメータ
であり、中心座標のずれ角,ずれ量である。
In step 211, the "parameter for deforming the image" is a parameter for adjusting the positional deviation, and is a deviation angle and a deviation amount of the central coordinates.

【0047】良品と不良品の電位像を同一画面に交互に
表示し(ステップ208)、断線を示す良品と不良品で
明度が異なる画素が集中している領域の存否を確認する
(ステップ209)。電位像内において、明度が良品と
不良品で異なる画素が集中している領域が存在すればそ
の画像内に断線に接続している配線が存在すると判断し
(ステップ224)処理を終了する。断線に接続した配
線が存在しない場合、電子ビームの照射位置を変更し
(ステップ223)、ステップ200に戻って上記の動
作を繰返す。
The potential images of non-defective products and defective products are alternately displayed on the same screen (step 208), and it is confirmed whether or not there is an area where pixels of different brightness are concentrated between non-defective products and defective products indicating disconnection (step 209). . If there is an area where pixels having different brightnesses are different between a non-defective product and a non-defective product in the potential image, it is determined that there is a wire connected to the disconnection in the image (step 224), and the process ends. If there is no wiring connected to the disconnection, the irradiation position of the electron beam is changed (step 223), and the process returns to step 200 to repeat the above operation.

【0048】以下に、この第二の実施の形態に従った画
像処理の方法について図3及び図5を参照して具体的に
説明する。図3(A)は、装置構成図である図1におい
て信号入力線から定電圧を印加され、かつ電源線と接地
線から繰返しパルス電圧を供給している良品内の電位像
の模式図で、図3(B)は不良品だが電位像内には断線
は存在しない場所の模式図である。
An image processing method according to the second embodiment will be specifically described below with reference to FIGS. FIG. 3A is a schematic diagram of a potential image in a non-defective product in which a constant voltage is applied from a signal input line and a repetitive pulse voltage is supplied from a power supply line and a ground line in FIG. FIG. 3B is a schematic diagram of a place where a defective product is present but no disconnection exists in the potential image.

【0049】図5(A)は図3(A)を図3(B)の中
心座標と重なる様にビーム照射領域を移動し、更に電位
像の歪みを図3(B)に合せる画像処理を施した電位像
の模式図である。図5(C)に模式図として示す断線を
含む試料LSIに次に示す方法を適用し、断線箇所を検
出する。
FIG. 5A shows an image processing in which the beam irradiation area is moved so that FIG. 3A is overlapped with the center coordinates of FIG. 3B, and furthermore, the distortion of the potential image is adjusted to that of FIG. 3B. It is a schematic diagram of the applied potential image. The following method is applied to the sample LSI including the disconnection shown as a schematic diagram in FIG.

【0050】先ず、内部に断線が存在する不良品の半導
体集積回路に対して、図1(A)に示すパルスジェネレ
ータ103によって電源線に与えるパルス電圧を5Vと
2.5Vの間に振幅する様に設定し、接地線に与えるパ
ルス電圧を2.6Vと0Vとの間で振幅する様に設定す
る。パルス周波数は2000Hzに、電源線と接地線に
与えるパルスの位相差は90度に設定する。
First, a pulse generator 103 shown in FIG. 1A applies a pulse voltage applied to a power supply line between 5 V and 2.5 V to a defective semiconductor integrated circuit having a disconnection therein. , And the pulse voltage applied to the ground line is set to swing between 2.6V and 0V. The pulse frequency is set to 2000 Hz, and the phase difference between the pulses applied to the power supply line and the ground line is set to 90 degrees.

【0051】繰返し電圧パルスをトリガーとしてパルス
の立上がりまたは立下がり後15μsec以内に二次電
子到達数検出を行い、更に繰返し信号を積算してSN比
を向上させることによって、良品の電位像である図3
(A)を作成する。また不良品である半導体集積回路に
対して同じ条件で電圧を印加し電位像を取得した後に不
良品の電位像と同じ位置の像を表示する様に画像処理を
施すことによって、図5(B)と同じ位置座標の電位像
である図5(A)を作成する。図5(A)と(B)の画
像比較では断線箇所は存在しないと判断し、隣接する領
域を表示するよう電子ビーム照射領域を移動する。
FIG. 5 is a diagram showing a potential image of a non-defective product by detecting the number of arrivals of secondary electrons within 15 μsec after the rise or fall of the pulse by using the repetitive voltage pulse as a trigger, and further improving the SN ratio by integrating repetitive signals. 3
(A) is created. By applying a voltage to the defective semiconductor integrated circuit under the same conditions to obtain a potential image and then performing image processing to display an image at the same position as the potential image of the defective product, as shown in FIG. 5A, which is a potential image at the same position coordinates as in FIG. In the image comparison between FIGS. 5A and 5B, it is determined that there is no disconnection, and the electron beam irradiation area is moved so as to display an adjacent area.

【0052】図5(C)の様に、電位像内に断線が存在
する場合、図5(A)と(C)を交互に表示することに
よって断線を目視で検出する。またはソフトウェアによ
る自動判別を行うことによって、電位像内に断線を検出
することもできる。
As shown in FIG. 5C, when there is a disconnection in the potential image, the disconnection is visually detected by alternately displaying FIGS. 5A and 5C. Alternatively, disconnection can be detected in the potential image by performing automatic determination by software.

【0053】更に、本発明の第三の実施の形態として、
第一の実施の形態で示した方法で良品と不良品の電位像
を取得し、更に第二の実施の形態で示した方法で不良品
と良品の電位像が同じ位置座標を同一画面上に表示する
様に画像処理を施した後、画素の明度分布の差が最小に
なる様に良品もしくは不良品の電位像の明度分布をずら
し、同一画面上に交互に表示することで断線箇所をより
検出しやすくする。
Further, as a third embodiment of the present invention,
The potential images of non-defective and non-defective products are obtained by the method described in the first embodiment, and the potential coordinates of the non-defective and non-defective products are displayed on the same screen by the method described in the second embodiment. After performing image processing to display, the brightness distribution of the potential image of a good or defective product is shifted so that the difference in the brightness distribution of the pixels is minimized, and alternately displayed on the same screen to make the broken part more Make it easier to detect.

【0054】良品と不良品の電位像を基にして断線箇所
を容易に識別するために、電圧パルスを印加することに
よって生じる断線箇所の画像内での明度変化が、それ以
外の領域の画像内での明度変化よりも大きい像を作成す
る。
In order to easily identify a broken portion based on the potential images of good and defective products, the brightness change in the image of the broken portion caused by applying a voltage pulse is caused by the change in the brightness of the image in the other region. Create an image that is larger than the brightness change at.

【0055】次に、この第三の実施の形態における断線
検出の方法について、図6を用いて説明する。ハッチン
グを付けている箇所が図4と異なる部分であり、図6は
この第三の実施の形態における断線検出法を示すフロー
チャートである。
Next, a method for detecting disconnection in the third embodiment will be described with reference to FIG. The hatched portions are different from those in FIG. 4, and FIG. 6 is a flowchart showing the disconnection detection method in the third embodiment.

【0056】先ず、不良品と良品の半導体集積回路にお
いて、本発明の第2の実施の形態に記載したステップ2
00から211までを実行する。次に断線箇所以外では
画素の明度差が最小の電位像を表示させる様に不良品の
明度分布(コントラスト)をずらす(ステップ21
2)。良品と不良品の電位像を同一画面上に交互に表示
し(ステップ208)断線を示す良品と不良品で明度が
異なる画素が集中している領域の存否を確認する(ステ
ップ209)。
First, in the case of defective and non-defective semiconductor integrated circuits, step 2 described in the second embodiment of the present invention is performed.
Execute from 00 to 211. Next, the brightness distribution (contrast) of the defective product is shifted so as to display a potential image in which the brightness difference between the pixels is the minimum except for the broken portion (step 21).
2). The potential images of non-defective products and defective products are alternately displayed on the same screen (step 208), and it is confirmed whether or not there is an area in which pixels having different brightnesses in non-defective products and defective products exhibiting disconnection are concentrated (step 209).

【0057】電位像内において、明度が良品と不良品で
異なる画素が集中している領域が存在すればその画像内
に断線に接続している配線が存在すると判断し(ステッ
プ224)、処理を終了する。断線に接続した配線が存
在しない場合、電子ビームの照射位置を変更し(ステッ
プ223)、ステップ200に戻って上記の動作を繰返
す。
In the potential image, if there is an area where pixels having different brightnesses are different between the non-defective product and the non-defective product, it is determined that there is a wire connected to the disconnection in the image (step 224), and the processing is performed. finish. If there is no wiring connected to the disconnection, the irradiation position of the electron beam is changed (step 223), and the process returns to step 200 to repeat the above operation.

【0058】以下に、この第三の実施の形態に従った画
像処理の方法について図7を参照して具体的に説明す
る。図7(A)は装置構成図である図1において信号入
力線から定電圧を印加され、かつ電源線と接地線から繰
返しパルス電圧を供給している良品内の電位像の模式図
で、図7(B)は不良品内の電位像の模式図である。図
7(B)に模式図として示す断線を含む試料LSIに次
に示す方法を適用し、断線箇所を検出する。
An image processing method according to the third embodiment will be specifically described below with reference to FIG. FIG. 7A is a schematic diagram of a potential image in a non-defective product in which a constant voltage is applied from a signal input line and a repetitive pulse voltage is supplied from a power supply line and a ground line in FIG. FIG. 7B is a schematic diagram of a potential image in a defective product. The following method is applied to a sample LSI including a disconnection schematically shown in FIG. 7B to detect a disconnection location.

【0059】先ず内部に断線が存在する不良品の半導体
集積回路に対して、図1(A)に示すパルスジェネレー
タ103によって電源線に与えるパルス電圧を5Vと
2.5Vの間に振幅する様に設定し、接地線に与えるパ
ルス電圧を2.6Vと0Vとの間で振幅する様に設定す
る。パルス周波数は2000Hzに、電源線と接地線に
与えるパルスの位相差は90度に設定する。
First, the pulse voltage applied to the power supply line by the pulse generator 103 shown in FIG. The pulse voltage applied to the ground line is set so as to swing between 2.6V and 0V. The pulse frequency is set to 2000 Hz, and the phase difference between the pulses applied to the power supply line and the ground line is set to 90 degrees.

【0060】繰返し電圧パルスをトリガーとしてパルス
の立上がりまたは立下がり後15μsec以内に二次電
子到達数検出を行い、更に繰返し信号を積算してSN比
を向上させることによって、不良品の電位像である図7
(B)を作成する。また良品である半導体集積回路に対
して同じ条件で電圧を印加し電位像を取得した後に不良
品の電位像と同じ位置の像を表示する様に画像処理を施
すことによって、図7(B)と同じ位置座標の電位像で
ある図7(A)を作成する。
A repetitive voltage pulse is used as a trigger to detect the number of arrivals of secondary electrons within 15 μsec after the rise or fall of the pulse. Further, the repetition signal is integrated to improve the S / N ratio. FIG.
(B) is created. By applying a voltage to the non-defective semiconductor integrated circuit under the same conditions to obtain a potential image and performing image processing to display an image at the same position as the potential image of the defective product, FIG. 7A, which is a potential image at the same position coordinates as in FIG.

【0061】電位像内に断線が存在する場合、図7
(A)と(B)を交互に表示することによって断線を目
視で検出した。またはソフトウェアによる自動判別を行
うことによって、電位像内に断線を検出する。
FIG. 7 shows a case where a disconnection exists in the potential image.
The disconnection was visually detected by alternately displaying (A) and (B). Alternatively, disconnection is detected in the potential image by performing automatic determination by software.

【0062】以下に、本発明の第四の実施の形態につい
て図面を参照して説明する。第一の実施の形態と同様
に、図1に模式的に示した断線検出装置と方法を用い
る。断線を容易に検出する画像処理法について図8を用
いて説明する。ハッチングを付けている箇所が図6と異
なる部分であり、図8はこの第四の実施の形態における
断線検出方法を示すフローチャートである。
Hereinafter, a fourth embodiment of the present invention will be described with reference to the drawings. As in the first embodiment, the disconnection detecting device and method schematically shown in FIG. 1 are used. An image processing method for easily detecting a disconnection will be described with reference to FIG. The hatched portions are different from those in FIG. 6, and FIG. 8 is a flowchart showing the disconnection detecting method according to the fourth embodiment.

【0063】先ず、不良品と良品の半導体集積回路にお
いて、第三の実施の形態で記載したステップ200から
212までを実行し、不良品の電位像を基にしてステッ
プ212にて作成した良品の電位像との差像を作成する
(ステップ600)。
First, steps 200 to 212 described in the third embodiment are executed for defective and non-defective semiconductor integrated circuits. A difference image from the potential image is created (Step 600).

【0064】次にステップ600にて作成した差像内に
おいて、明度が中間明度(灰色)ではない画素が一定密
度以上で存在するか目視または自動判断するソフトウェ
アによって、判断する(ステップ601)。断線に接続
した配線がない場合、電子ビームの照射位置を変更し
(ステップ223)、ステップ200に戻って上記の動
作を繰返す。電位像内において、明度が異なる画素が集
中している領域を発見するまで探索が続けられることと
なる。
Next, in the difference image created in step 600, it is determined by software that visually or automatically determines whether there is a pixel whose brightness is not intermediate brightness (gray) at a certain density or higher (step 601). If there is no wiring connected to the disconnection, the irradiation position of the electron beam is changed (step 223), and the process returns to step 200 to repeat the above operation. The search is continued until a region where pixels having different brightnesses are concentrated in the potential image is found.

【0065】この第四の実施の形態が特徴とする点につ
いて図9を参照して説明する。図9(A)は観測領域内
に断線が存在しない不良品の電位像と良品の電位像の差
像の模式図であり、図9(B)は観測領域内に断線箇所
304を含む不良品の電位像と良品の電位像の模式図で
ある。
The features of the fourth embodiment will be described with reference to FIG. FIG. 9A is a schematic diagram of a difference image between a potential image of a defective product having no disconnection in the observation region and a potential image of a good product, and FIG. 9B is a defective product including a disconnection portion 304 in the observation region. And a potential image of a non-defective product.

【0066】第三の実施の形態での断線検出方法では、
図7(A)と(B)に示す様に、電位像内に3つ以上の
明度を示す領域が存在し、断線箇所と他の領域との識別
はしやすいが、断線箇所の明度が中間明度のため視認性
は良くない。本例における画像処理では、図9(B)に
示す様に断線箇所と直接接続している配線上の領域だけ
が他の領域とは異なる明度で表示されるので、断線箇所
を特定するのに第一の実施の形態よりも短時間で特定す
ることができる。
In the disconnection detecting method according to the third embodiment,
As shown in FIGS. 7A and 7B, there are three or more lightness areas in the potential image, and it is easy to discriminate a broken part from another area. Visibility is not good because of brightness. In the image processing in this example, as shown in FIG. 9 (B), only the area on the wiring directly connected to the disconnection point is displayed with a different brightness from the other areas, so that it is necessary to specify the disconnection point. It can be specified in a shorter time than in the first embodiment.

【0067】本例における断線検出の方法では、差像内
に断線特有の明度である中間明度よりも明るい明度か暗
い明度の画素が一定以上の密度で存在しないか、目視ま
たはソフトウェアによる自動判別を行うことによって、
電位像内に断線特有の明度の画素を発見することができ
る。
In the disconnection detection method according to the present embodiment, whether there is a pixel having a brightness higher or lower than the intermediate brightness, which is the brightness specific to the disconnection, at a density equal to or higher than a certain value in the difference image is visually or automatically determined by software. By doing
It is possible to find a pixel having a brightness specific to the disconnection in the potential image.

【0068】本発明の第五の実施の形態による半導体集
積回路の断線検出方法は、第二〜第四の実施の形態で示
した画像処理を施した結果の差像において、断線以外は
全て中間明度で断線のみが黒または白の明度で表示され
た2枚の画像を作成し、同一画面上に交互に表示するこ
とで断線箇所をより検出しやすくする。
The method for detecting a disconnection in a semiconductor integrated circuit according to the fifth embodiment of the present invention is the same as that of the difference image obtained by performing the image processing shown in the second to fourth embodiments except for the disconnection. By creating two images in which only the disconnection is displayed in black or white in brightness, and alternately displaying them on the same screen, it is possible to more easily detect the disconnection location.

【0069】以下、断線を容易に検出する画像処理法に
ついて図10を用いて説明する。ハッチングを付けてい
る箇所が図8と異なる部分であり、図10はこの第五の
実施の形態における断線検出方法のフローチャートであ
る。
Hereinafter, an image processing method for easily detecting disconnection will be described with reference to FIG. The hatched portions are different from those in FIG. 8, and FIG. 10 is a flowchart of the disconnection detecting method according to the fifth embodiment.

【0070】先ず、不良品と良品の半導体集積回路にお
いて、第四の実施例の形態で記載したステップ200か
ら600までを実行し、差像を基にして断線箇所特有の
中間明度とは異なる明度を持つ画素を全て黒もしくは白
の明度の画素で表示した2枚の画像を作成し(ステップ
800)、その2つの画像内において、明度が中間明度
(灰色)でない画素が一定密度以上で存在する領域の有
無を目視または自動判断するソフトウェアによって判断
する(ステップ801)。
First, steps 200 to 600 described in the fourth embodiment are executed on the defective and good semiconductor integrated circuits, and the brightness different from the intermediate brightness specific to the broken portion is determined based on the difference image. Are created by displaying all the pixels having the color of black or white with pixels of brightness (step 800). In the two images, pixels whose brightness is not intermediate brightness (gray) exist at a certain density or higher. The presence or absence of the area is determined by software that visually or automatically determines (step 801).

【0071】断線に接続した配線がない場合、電子ビー
ムの照射位置を変更し(ステップ223)、ステップ2
00に戻って上記の動作を繰返す。電位像内において、
明度が異なる画素が一定密度以上で存在する領域を発見
するまで探索が続けられることとなる。
When there is no wiring connected to the disconnection, the irradiation position of the electron beam is changed (Step 223), and Step 2 is performed.
Returning to 00, the above operation is repeated. In the potential image,
The search is continued until a region where pixels having different lightness exist at a certain density or higher is found.

【0072】本例が特徴とする点について図11を参照
して説明する。図11(A)は電位像内に断線箇所30
4を含む不良品の模式図である図7(B)と良品の電位
像の模式図である図7(A)の差像において、断線箇所
の明度を最低にした画像の模式図であり、図11(B)
は電位像内に断線箇所304を含む不良品の模式図であ
る図5(B)と良品の電位像の模式図である図5(A)
の差像において断線箇所の明度を最大にした画像の模式
図である。
The features of this embodiment will be described with reference to FIG. FIG. 11A shows a broken portion 30 in the potential image.
FIG. 7B is a schematic diagram of an image in which the brightness of a broken portion is minimized in the difference image between FIG. 7B which is a schematic diagram of a defective product including No. 4 and FIG. 7A which is a schematic diagram of a potential image of a non-defective product; FIG. 11 (B)
5B is a schematic view of a defective product including a broken portion 304 in a potential image, and FIG. 5A is a schematic diagram of a potential image of a non-defective product.
FIG. 5 is a schematic diagram of an image in which the brightness of a broken portion is maximized in the difference image of FIG.

【0073】先ず、不良品である半導体集積回路に対し
て、第二の実施の形態で記載した電位像の取得法を適用
することによって良品と不良品で電位像を表示している
位置座標のずれが最小である電位像を取得した。次に良
品である半導体集積回路に対して第三の実施の形態で記
載した電位像の取得法を適用することによって良品と不
良品で明度分布の差が最小である電位像を取得した。
First, by applying the method of acquiring a potential image described in the second embodiment to a semiconductor integrated circuit which is a defective product, the position coordinates at which the potential image is displayed for a good product and a defective product are determined. A potential image with the smallest deviation was obtained. Next, by applying the method for acquiring a potential image described in the third embodiment to a non-defective semiconductor integrated circuit, a potential image having a minimum difference in brightness distribution between a non-defective product and a defective product was obtained.

【0074】良品と不良品の電位像の画素毎に差を取り
その明度が中間明度でない場合は最大明度または最小明
度に画素の明度を変更することによって、図11(A)
と(B)を作成した。差像内に断線特有の明度である中
間明度よりも明るい明度か暗い明度の画素が一定以上の
密度で存在しないか目視またはソフトウェアによる自動
判別を行うことによって、電位像内に断線特有の明度の
画素を発見することができる。
A difference is calculated for each pixel of the potential image between a good product and a defective product, and when the brightness is not the intermediate brightness, the brightness of the pixel is changed to the maximum brightness or the minimum brightness, thereby obtaining FIG.
And (B). By performing visual or software automatic discrimination by visual or software to determine whether pixels with lighter or darker brightness than the intermediate brightness, which is the specific brightness of the disconnection in the difference image, are present at a certain density or higher, the brightness specific to the disconnection in the potential image is obtained. Pixels can be found.

【0075】先の第四の実施の形態での断線検出方法で
は、図9(B)に示す様に電位像内の明度分布が非常に
中間明度に局在し、断線箇所が下層配線に存在した場
合、他の領域との識別がしにくい。本例における画像処
理では、図11(A)と(B)に示す様に断線箇所30
4と半導体素子に直接接続している配線領域305だけ
が中間明度ではない白と黒の明度で表示されるので、第
四の実施例よりも断線箇所の視認性を向上している。
In the disconnection detecting method according to the fourth embodiment, as shown in FIG. 9B, the brightness distribution in the potential image is very localized at the intermediate brightness, and the broken portion exists in the lower wiring. In such a case, it is difficult to distinguish it from other areas. In the image processing in this example, as shown in FIGS.
Since only the wiring region 305 directly connected to the semiconductor element 4 and the semiconductor element is displayed with white and black lightness other than the intermediate lightness, the visibility of the disconnected portion is improved as compared with the fourth embodiment.

【0076】[0076]

【発明の効果】本発明によれば、信号線と電源線と接地
線夫々の種類に応じてに対して同じ電圧の供給を実施す
れば良く、LSI内部に電位変化を与えるための配線治
具の準備時間は1/以下になる。
According to the present invention, the same voltage can be supplied to each of the signal line, the power supply line, and the ground line, and a wiring jig for giving a potential change inside the LSI can be provided. Preparation time is less than 1 /.

【0077】また、LSI内部の配線に電位変化を与え
るためのLSIテスタが不要であり、更に画面を移動さ
せる毎にレイアウトデータを利用して画像処理演算を行
うための高性能のWSは必要なく、電子ビームテスタを
制御する能力があれば良いので、システムを簡便にでき
る。また、良品と不良品の電位像を別途取得する時間が
短縮でき、短時間で断線箇所が特定化できる。
Further, there is no need for an LSI tester for giving a potential change to the wiring inside the LSI, and there is no need for a high-performance WS for performing an image processing operation using layout data every time the screen is moved. In addition, since it is only necessary to have an ability to control the electron beam tester, the system can be simplified. Further, the time for separately acquiring the potential images of the non-defective product and the defective product can be shortened, and the broken portion can be specified in a short time.

【0078】更に、単に繰返しパルス電圧を印加する方
法によって得られる電位像の比較では、電位変化が生じ
ないため中間明度で表示され視認性の悪い断線箇所を、
逆に断線箇所のみが明度が大きく変化する様に画像処理
を行うことによって容易に断線箇所を検出できる。
Further, in comparison of potential images obtained by simply applying a repetitive pulse voltage, a broken portion which is displayed at intermediate brightness and has poor visibility because no potential change occurs,
Conversely, by performing image processing such that only the disconnection location has a significant change in brightness, the disconnection location can be easily detected.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明にかかるLSIの故障解析装置の一例を
示す構成図(A)、良品と不良品を移動交換する装置の
部分拡大図(B)、印加する電圧の模式図(C)であ
る。
FIG. 1 is a block diagram showing an example of an LSI failure analysis apparatus according to the present invention (A), a partially enlarged view of an apparatus for moving and exchanging non-defective and defective products (B), and a schematic diagram of applied voltage (C). is there.

【図2】第一の実施の形態における断線検出法のアルゴ
リズムを示すフローチャートである。
FIG. 2 is a flowchart illustrating an algorithm of a disconnection detection method according to the first embodiment.

【図3】図1の良品LSI113内の電位像を拡大表示
した模式図(A)、不良品LSI114内の電位像を拡
大表示した断線を含む模式図(B)、断線を含まない模
式図(C)である。
3A is a schematic diagram showing an enlarged potential image in a non-defective LSI 113 shown in FIG. 1, FIG. 3B is a schematic diagram showing an enlarged potential image in a defective LSI 114, and FIG. 3B is a schematic diagram showing no broken line. C).

【図4】第二の実施の形態における断線検出法のアルゴ
リズムを示すフローチャートである。
FIG. 4 is a flowchart illustrating an algorithm of a disconnection detection method according to the second embodiment.

【図5】図3(B)と(C)の不良品の電位像(A)の
良品の電位像と同じ位置座標を示す様に画像処理を施し
た電位像の模式図(B),(C)である。
FIGS. 5A and 5B are schematic diagrams of potential images obtained by performing image processing so as to indicate the same position coordinates as the potential image of a good product in the potential image of a defective product shown in FIGS. 3B and 3C; C).

【図6】第三の実施の形態における断線検出法のアルゴ
リズムを示すフローチャートである。
FIG. 6 is a flowchart illustrating an algorithm of a disconnection detection method according to the third embodiment.

【図7】良品の電位像を不良品の電位像と同じ明度分布
を示す様に画像処理を施した電位像の模式図(A)、電
位像内に断線箇所が存在する不良品の電位像の模式図
(B)である。
FIG. 7A is a schematic diagram of a potential image obtained by performing image processing on a potential image of a non-defective product so as to show the same brightness distribution as that of a defective product, and a potential image of a defective product in which a broken portion exists in the potential image; (B) of FIG.

【図8】第四の実施の形態に用いるアルゴリズムを示す
フローチャートである。
FIG. 8 is a flowchart illustrating an algorithm used in the fourth embodiment.

【図9】図5と図7(A)の差像(A)、図7(A)と
図7(B)の差像(B)である。
9 is a difference image (A) between FIG. 5 and FIG. 7 (A), and a difference image (B) between FIG. 7 (A) and FIG. 7 (B).

【図10】第五の実施の形態における断線検出法のアル
ゴリズムを示すフローチャートである。
FIG. 10 is a flowchart illustrating an algorithm of a disconnection detection method according to the fifth embodiment.

【図11】図7(A)を基にした図5(B)との差像図
9(B)に断線箇所特有の明度の画素を黒で表示する明
度変更を施した模式図(A)、白で表示する明度変更を
施した模式図(B)である。
FIG. 11 is a schematic diagram (A) obtained by changing the brightness of FIG. 9 (B) based on FIG. 7 (A) to that of FIG. FIG. 7B is a schematic diagram (B) in which brightness is changed to be displayed in white.

【符号の説明】[Explanation of symbols]

100 試料LSI 101 SEM 102 電子ビームテスタ 103 パルスジェネレータ 104 定電圧電源 105 良品と不良品の交換器 109 一次電子ビーム 110 電子銃 111 ワークステーション(WS) 112 電位像を表示するディスプレイ 113 良品LSI 114 不良品LSI 118 記憶媒体 REFERENCE SIGNS LIST 100 Sample LSI 101 SEM 102 Electron beam tester 103 Pulse generator 104 Constant voltage power supply 105 Exchanger between good and bad products 109 Primary electron beam 110 Electron gun 111 Workstation (WS) 112 Display showing potential image 113 Good LSI 114 Defective product LSI 118 storage medium

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 CMOS構造の半導体集積回路の信号線
には定電圧を印加し電源線及び接地線には夫々パルス状
電圧を印加しつつ前記半導体集積回路に対して電子ビー
ムを照射し、この照射による二次電子信号を検出して当
該半導体集積回路の配線の電位像を取得してこの電位像
から断線故障検出をなすようにした半導体集積回路の断
線故障検出装置であって、 前記半導体集積回路の良品と不良品とを前記電子ビーム
の照射部に移動交換して各々の前記電位像を取得する手
段と、 前記電位像を同一画面上に交互に表示する手段と、を含
むことを特徴とする半導体集積回路の断線故障検出装
置。
1. A semiconductor integrated circuit having a CMOS structure is irradiated with an electron beam while applying a constant voltage to a signal line and applying a pulsed voltage to a power supply line and a ground line, respectively. A disconnection failure detection device for a semiconductor integrated circuit, wherein a secondary electron signal due to irradiation is detected, a potential image of a wiring of the semiconductor integrated circuit is obtained, and a disconnection failure is detected from the potential image. Means for transferring and exchanging a non-defective product and a defective product of the circuit to the irradiation part of the electron beam to obtain each of the potential images; and a means for alternately displaying the potential images on the same screen. Device for detecting a disconnection failure of a semiconductor integrated circuit.
【請求項2】 CMOS構造の半導体集積回路の信号線
には定電圧を印加し電源線及び接地線には夫々パルス状
電圧を印加しつつ前記半導体集積回路に対して電子ビー
ムを照射し、この照射による二次電子信号を検出して当
該半導体集積回路の配線の電位像を取得してこの電位像
から断線故障検出をなすようにした半導体集積回路の断
線故障検出方法であって、 前記半導体集積回路の良品と不良品とを前記電子ビーム
の照射部に移動交換して各々の前記電位像を取得するス
テップと、 前記電位像の各々を同一画面上に交互に表示するステッ
プと、を含むことを特徴とする半導体集積回路の断線故
障検出方法。
2. A semiconductor integrated circuit having a CMOS structure is irradiated with an electron beam while applying a constant voltage to a signal line and applying a pulse voltage to a power supply line and a ground line, respectively. A method of detecting a disconnection failure of a semiconductor integrated circuit, wherein a secondary electron signal due to irradiation is detected, a potential image of a wiring of the semiconductor integrated circuit is obtained, and a disconnection failure is detected from the potential image. Moving and exchanging a non-defective product and a defective product of the circuit with the electron beam irradiation unit to obtain each of the potential images; and alternately displaying each of the potential images on the same screen. A method for detecting a disconnection failure of a semiconductor integrated circuit, comprising:
【請求項3】 前記電位像の各々の明度差により前記不
良品の断線箇所を検出するようにしたことを特徴とする
請求項2記載の半導体集積回路の断線故障検出方法。
3. The method according to claim 2, wherein a disconnection point of the defective product is detected based on a brightness difference of each of the potential images.
【請求項4】 前記良品及び不良品の前記電子ビームの
被照射領域の差が最小になるように一方の被照射領域を
調整して前記電位像の取得を行うステップを更に含むこ
とを特徴とする請求項2または3記載の半導体集積回路
の断線故障検出方法。
4. The method according to claim 1, further comprising the step of adjusting one of the irradiated areas so as to minimize the difference between the irradiated areas of the non-defective product and the defective product with the electron beam and acquiring the potential image. 4. The method for detecting a disconnection fault of a semiconductor integrated circuit according to claim 2 or 3.
【請求項5】 前記良品及び不良品の電位像の明度差が
最小となるように一方の電位像の明度を調整して前記電
位像の取得を行うステップを更に含むことを特徴とする
請求項2または3記載の半導体集積回路の断線故障検出
方法。
5. The method according to claim 1, further comprising the step of adjusting the brightness of one of the potential images so as to minimize the brightness difference between the potential images of the non-defective product and the defective product and acquiring the potential image. 4. The method for detecting a disconnection failure of a semiconductor integrated circuit according to 2 or 3.
【請求項6】 前記良品及び不良品の電位像の差像を生
成するステップを更に含み、この差像における中間明度
領域の有無により前記不良品の断線箇所を検出するよう
にしたことを特徴とする請求項2〜5いずれか記載の半
導体集積回路の断線故障検出方法。
6. The method according to claim 1, further comprising the step of generating a difference image between the potential images of the non-defective product and the defective product, wherein the disconnection portion of the defective product is detected based on the presence or absence of an intermediate brightness area in the differential image. A method for detecting a disconnection fault in a semiconductor integrated circuit according to claim 2.
【請求項7】 前記良品及び不良品の電位像の差像を生
成するステップと、この差像の明度変更を行うステップ
とを含み、この明度変更された差像により前記不良品の
断線箇所を検出するようにしたことを特徴とする請求項
2〜5いずれか記載の半導体集積回路の断線故障検出方
法。
7. A step of generating a difference image between the potential images of the non-defective product and the defective product, and a step of changing the brightness of the difference image, wherein the broken portion of the defective product is determined by the brightness-changed difference image. 6. The method according to claim 2, wherein the disconnection is detected.
【請求項8】 CMOS構造の半導体集積回路の信号線
には定電圧を印加し電源線及び接地線には夫々パルス状
電圧を印加しつつ前記半導体集積回路に対して電子ビー
ムを照射し、この照射による二次電子信号を検出して当
該半導体集積回路の配線の電位像を取得してこの電位像
から断線故障検出をなすようにした半導体集積回路の断
線故障検出方法をコンピュータにより実行せしめるため
の制御プログラムを記録した記録媒体であって、前記半
導体集積回路の良品と不良品とを前記電子ビームの照射
部に移動交換して各々の前記電位像を取得するステップ
と、前記電位像の各々を同一画面上に交互に表示するス
テップとを含むプログラムを記録した記録媒体。
8. A semiconductor integrated circuit having a CMOS structure is irradiated with an electron beam while applying a constant voltage to a signal line and applying a pulse voltage to a power supply line and a ground line, respectively. A method for detecting a disconnection failure of a semiconductor integrated circuit, in which a secondary electron signal due to irradiation is detected to obtain a potential image of a wiring of the semiconductor integrated circuit, and a disconnection failure is detected from the potential image by a computer. A recording medium on which a control program is recorded, wherein a non-defective product and a defective product of the semiconductor integrated circuit are moved to and exchanged with an electron beam irradiating unit to obtain each of the potential images; and Recording a program including alternately displaying on the same screen.
JP10001259A 1998-01-07 1998-01-07 Device and method for detecting disconnection failure of semiconductor integrated circuit, and recording medium recording control program therefor Expired - Fee Related JP2976423B2 (en)

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JP10001259A JP2976423B2 (en) 1998-01-07 1998-01-07 Device and method for detecting disconnection failure of semiconductor integrated circuit, and recording medium recording control program therefor

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Application Number Priority Date Filing Date Title
JP10001259A JP2976423B2 (en) 1998-01-07 1998-01-07 Device and method for detecting disconnection failure of semiconductor integrated circuit, and recording medium recording control program therefor

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JPH11195684A true JPH11195684A (en) 1999-07-21
JP2976423B2 JP2976423B2 (en) 1999-11-10

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111257729A (en) * 2020-01-22 2020-06-09 中国人民解放军国防科技大学 Multi-channel intermittent disconnection fault parallel test system based on FPGA

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111257729A (en) * 2020-01-22 2020-06-09 中国人民解放军国防科技大学 Multi-channel intermittent disconnection fault parallel test system based on FPGA
CN111257729B (en) * 2020-01-22 2022-03-25 中国人民解放军国防科技大学 Multi-channel intermittent disconnection fault parallel test system based on FPGA

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