JPH11192365A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform display control without being delayed from play control due to a play control means in order to properly proceed play. SOLUTION: Display control command data composed of display control data 0-7 of 8 bytes are transmitted from the play control means at the transmission interval of 4 ms continuously for all the bytes. Concretely, one piece of display control command data is transmitted each time routine reset signals are generated twice while using the routine reset signals to be generated at every 2 ms. Then, strobe signals are outputted synchronously with the respective outputs of the display control data 0-7. When the strobe signal rises, a CPU for display control on a display control board fetches the signals of display control signals CD0-CD7 so as to receive the display control data 0-7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a pachinko game machine,
For gaming machines such as coin gaming machines or slot machines,
In particular, the present invention relates to a gaming machine including a variable display device whose display state can be changed, and in which a predetermined game value can be given when a display result on the variable display device has a predetermined specific display mode.

[0002]

2. Description of the Related Art As a gaming machine, a variable display device having a variable display portion whose display state can be changed is provided, and when a display result of the variable display portion becomes a predetermined specific display mode, a predetermined game is performed. Some are configured to provide value to the player. The game value is a value of a variable winning prize ball device based on the result of a special game such as a symbol change in a special gaming device such as a variable display device provided in a gaming area of a gaming machine. To be in an advantageous state or to generate a right to be in an advantageous state for the player.

[0005] The variable display section is usually configured to display the display results of a plurality of pieces of identification information at different times. The fact that the display result of the variable display unit is a combination of a predetermined specific display mode is usually referred to as a “big hit”. In addition, among the combinations of the display modes of “outside” other than the combination of “big hit”, at a stage where a part of the display results of the plurality of variable display units is not yet derived and displayed, the display result is already derived and displayed. A state in which the display mode of the variable display unit that satisfies the display condition that is a combination of the specific display modes is referred to as “reach”. A player plays a game while enjoying how to generate a jackpot.

[0004] The game progress in the gaming machine is controlled by game control means such as a microcomputer. The identification information, the character image, and the background image displayed on the variable display device are controlled by display control means operating according to display control command data from the game control means.
The identification information, the character image and the background image displayed on the variable display device generally include a display control microcomputer and data from the microcomputer in VRAM.
And a video display processor (VDP) for transferring the data of the VRAM to the variable display device side, but the display control microcomputer has a large program capacity. Therefore, the microcomputer of the game control means having a limited program capacity cannot control the identification information and the like displayed on the variable display device, and a microcomputer for display control is used.

[0005]

As described above, in the conventional gaming machine, display on the variable display device is controlled by display control means different from game control means. Then, the game control means sends display control command data to the display control means in accordance with the game control. Then, the display control by the display control means is started with a delay of the time required for communication of the display control command data and the game control of the game control means. In order for the game to proceed properly, it is desirable that the display control be performed with as little delay as possible with respect to the game control by the game control means.

Accordingly, an object of the present invention is to provide a gaming machine capable of minimizing a delay in the start of display control while reliably performing game control by game control means.

[0007]

A gaming machine according to the present invention comprises:
When the display result of the identification information displayed on the variable display device becomes a predetermined specific display mode, a predetermined game value can be given, and a game control means for controlling the progress of the game is provided. A game control board mounted thereon, and a display control board mounted with a display control means for controlling the display of the variable display device based on display control command data transmitted from the game control means. The progress control of the game is executed by an interrupt process which is activated, and the transmission of the display control command data is performed entirely within one interrupt process in the game control means. Here, the transmission interval of the plurality of data constituting the display control command data may be controlled by a game control microcomputer constituting the game control means. Further, the transmission of the display control command data is configured to be executed once for a plurality of interrupt processes in the game control means. An area for mode setting is provided in the display control command data, and a plurality of types of display control command data may be used depending on the difference in the setting contents of the mode setting area.

[0008]

An embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. 1 is a front view of the pachinko gaming machine 1 as viewed from the front, FIG. 2 is an overall rear view showing the internal structure of the pachinko gaming machine 1, and FIG. 3 is a rear view of the pachinko gaming machine 1 as viewed from the back. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine or a slot machine.

As shown in FIG. 1, the pachinko gaming machine 1 comprises:
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing premium balls overflowing from the hitting ball supply tray 3 and a hitting operation handle 5 for firing a hitting ball are provided. A game board 6 is detachably mounted behind the glass door frame 2. A game area 7 is provided on the front of the game board 6.

In the vicinity of the center of the game area 7, an image display section 9 for variably displaying a plurality of types of symbols and a 7-segment L
A variable display device 8 including a variable display 10 using an ED is provided. In the image display section 9, "left", "middle",
There are three "right" symbol display areas 9a, 9b, 9c, and these symbol display areas 9a, 9b, 9c constitute variable display sections. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. Passage gate 11
Is passed through the ball exit 13 to the starting winning opening 14. In a passage between the passage gate 11 and the ball outlet 13, there is a gate sensor 12 that detects a hit ball that has passed through the passage gate 11. The winning ball that has entered the starting winning port 14 is guided to the back of the game board 6 and detected by the starting port sensor 17. In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14. The variable winning ball device 15 is opened by the solenoid 16. An opening / closing plate 20 that is opened by the solenoid 21 in a specific game state (big hit state) is provided below the variable winning ball device 15. Of the prize balls guided from the opening / closing plate 20 to the back of the game board 6, the prize balls entering one (V zone) are detected by the V count sensor 22, and the prize balls entering the other are detected by the count sensor 23. . At the lower portion of the variable display device 8, a starting winning storage display 18 having four display sections for displaying the number of winning balls entering the starting winning port 14 is provided. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. And
Each time the variable display of the image display unit 9 is started, the number of the lit display units is reduced by one.

The gaming board 6 is provided with a plurality of winning ports 19 and 24. Decorative lamps 25 are provided around the left and right sides of the game area 7 so as to blink during the game.
There is an out port 26 for absorbing a hit ball that does not win. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides outside the game area 7. On the outer periphery of the game area 7, a game effect lamp / LED 28 is provided. In this example, a prize ball lamp 51 that is turned on when a prize ball is paid out is provided in the vicinity of one of the speakers 27, and a ball out lamp 52 that is turned on when a replenishment ball is out in the vicinity of the other speaker 27. Is provided. Furthermore, in FIG. 1, it is installed adjacent to the pachinko gaming table 1,
Also shown is a card unit 50 that enables lending of balls by inserting a prepaid card.

The hit ball fired from the hitting ball launching device enters the game area 7 through the hitting rail, and thereafter, enters the game area 7.
Come down. When a hit ball passes through the passage gate 11 and is detected by the gate sensor 12, the number displayed on the variable display 10 changes to a continuously changing state. Further, when the hit ball enters the start winning opening 14 and is detected by the start opening sensor 17, the symbol in the image display section 9 starts rotating. The rotation of the image in the image display unit 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the state shifts to a big hit gaming state. That is, the opening and closing plate 2
0 is released until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. When a hit ball wins in the specific winning area while the opening and closing plate 20 is being opened and is detected by the V count sensor 22, a continuation right is generated and the opening and closing plate 20 is opened again. The generation of the continuation right is permitted a predetermined number of times (for example, 16 times).

When the combination of images in the image display unit 9 at the time of stoppage is a combination of big hit symbols with probability fluctuation, and the symbol shown on the variable display 10 is a predetermined symbol, then the variable winning ball is set. The device 15 is frequently opened and the probability of the next big hit increases.
That is, the state becomes more advantageous for the player.

Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. On the back of the variable display device 8, as shown in FIG. 2, a prize ball tank 38 is provided above the mechanism plate 36, and when the pachinko gaming machine 1 is installed on the gaming machine installation island, a prize ball is provided from above. Premium ball tank 3
8 is supplied. The prize ball in the prize ball tank 38 reaches the ball payout device through the guide gutter 39.

The mechanism board 36 includes a variable display control unit 29 for controlling the image display device 9 via the relay board 30, a game control board 31 covered with a board case 32 and mounted with a game control microcomputer and the like, A relay board 33 for relaying a signal between the display control unit 29 and the game control board 31, and a prize ball board 37 on which a payout control microcomputer for performing payout control of a prize ball is mounted.
Is installed. Further, the mechanism plate 36 includes a hitting ball firing device 34 for shooting a hitting ball into the game area 7 by using the rotational force of a motor, a speaker 27 and a game effect lamp / LE.
An illumination board 35 for sending a signal to D28 is provided.

As shown in FIG. 3, on the back surface of the game board 6, there is provided a prize-ball collecting cover 40 for guiding the prize-winning balls which have won the prize holes and the prize-ball apparatus along a predetermined prize-winning route. I have. Out of the winning balls guided to the winning ball collecting cover 40, those winning through the opening / closing plate 20 are the ball payout device 9
7 is controlled so as to pay out a relatively large number of prize balls (for example, 15). The winnings through the starting winning opening 14 are controlled so that a ball payout device (not shown in FIG. 3) pays out a relatively small number of prize balls (for example, six). Then, the winnings through the other winning ports 24 and the winning ball device are controlled so that the ball payout device pays out a relatively medium number of prize balls (for example, 10). In order to perform such control, signals from the starting port sensor 17, the V count sensor 22, and the count sensor 23 are sent to the game control board 31. When a signal from each sensor is sent to the game control board 31, a prize ball number signal described later is sent from the game control board 31 to the prize ball board 37.

FIG. 4 shows a game control board (main board) 31.
FIG. 3 is a block diagram showing an example of a circuit configuration in FIG. FIG. 4 also shows a prize ball substrate 37, an illuminated substrate 35, and a display control substrate 80. The main board 31 includes a basic circuit 53 that controls the pachinko gaming machine 1 according to a program, a switch circuit 58 that supplies signals from the gate sensor 12, the starting port sensor 17, the V count sensor 22, and the count sensor 23 to the basic circuit 53. A solenoid circuit 59 for driving a solenoid 16 for opening and closing the variable winning ball device 15 and a solenoid 21 for opening and closing the opening and closing plate 20 in accordance with a command from the basic circuit 53;
A lamp / LED circuit 60 for driving the variable indicator 10 by D and blinking the decoration lamp 25; a prize ball number signal from the basic circuit 53 to the prize ball substrate 37; The basic circuit 53
And a prize ball substrate input / output circuit 61 for inputting the prize ball to the player. The winning is detected by the winning ball detector 99. In this case, the winning ball substrate 37 outputs a winning data signal. The basic circuit 53 gives a prize ball number signal to the prize ball substrate 37 in accordance with a winning data signal from the prize ball substrate 37. For example, when a winning data signal corresponding to the turning on of the starting port sensor 17 is input, the basic circuit 53 outputs “6” to the winning ball number signal and responds to the turning on of the count sensor 23 or the V count sensor 22. When the winning data signal is input, "15" is output as the winning ball number signal. Then, when a winning data signal is input when these sensors are not turned on, "10" is output as the winning ball number signal.

The main board 31 includes an illuminated board 35.
An illumination board command output circuit 62 for transmitting a command from the basic circuit 53 to the display control board 80;
A display device circuit 63 for giving a command or a strobe signal from
A host computer such as a hall management computer receives jackpot information indicating the occurrence of a jackpot, effective starting information indicating the number of winning prize balls used to start image display on the image display unit 9, and probability change information indicating that a probability change has occurred. 1, an information output circuit 64 that outputs an audio signal such as a sound effect in response to a control signal from the basic circuit 53, and an audio signal from the audio synthesis circuit 71 that amplifies the audio signal. Volume amplification circuit 7 applied to speaker 27 shown in FIG.
2 are provided.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 used as a work memory, a CPU 56 for performing a control operation according to the control program, and an I / O port unit 57. The ROM 54 and the RAM 55 may be built in the CPU 56 in some cases.

Further, the main board 31 is provided with an initial reset circuit 65 for resetting the basic circuit 53 when the power is turned on, and a reset pulse is given to the basic circuit 53 periodically (for example, every 2 ms) to control the game. A periodic reset circuit 66 for executing the program again from the beginning;
An address decode circuit 67 that decodes an address signal provided from the basic circuit 53 and outputs a signal for selecting one of the I / O ports in the I / O port unit 57 is provided.

FIG. 5 is a block diagram showing a circuit configuration in the display control board 80 together with a CRT 82 for realizing the image display section 9. The display control board 80 is provided with a display control circuit 81 for controlling image display on the CRT 82. Further, a reset circuit 83 for resetting the display control circuit 81 is provided on the display control board 80.
An oscillation circuit 84 for supplying a clock signal to the display control circuit 81, a character ROM 86 for storing data representing a frequently used image, a VRAM 87 for storing image data generated by the display control circuit 81,
And a frame memory circuit 88 in which image data for one screen is set. The image data in the frame memory circuit 88 is converted into a video signal composed of an RGB color signal and a SYNC signal in synchronism with a predetermined synchronization signal.
And an image is displayed on the CRT 82. The frequently used image data stored in the character ROM 86 is, for example, a person, an animal, or an image composed of characters, graphics, or symbols displayed on the CRT 82.

When a strobe signal is input from the CRT circuit 63 of the main board 31, the display control circuit 81 inputs display control command data from the CRT circuit 63 and recognizes a state indicated by the command data. The display control circuit 81 generates image data to be displayed on the CRT 82 according to the state of the command data. Then, the image data is stored in the VRAM 87.

FIG. 6 is a block diagram showing an example of the configuration of the display control circuit 81. The CRT control circuit 81 includes a display control CPU 91, a VDP 93, and a control data ROM 92 in which control data is stored. The display control CPU 91 reads necessary data from the character ROM 86 according to the display command data from the CRT circuit 63. Then, the display control CPU 9
1 outputs the read data to the VDP 93. VD
P93 generates image data to be displayed on the CRT 82 in accordance with the input data, and
It is stored in M87. Then, the image data in the VRAM 87 is transferred to the frame memory circuit 88. Although not shown in FIG. 5, the display control board 80 and the CRT 8
2, a CRT substrate having a CRT driving circuit for driving the CRT 82 based on a video signal is provided.

FIG. 7 is a circuit diagram showing a portion related to transmission and reception of display control command data in the main board 31 and the display control board 80. FIG. 7 shows an output port 571 for transmitting display control command data and an output port 572 for outputting a strobe signal. In addition,
The output ports 571 and 572 are a part of the I / O port unit 57 shown in FIG.

As shown in FIG. 7, the display control command data is output from the output port 571 of the I / O port unit 57 in the basic circuit 53. Also, the output port 571
A strobe signal is output from bit 7 of output port 572 in synchronization with the output from. The strobe signal is input to an IRQ2 terminal which is an interrupt input terminal of the display control CPU 91. Therefore, the display control CPU 91 sets the IRQ
It is possible to know that the display control command data has been transmitted by the interrupt request of the two terminals. The display control command data is input to a built-in input port of the display control CPU 91. In the interrupt control program in the display control program, display control command data input to the input port is fetched and stored. The display device circuit 63 is for amplifying current of the display control command data and the strobe signal. Hereinafter, the output port 57
1 is called port A and output port 572 is called port B.

FIG. 8 is an explanatory diagram showing interface signals relating to display control command data transmitted from the main board 31 to the display control board 80. As shown in FIG. 8, in this embodiment, the display control command data is
Display control signals CD0 to CD7 are transmitted from the main board 31 to the display control board 80 through eight signal lines. Further, between the main board 31 and the display control board 80, a signal line of a display control signal INT for transmitting a strobe signal, a supply line of + 5V and + 12V serving as a power supply of the display control board 80, and a ground level are provided. Signal lines for supplying are also wired.

FIG. 9 is an explanatory diagram showing the command format of the display control command data. As shown in FIG. 9, the display control command data includes display control data 0 to 7
8 bytes. Each display control data 0
7 are transmitted by the display control signal CDm (m = 0 to 7) shown in FIG. In each of the display control data 0 to 7, a fixed value (communication number) for display control data identification is set in bits 5, 6, and 7, and meaningful data is set in bits 0 to 4.

FIG. 10 is a timing chart showing the output timing of the display control command data. As shown in FIG. 10, the display control command data including the display control data 0 to 7 of 8 bytes is continuously transmitted for all bytes at a transmission interval of 4 ms. Specifically, a periodical reset signal generated every 2 ms from the periodical reset circuit 66 shown in FIG. 4 is used, and one display control command data is transmitted every time the periodical reset signal is generated twice. Then, a strobe signal is output in synchronization with the output of each of the display control data 0 to 7 from the main board 31. Display control board 8
When the strobe signal rises, the display control CPU 91 receives the display control signals CD0 to CD7 to receive the display control data 0 to 7 when the strobe signal rises.

In this embodiment, a value indicating the display control mode is set in bits 0 to 2 of the display control data 0 in the display control command data. Bits 0-2 3
Since bits are used, eight display control modes 0 to 7 can be set. That is, eight types of display control command data can be handled. FIG. 11 and FIG. 12 are explanatory diagrams showing the format of the display control command data in each mode. In each mode, bit 3 of the display control data 0 indicates the color of the background of the variable display unit, and bit 4 indicates the color of the symbol.

For example, the display control command data in the display control mode 0 is used to cause the variable display unit to display an error when an error occurs. Therefore, an error flag is set in the display control data 2 as shown in FIG. The display control command data of the display control mode 1 is:
For example, it is used for a fluctuation stop instruction. Therefore, FIG.
As shown in FIG. 1 (B), the numbers of the left and right middle stop symbols are set in the display control data 1, 3, and 5. The display control command data in the display control mode 2 is used, for example, during symbol fluctuation. Therefore, as shown in FIG. 11 (C), the numbers of the left and right middle display symbols are set in the display control data 1, 3, and 5, and the dot positions of each symbol in the variable display section are displayed in the display control data 2, 4, and 5. 6 is set. Further, data designating various characters to be displayed when the symbol is changed is set in the display control data 7. The display control command data in the display control mode 3 is used, for example, during a reach operation.
Therefore, as shown in FIG. 11D, the numbers of the left and right stop symbols are set in the display control data 1 and 5, the numbers of the middle display symbols are set in the display control data 3, and the middle symbols in the variable display section are displayed. Are set in the display control data 4.

The display control command data in the display control mode 4 is used, for example, for indicating a jackpot display.
As shown in FIG. 12E, the display control data 1 to 7 are not used, but when the display control command data of the display control mode 4 is received, the display control CPU 91 executes the predetermined jackpot display control. Do. The display control command data of the display control mode 5 is used, for example, during an opening interval of the opening / closing plate 20 during the jackpot operation. As shown in FIG. 12F, the numbers of the left and right middle fixed symbols are set in the display control data 1, 3, and 5.
When the display control command data is received, the display control C
The PU 91 performs display control during a predetermined interval period. The display control command data in the display control mode 6 is used, for example, when the opening / closing plate 20 is opened during the jackpot operation. As shown in FIG. 12 (G), the value of the continuation number counter indicating the number of continuation rights, the value of the special winning opening counter indicating the number of prizes won through the opening and closing plate 20, and the jackpot number are the display control data 1, Set to 2,7. The display control command data in the display control mode 7 is used, for example, at the end of the big hit operation. As shown in FIG. 12 (H), the numbers of the left and right fixed symbols are the display control data 1, 3, 5
However, when the display control command data of the display control mode 7 is received, the display control CPU 91 performs a predetermined end-time display control.

Next, the operation will be described. When the power of the pachinko gaming machine 1 is turned on and the reset of the CPU 56 is released, the CPU 56 executes a process as shown in the flowchart of FIG. This process is executed by an interrupt process started every 2 ms by a reset pulse generated by the periodic reset circuit 66, for example. CPU
When 56 is activated, first, a stack setting process for setting a designated address of a stack pointer is performed (step S1). Next, an initialization process is performed (step S2). In the initialization process, the CPU 56
Is determined to include an error, and if an error is included, processing such as initializing the RAM 55 is performed. Then, after performing a process of setting a display control command code sent to the display control board 80 in a predetermined area of the RAM 55 (Step S3), a process of outputting the command code via the output port A is performed (Step S3).
4).

Next, processing for transmitting a predetermined command for LED lighting control to the illuminated board 35 via the output port and the illuminated board command output circuit 62 is performed. Then, a process for transmitting data such as jackpot information, start information, and probability variation information to the hall management computer is performed (data output process: step S5). In addition, various abnormality diagnosis processes are performed by the self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S6).

Next, processing for updating each counter indicating each random number for determination is performed (step S7). In step S7, the CPU 56 counts up (addition of 1) the jackpot determination random number for determining whether or not to make a jackpot and the specific symbol determination random number for determining the combination of symbols at the time of the jackpot. That is, they are the random numbers for determination.

Next, the CPU 56 performs a special symbol process (step S8). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. In the special symbol process, the CPU
56 outputs a control signal to the solenoids 16 and 21 at a predetermined timing via an output port and a solenoid circuit 59, and gives a control signal to the voice synthesis circuit 71 via the output port.

The CPU 56 performs a normal symbol process (step S9). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state. Further, the CPU 56 controls the switch circuit 5
The state of the gate sensor 12, the starting port sensor 17, the count sensor 23, and the V count sensor 22 are input through the input port 8 and the input port, and it is determined whether or not there is a prize for each prize port or prize ball device (step S10). .

The CPU 56 further performs a process of updating the display random number (step S11). That is, count-up (1 addition) of a random number for determining a missing symbol and a reach determination random number for determining whether or not to reach is performed.

Further, the CPU 56 performs a signal process with the award ball substrate 37 (step S12). The winning is detected by the winning ball detector 99. In this case, the winning ball substrate 37 outputs a winning data signal. CPU56
Input the winning data signal through the input port,
The number of winning balls according to the ON / OFF state of each sensor confirmed in step S10 is determined, and the determined result is output to the winning ball substrate 37 via the output port and the winning ball substrate input / output circuit 61 as a winning ball number signal. I do. The payout control microcomputer mounted on the prize ball board 37 drives the ball payout device 97 according to the prize ball number signal.

Thereafter, the CPU 56 repeats the display random number updating process in step S13 until a reset pulse is next given from the periodic reset circuit 66. That is,
One is added to the value of each random number.

FIG. 14 is a flowchart showing the detailed contents of the display control data output process in step S4. In the display control data output process, the CPU 56 first
The value of the transmission counter is cleared (step S21). The transmission counter is a counter for determining which of the display control data 0 to 7 constituting the display control command data is to be transmitted, and takes a value of “0” to “7”. Next, the CPU 56 sets the bit 0 of the output counter to “1”.
Is determined (step S22). The output counter is a counter for determining whether or not to transmit the display control command data.
Is done. For example, in the initialization process of step S2, +
1 is done. Then, the bit 0 value of the output counter becomes 4 m
It becomes "0" every s. In this embodiment, if the value of bit 0 of the output counter is "0", the process of transmitting the display control command data is started, and if it is "1", the transmission process is not performed.

If the value of bit 0 of the output counter is "0", the CPU 56 checks whether or not it is in the high probability state (step S23). In this embodiment, the colors of the symbols are different between the high probability state and the normal state (low probability state). For example, in the display control data setting process of step S3, the symbol color in the high probability state is set as an initial value in the area of the RAM 55 corresponding to the display control data 0. Therefore, when the state is not the high probability state, the data in which the symbol color according to the normal state is set is temporarily stored in a register or the like (step S24).

In this embodiment, each area corresponding to each display control command data of the display control modes 0 to 7 is secured in the RAM 55. Then, meaningful bits (bits 0 to 0) of the display control data 0 to 7 in each area.
In 4), the corresponding data is set in the special symbol process (step S8). Therefore, CPU5
No. 6 designates the head address of the area corresponding to the display control mode to be transmitted now (step S25).
The display control mode to be transmitted is set in the special symbol process in step S8. If the state is not the high probability state, the data in which the symbol color is set is stored at that address (the address where the display control data 0 is stored) (step S2).
6). In the case of the high probability state, since the symbol color has already been set, it is not necessary to set data again.

Next, the CPU 56 inputs the data at the address indicated by the transmission counter in the RAM area corresponding to the display control mode (step S27). Here, since the value of the transmission counter is “0”, the data of the head address of the area, that is, the display control data 0 is input. C
The PU 56 sets the value of the transmission counter in bits 5 to 7 of the data (step S28). As described above, the display control data 0 in which the communication numbers are set in the bits 5 to 7 is completed.

Then, the CPU 56 outputs the created display control data 0 to the port A (see FIG. 7) (step S29). Therefore, the display control data 0 is output as the display control signals CD0 to CD7. Next, the CPU 56
Inputs data from the area of the RAM 55 reserved for data output from the output port B (see FIG. 7) (step S30). The area is prepared so that when bits 0 to 6 of port B are used for other than variable display control, those bits do not change. C
The PU 56 changes only bit 7 of the input data to “1”. That is, the bit corresponding to the display control signal INT is set to "1" (step S31). Then, the data is output to port B (step S32). As a result, the display control signal INT goes high. Bits 0-6 of port B remain unchanged.

Next, only the bit 7 of the data for data output of the output port B is changed to "0". That is, the bit corresponding to the display control signal INT is set to “0” (step S33). Then, the data is output to port B (step S34). As a result, the display control signal IN
T goes low. Bits 0-6 of port B remain unchanged.

With the above control, as shown in FIG. 10, the display control data 0 is applied to the display control signals CD0 to CD0.
The signal is output as a CD 7 and a pulse-like strobe signal is output. Note that step S3 of the CPU 56
The pulse width t1 (see FIG. 10) of the strobe signal is determined by the processing time of steps S2 to S34, and steps S35 and S3 are performed.
6. The output interval t2 (see FIG. 10) of the strobe signal is determined by the processing time of S27 to S31. The pulse width t1 of the strobe signal needs to be long enough to allow the display control CPU 91 to recognize the interruption, but is usually sufficiently secured by the processing time of steps S32 to S34. In the case where the pulse width t1 is short only in the processing time of steps S32 to S34, a delay time may be provided by some processing such as a loop processing by a NOP instruction (no processing instruction). Also, the output interval t2 of the strobe signal needs to be long enough to allow the display control CPU 91 to complete the IRQ2 interrupt processing, but is normally sufficiently secured by the processing time of steps S35, S36, and S27 to S31. Steps S35, S36, S2
In the case where the output interval t2 of the strobe signal is short only by the processing time of 7 to S31, a delay time due to some processing may be provided.

The strobe signal is supplied to the display control CPU 91.
Is input to the IRQ2 terminal, which is the interrupt input terminal of
Accordingly, the display control CPU 91 can know that the display control command data has been transmitted in response to the interrupt request of the IRQ2 terminal. Also, the display control signals CD0 to CD
7 is input to a built-in input port of the display control CPU 91. In the interrupt control program in the display control program, a signal input to the input port is fetched as display control command data and stored.

The CPU 56 increments the value of the transmission counter by one (step S35). Then, it is confirmed whether or not the value of the transmission counter has become "8". If not, the process returns to step S27. In step S27,
Since the data of the address indicated by the transmission counter in the area corresponding to the display control mode is input, the data corresponding to the display control data 1 is input this time. afterwards,
By the processing of steps S28 to S34, the display control data 1 in which the communication number is set is changed to the display control signals CD0 to CD.
7 is output. The above processing is performed until the value of the transmission counter becomes “8”. Transmission counter value is "8"
Then, since the transmission of the display control data 0 to 7 has been completed, the process ends.

As described above, as shown in FIG. 10, the display control command data is stored between the time when the periodic reset signal is generated and the time when the next periodic reset signal is generated. All are transmitted during interrupt processing. Therefore, the CPU 5 constituting the game control means
Display control command data with a minimum delay with respect to the control of FIG.
It is transmitted to U91. In addition, the display control command data transmission process is not performed in all the interrupt processes, but is transmitted every other time.
6, sufficient processing time can be allocated to the other processing. Further, since the lower three bits of the display control data 0 specify the display control mode, a plurality of types of display control command data can be handled. That is, much information can be transmitted to the display control means side. Further, since the communication number is set in the upper 3 bits of each of the display control data 0 to 7, the display control CPU 91
However, it is possible to determine whether the received command is valid using the number. For example, if the received communication numbers are discontinuous, it can be determined that an invalid command has been received.

In this embodiment, the case where the transmission control of the display control command data is performed once for every two interrupt processes by the periodic reset signal of the CPU 56, but one to three or four interrupt processes is performed. The transmission control of the display control command data may be performed once for more interrupt processing, such as for example. In such a case, although the real-time property of the display control command data transmission is slightly inferior, the time allocated to other processing in the CPU 56 can be given a margin. Further, in this embodiment, an example is described in which transmission of display control command data is completed once in one interrupt process, and transmission control of display control command data is performed once for a plurality of interrupt processes. However, even in the case where only one transmission control of the display control command data is performed for a plurality of interrupt processes, there is an effect that the CPU 56 can have a sufficient time allocated to other processes. Occurs.

In each of the above embodiments, the case where the image display unit 9 using the CRT 82 for variably displaying symbols is used has been described, but the case where a variable display device using an LCD is used may be used. Further, the present invention can be applied to a video-type pachinko gaming machine or a slot machine in which the board is entirely composed of video.

[0052]

As described above, according to the present invention, the transmission of the display control command data from the game control board to the display control means is all performed within one interrupt process in the game control means. With this configuration, the control content of the game control means can be promptly transmitted to the display control means, and the game can be properly advanced. The transmission interval of a plurality of data constituting the display control command data is
When controlled by the game control microcomputer, the control content of the game control means can be promptly transmitted to the display control means without complicating the hardware configuration. When the transmission of the display control command data is performed once for a plurality of interrupt processes in the game control means, a sufficient processing time can be allocated to other processes in the game control means. An area for mode setting is provided in the display control command data, and when a configuration is made such that a plurality of types of display control command data can be used depending on the setting contents of the mode setting area, the This information can be transmitted to the display control means.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is an overall rear view showing the internal structure of the pachinko gaming machine.

FIG. 3 is a rear view of the gaming board of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a block diagram showing an example of a circuit configuration in the game control board.

FIG. 5 is a block diagram showing a configuration of a circuit in a display control board.

FIG. 6 is a block diagram illustrating an example of a configuration of a CRT control circuit.

FIG. 7 is a block diagram showing a portion related to display control data transmission / reception on a main board and a display control board.

FIG. 8 is an explanatory diagram showing interface signals related to display control command data transmitted from the main board to the display control board.

FIG. 9 is an explanatory diagram showing a command format of display control command data.

FIG. 10 is a timing chart showing transmission timing of display control command data.

FIG. 11 is an explanatory diagram showing a format of display control command data in each mode.

FIG. 12 is an explanatory diagram showing a format of display control command data in each mode.

FIG. 13 is a flowchart showing the operation of the CPU on the main board.

FIG. 14 is a flowchart showing detailed contents of a display control data output process in step S4 in FIG.

[Explanation of symbols]

 8 Variable display device 9 Image display unit 31 Game control board (main board) 53 Basic circuit 56 CPU 80 Display control board 91 Display control CPU 571, 572 Output port

Claims (5)

[Claims] 1. A variable display device whose display state is changeable, wherein a predetermined game value is given when a display result of identification information displayed on the variable display device has a predetermined specific display mode. A game machine which is capable of controlling a display of the variable display device based on a game control board on which game control means for controlling the progress of a game is mounted, and display control command data transmitted from the game control means. A display control board on which a display control means is mounted, wherein the game control means executes a progress control of the game by interrupt processing periodically started, and the transmission of the display control command data is performed by the game control. A gaming machine characterized in that the processing is performed entirely within one interruption process in the means. 2. The game control means includes a game control microcomputer, and a transmission interval of a plurality of data constituting the display control command data is controlled by the game control microcomputer. Gaming machine. 3. The gaming machine according to claim 1, wherein the transmission of the display control command data is executed once for a plurality of interrupt processes in the game control means. 4. A variable display device whose display state is changeable, wherein a predetermined game value is given when a display result of identification information displayed on the variable display device has a predetermined specific display mode. A game machine which is capable of controlling a display of the variable display device based on a game control board on which game control means for controlling the progress of a game is mounted, and display control command data transmitted from the game control means. A display control board on which a display control means is mounted, wherein the game control means executes a progress control of the game by interrupt processing periodically started, and the transmission of the display control command data is performed by the game control. A gaming machine characterized by being executed once for a plurality of interrupt processes in the means. 5. A display control command data is provided with an area for mode setting, and a plurality of types of display control command data can be used depending on a difference in setting contents of the mode setting area. The gaming machine described.