JPH11186674A - Transmission line board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To carry out wiring which holds electrical symmetry in isometric overall length and prevent increase of radiation noise, by arranging one electric signal path and the other electric signal path linearly symmetrically in a board. SOLUTION: A wiring board 1 is formed of a first signal layer, a second signal layer and a power supply layer, and a ground layer with insulating layers interposing respectively. A plurality of signal lines are wired in a first signal line and a second signal line. A pad 12 whereon a pin 11 of an IC which outputs a differential signal is mounted and a differential signal line 13 are wired in a first signal layer. The differential signal line 13 is arranged a distance 14 apart, wherein differential impedance of + line and - line which form a pair matches to a terminal resistance. It is wired enlarging a clearance linearly symmetrically to a line 15 which is at an equal distance from a pair of signal lines in a connection part of the wiring 13 and the pin 11. Wiring is possible without disturbing electrical symmetry even in a connection part to the pin 11 of a IC by wiring the differential signal line 13 in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a transmission line substrate for performing differential transmission.

[0002]

2. Description of the Related Art In recent years, in a portable personal computer (PC), the screen of a liquid crystal display (LCD) has been increased and the resolution has been increased. In desktop personal computers, liquid crystal displays have come to be used instead of CRT displays in order to save space and power. As the screen size and resolution of the LCD have been increased, the data transfer speed to the LCD has increased, and it has become difficult to transfer data using the conventional signal transfer method.

Therefore, a low-amplitude differential transmission system has been proposed as a system for transmitting a signal at a high speed. The differential transmission system is a system in which two signals of a signal (+ line) and an inverted signal (-line) are generated from one signal and transmitted using two signal lines.

[0004] In this method, since the + line and the-line are electromagnetically coupled, the antenna loop area formed by the signal line and the return current path can be reduced to zero, and compared with the conventional single-ended transmission system. Thus, noise in the differential mode can be reduced, and high-speed transmission can be performed. In this transmission, in order to strengthen the electromagnetic coupling, a twisted pair is generally formed by twisting two wires of a positive wire and a negative wire shown in “Noise Countermeasure Technology, General Technology Publishing, p200”. A cable called is used.

[0005]

When a differential signal is applied to an actual device, it is necessary to ensure electrical equivalence between a signal (+ line) and an inverted signal (-line) in a differential pair. Long, perfectly parallel tracks are required. However, it may be difficult to perform equal-length parallel wiring due to a connection portion with a pin of an IC, a through hole, or a detour of another IC. For example, in the configuration of FIG. Therefore, there is a possibility that a phase difference between the + line and the − line is generated, the electrical symmetry is broken, and radiation noise is increased. In order to make the wiring length equal, a wiring as shown in FIG. 16 is conceivable, but also in this case, there is a possibility that the phase difference occurs at the portion B and the electrical symmetry is broken, so that the radiation noise may increase.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a transmission line substrate for transmitting differential signals, in which wiring having equal lengths and electrical symmetry is provided to prevent an increase in radiation noise.

[0007]

In order to solve the above-mentioned problems, a data transmission circuit in which a line for transmitting two electric signals is a pair of data transmission lines, wherein one of the transmission lines has an electric signal On a board that transmits a differential transmission circuit where the sum of the line voltage and the other transmission line is always constant,
One electric signal path and the other electric signal path are arranged in line symmetry on the substrate.

[0008] In addition, the transmission line substrate is an FPC.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. This embodiment is a case where the present invention is applied to LVDS which is one of the differential transmission systems. FIG.
Shows a model of the LVDS circuit. 190 is an LVDS driver model, 191 is a terminating resistor, and 192 is a differential transmission line. The terminating resistance 191 is 100Ω. Therefore, the differential impedance of the transmission line 192 is set to 100
By setting the resistance to Ω, the impedance of the terminating resistor can be matched with the impedance.

FIG. 1 is a plan view of a wiring board according to the present invention, and FIG. 2 is a view showing a part of a cross section thereof. The wiring board 1 includes a first signal layer 21, a second signal layer 23, a power supply layer 24, and a ground layer 25 with an insulating layer 22 serving as a base interposed therebetween. In this embodiment, a four-layer substrate having two signal layers is used, but any number of layers may be used. Then, the first signal layer 21 and the second signal layer 23
Are provided with a plurality of signal lines 26. Further, on the first signal layer 21, a pad 12 for mounting the pin 11 of the IC for outputting a differential signal and the differential signal line 13 are wired.

The differential signal line 13 is arranged at a distance 14 at which the differential impedance of the paired + and-lines matches the terminating resistance. Then, in the connection portion between the wiring and the pin, the wiring is extended in a line symmetrical manner with respect to the line 15 equidistant from the paired signal line. By arranging the differential signal lines in this way, even the connection portion with the pins of the IC can be laid without breaking the electrical symmetry.

In this embodiment, the differential signal line 13 is bent at a right angle at the connection portion with the pin, and may be formed at any angle.

Furthermore, although the wiring interval 14 is increased at the connection portion with the IC pin 11, the wiring may be narrowed when the pin pitch of the IC is narrow.

Further, in this embodiment, the paired signal lines are wired to the adjacent pins, but the same configuration can be applied to the case where they are not adjacent to each other. FIG. 3 is a plan view of the second embodiment in which the differential signal lines 31 forming a pair are connected to non-adjacent pins. The pair of differential signal lines 31 are arranged symmetrically with respect to the line 34 equidistant from the signal lines.

Further, as shown in FIG.
The pad 42 of the pin 43 between the pins 32 and 33 to which the paired signal is connected is connected to the ground.
Can be connected to ground. FIG. 5 is line 4 of FIG.
4 is a part of the cross section. In this embodiment, the same four-layer board as the first embodiment is used, but any number of layers may be used. The pad 42 is connected to the ground layer 25 via the through-hole plating layer 51. By doing so, the electrical symmetry of the differential signal lines 31 forming a pair is strengthened, and radiation noise can be suppressed.

Next, the third line in which the signal lines are wired in the inner wiring layer
The following shows an example. FIG. 6 is a view seen from above the substrate, and the layer configuration of the substrate is the same as that of FIG. Solid wiring 63
Indicates a pair of signal lines formed in the first wiring layer 21, and a dotted line 61 indicates a pair of signal lines formed in the second wiring layer 23. Wiring 6 in second wiring layer 23
One spacing 64 is the distance at which the differential impedance matches the terminating resistor. Then, it is connected to the pins 16 and 17 of the IC mounted on the first wiring layer 21 through the through holes 62.

However, the wiring 6 in the second wiring layer 23
At one interval 64, the diameter of the through hole or the diameter of the clearance overlaps, so it is necessary to increase the wiring interval 64. At this time, a line 65 equidistant from the wiring 61
The distance between the pins 16 and 17 is increased symmetrically with respect to the pins 16 and 17 via through holes. By doing so, the wiring 61 in the second wiring layer 23 can be connected to the first wiring layer 21 without breaking electrical symmetry, and radiation noise can be suppressed. Although the case where the wiring is connected to the pin has been described, the present invention is not limited to the case where the wiring is connected to the pin, but may be configured when the wiring layer is changed via a through hole.

Next, a fourth embodiment in which the + and-lines forming a pair are wired so as to overlap with different wiring layers in order to strengthen the electrical coupling is shown. 7 is a perspective view, FIG. 8 is a perspective view from above the substrate, and FIGS. 9, 10, 11, 12, and 13 are AA ', BB', CC ', and DD, respectively. ', E-
It is sectional drawing of E '. The wiring board 81 includes at least three signal layers. One of the paired + and-lines (here, the + line) 71 is connected to the second wiring layer 92 and the other (here, the-line).
The line 72 is disposed so as to overlap the third wiring layer 93 (FIG. 1).
3). In order to secure the locations of the through holes 82 and 83, the + line 71 is to the left in FIGS.
No. 2 extends the space to the right by an equal distance from the center line 121 of the wiring. And through-hole plating layers 101 and 102
, Both the + line 71 and the − line 72 are connected to the first wiring layer 91, and the first wiring 91 is connected to the pins 16 and 17 of the IC.

Next, the present invention may be applied to through holes or other I-holes.
A fifth embodiment in which one of the differential signal lines must be bypassed due to C or the like is shown. FIG. 14 is a plan view of the wiring board 1 of the present embodiment. Wiring 131 of signal to be paired
Are formed in parallel at a distance 135 that maintains the differential impedance matching the termination resistance. When the through hole 134 exists on the wiring, as shown in FIG. 14, the wiring 131 of the + line and the − line is line-symmetric with respect to the line 136 passing through the center between the + line and the − line. And make wiring around it.

[0020]

When differential transmission is performed, a pair of + line and-
By arranging lines symmetrically, signals can be transmitted without breaking electrical symmetry, and radiation noise can be reduced. FIG. 21 shows the result of calculation of the radiation noise spectrum of the wiring of FIG. 17 and the wiring of FIG. The layer configuration of the substrate was as shown in FIG. 19, and the signal was set to 250 MHz and the LVDS was used. Radiation noise is smaller when the signal patterns forming a pair are arranged symmetrically (FIG. 18) than when the asymmetric wiring is used.

[Brief description of the drawings]

FIG. 1 is a plan view of a wiring board according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a part of a cross section of a wiring board according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating a wiring board according to a second embodiment.

FIG. 4 is a diagram illustrating a wiring board according to a second embodiment.

FIG. 5 is a sectional view of a wiring board according to a second embodiment.

FIG. 6 is a diagram illustrating a wiring board according to a third embodiment.

FIG. 7 is a diagram illustrating a wiring board according to a third embodiment.

FIG. 8 is a diagram illustrating a wiring board according to a fourth embodiment.

FIG. 9 is a sectional view of a wiring board according to a fourth embodiment.

FIG. 10 is a sectional view of a wiring board according to a fourth embodiment.

FIG. 11 is a sectional view of a wiring board according to a fourth embodiment;

FIG. 12 is a sectional view of a wiring board according to a fourth embodiment;

FIG. 13 is a sectional view of a wiring board according to a fourth embodiment.

FIG. 14 is a plan view of the wiring board 1 of the present embodiment.

FIG. 15 is a diagram showing wiring for differential transmission according to the present invention.

FIG. 16 is a diagram showing wiring for differential transmission according to the present invention.

FIG. 17 is a diagram showing a conventional wiring.

FIG. 18 is a diagram showing a wiring according to the present invention.

FIG. 19 is a sectional view of a substrate according to the present invention.

FIG. 20 is a diagram showing an LVDS model of the present invention.

FIG. 21 is a diagram illustrating an effect of the present invention.

[Description of Signs] 1 ... Wiring board, 11 ... IC pins, 12 ... Pad, 1
3 ... differential signal line, 14 ... wiring interval, 15 ... equidistant from paired signal lines, 16 ... IC pin, 17 ... IC pin, 21 ... first signal layer, 22 ... insulating layer, 23 ... 2nd signal layer, 24 power supply layer, 25 ground layer, 26 signal line, 31 differential signal line forming a pair, 32 pin connecting a pair of signal, 33 connecting a pair of signal Pins, 34: Lines equidistant from the signal line, 41: Through hole, 42: Pad, 43: Intermediate pin of the pin to which the paired signal is connected, 44: Line equidistant from the paired signal line , 51 ... through-hole plating layer, 61
.. A pair of signal wirings formed in the second wiring layer 23, 6
2, through-holes; 63, signal wires forming pairs in the first wiring layer 21; 64, intervals between wires in the second wiring layer; 65, pairs formed in the second wiring layer 23 Lines equidistant from signal wiring, 71 ... + line, 72 ...
-Line, 81 ... wiring board of the fourth embodiment, 82 ...
Through-hole 83, through-hole 91, first wiring layer 92, second wiring layer 93, third wiring layer 101
Through-hole plating layer, 102: Through-hole plating layer, 121: Center line of wiring, 131: Wiring of signal to be paired, 135: Distance to maintain differential impedance matching with terminal resistance, 134: Through-hole,
136: line passing through the center between the + line and the-line, 190 ... L
VDS driver model, 191, terminating resistor, 192 ...
Differential transmission path.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Yokota et al. 810 Shimoimaizumi, Ebina-shi, Kanagawa Prefecture Hitachi Systems Office Systems Division

Claims (3)

[Claims] 1. A data transmission circuit in which a line for transmitting two electric signals has a pair of data transmission lines, wherein the sum of the voltage of one electric signal line and the other transmission line is one of the transmission lines. What is claimed is: 1. A transmission line substrate, comprising: a substrate for transmitting a differential transmission circuit which is always constant, wherein one electric signal path and the other electric signal path are arranged in line symmetry with the substrate. 2. The transmission line board according to claim 1, wherein the transmission line board is made of a flexible printed (FPC) cable. 3. A transmission line substrate for use in an information processing apparatus using the transmission line substrate according to claim 1.