JPH11177134A - Manufacture of semiconductor element, semiconductor, manufacture of light emitting element, and light emitting element - Google Patents

Manufacture of semiconductor element, semiconductor, manufacture of light emitting element, and light emitting element

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Publication number
JPH11177134A
JPH11177134A JP34352497A JP34352497A JPH11177134A JP H11177134 A JPH11177134 A JP H11177134A JP 34352497 A JP34352497 A JP 34352497A JP 34352497 A JP34352497 A JP 34352497A JP H11177134 A JPH11177134 A JP H11177134A
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Japan
Prior art keywords
electrode
layer
semiconductor
type
hydrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34352497A
Other languages
Japanese (ja)
Inventor
Takeshi Yamada
剛 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP34352497A priority Critical patent/JPH11177134A/en
Publication of JPH11177134A publication Critical patent/JPH11177134A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To simplify a complicated process by removing hydrogen immediately below an electrode by performing annealing after an electrode is formed, by forming the electrode as a hydrogen permeating electrode by using Pd and obtaining a good ohmic contact between a metal and a semiconductor by forming an electrode on the cleans surface of GaN which has not been subjected to any high-temperature process, and then, by reducing the number of performing times of high-temperature processes in an element manufacturing process to one time. SOLUTION: After an Si-doped n-type GaN layer 102 is formed to a thickness of 4 μm on a C-face of a sapphire substrate 101 by using an MOCVD device, a GaN film 103 doped with Mg to an impurity concentration of about 1×10<20> cm<-3> is grown on the layer 102 to a thickness of 1 μm. Then a Pd electrode 104 which is a hydrogen permeating electrode is formed to a thickness between 40 Å and 1 μm on the clean surface of a nitride gallium semiconductor before the semiconductor is subjected to annealing which is performed for changing the polarity of the semiconductor to the p-type. Then the semiconductor is annealed for 10-minutes at 700 deg.C in an inert gas atmosphere of nitrogen, argon, etc.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はp型ドーパントをド
ープした窒化ガリウム系化合物半導体のp型化法及び素
子化のプロセスに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for converting a gallium nitride-based compound semiconductor doped with a p-type dopant into a p-type and a process for forming a device.

【0002】[0002]

【従来の技術】従来の窒化ガリウム系化合物半導体発光
素子のプロセスについて簡単に説明する。図4に従来用
いられていたプロセスの概略図を示す。サファイア基板
401上にn型層402、発光層(活性層)403、p
型層404の順にGaN系化合物半導体を成膜した後、
p型ドーパントをドープした層を低抵抗化するために一
回目の熱処理(p型化アニール)を行う。p型ドーパン
トとしてMgなどがドーピングされている窒化ガリウム
系半導体のp型層では、Mgなどのドーパントが成膜の
際、キャリアガスのH2や反応ガスのNH3の水素405
と化合し、電気的に補償されてしまうので、p型層の抵
抗が大きかった。そこで、MgとHを切り離しHをGa
N膜外に放出させてp型層を低抵抗化させなければなら
ず、このp型化アニール工程が必要となるのである。
(図4(a)参照)このp型化アニール工程は通常80
0℃程度の高温で10分程度行われる。その後、RIE
によりn型層を露出させ、n電極407、及びp電極4
06の形成を行ってから2回目の熱処理(アロイ処理)
を実施する。(図4(b)参照)これは、半導体と金属
の合金化を行って、コンタクト抵抗を下げるための工程
である。以上のように素子化に際して計2回の高温プロ
セス(p型化アニール、アロイ処理)が必要であった。
またp型ドーパントをドープした窒化ガリウム系半導体
のp型化アニールを行う際、電極直下はp型ドーパント
であるMgと結合した水素が電極を透過できないため低
抵抗化できないことが知られている。(特開平6−23
2450号公報)このためプロセスの順番としては、上
記のようにp型化アニールの後に、電極形成を行なって
いた。
2. Description of the Related Art The process of a conventional gallium nitride-based compound semiconductor light emitting device will be briefly described. FIG. 4 shows a schematic diagram of a process conventionally used. On a sapphire substrate 401, an n-type layer 402, a light emitting layer (active layer) 403, p
After forming a GaN-based compound semiconductor in the order of the mold layer 404,
A first heat treatment (p-type annealing) is performed to reduce the resistance of the layer doped with the p-type dopant. In a p-type layer of a gallium nitride-based semiconductor doped with Mg or the like as a p-type dopant, when a dopant such as Mg is deposited, H 2 of a carrier gas or hydrogen 405 of NH 3 of a reaction gas is used.
And electrical compensation is provided, so that the resistance of the p-type layer is large. Therefore, H is separated from H by Ga.
The p-type layer must be released outside the N film to lower the resistance, and this p-type annealing step is required.
(See FIG. 4A.) This p-type annealing step is usually 80
This is performed at a high temperature of about 0 ° C. for about 10 minutes. After that, RIE
Exposing the n-type layer, the n-electrode 407 and the p-electrode 4
Second heat treatment after alloy formation (alloy treatment)
Is carried out. (See FIG. 4B.) This is a step for alloying the semiconductor and the metal to lower the contact resistance. As described above, a total of two high-temperature processes (p-type annealing and alloying) were required for device fabrication.
It is also known that when annealing a p-type dopant-doped gallium nitride-based semiconductor into p-type, hydrogen bonded to Mg as a p-type dopant cannot pass through the electrode immediately below the electrode, so that resistance cannot be reduced. (JP-A-6-23
For this reason, in the order of the process, the electrodes are formed after the p-type annealing as described above.

【0003】[0003]

【発明が解決しようとする課題】p型化アニールは通常
700℃以上と高温のプロセスであるため、窒化ガリウ
ム系半導体表面付近の窒素の再蒸発により、上記工程
後、電極形成した場合、良好なオーミック接触が得られ
ないといった問題があった。更に、素子化のプロセスで
2回の高温プロセスが必要であり工程が煩雑になると同
時に、サファイア基板と窒化ガリウム系半導体の格子定
数、熱膨張係数の違いから、高温プロセスを繰り返す事
による膜の膨張と縮小に伴って、半導体層に結晶欠陥、
転位、クラックなどが発生し発光効率が下がるといった
問題があった。本発明は上記問題点を解決する事を目的
とする。
Since the p-type annealing is usually a high temperature process of 700 ° C. or more, the re-evaporation of nitrogen near the surface of the gallium nitride-based semiconductor causes a good electrode formation after the above process. There was a problem that ohmic contact could not be obtained. In addition, two high-temperature processes are required in the device fabrication process, which complicates the process. At the same time, due to the difference in lattice constant and coefficient of thermal expansion between the sapphire substrate and the gallium nitride-based semiconductor, film expansion due to repeated high-temperature processes. Crystal defects in the semiconductor layer,
There has been a problem that dislocations, cracks and the like are generated, and the luminous efficiency is reduced. An object of the present invention is to solve the above problems.

【0004】[0004]

【課題を解決するための手段】本願の請求項1に記載の
半導体素子の製造方法は、p型ドーパントをドープした
高抵抗の窒化ガリウム系化合物半導体表面に、水素透過
性電極を形成し、その後熱処理を行いp型層を得ること
を特徴とする。
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a hydrogen-permeable electrode on a surface of a high-resistance gallium nitride-based compound semiconductor doped with a p-type dopant; A heat treatment is performed to obtain a p-type layer.

【0005】本願の請求項2に記載の半導体素子は、請
求項1に記載の製造方法で作製された半導体素子であ
り、前記水素透過性電極の主要構成材料がPdである事
を特徴とする。
[0005] A semiconductor element according to a second aspect of the present invention is a semiconductor element manufactured by the manufacturing method according to the first aspect, wherein a main constituent material of the hydrogen permeable electrode is Pd. .

【0006】本願の請求項3に記載の半導体素子は、前
記水素透過性電極が2層構造であり、p型ドーパントを
ドープした高抵抗の窒化ガリウム系化合物半導体に接す
る側がPd電極であり、Pd電極の上が金属電極であ
り、該金属電極の厚さが20〜200Åであることを特
徴とする。
According to a third aspect of the present invention, in the semiconductor device, the hydrogen-permeable electrode has a two-layer structure, and a side in contact with a high-resistance gallium nitride-based compound semiconductor doped with a p-type dopant is a Pd electrode; A metal electrode is provided on the electrode, and the thickness of the metal electrode is 20 to 200 mm.

【0007】本願の請求項4に記載の発光素子は、基板
上に窒化物系化合物半導体のn型層、発光層、p型層を
この順に形成し、該p型層上に主要構成材料がPdであ
る水素透過性電極を形成し、該水素透過性電極の一部に
水素を透過しない材料からなる電極パッドを形成し、そ
の後、600℃以上900℃以下の温度で熱アニールを
行うことを特徴とする。
In the light emitting device according to the fourth aspect of the present invention, an n-type layer of a nitride-based compound semiconductor, a light-emitting layer, and a p-type layer are formed in this order on a substrate, and a main constituent material is formed on the p-type layer. Forming a hydrogen-permeable electrode of Pd, forming an electrode pad made of a material that does not transmit hydrogen on a part of the hydrogen-permeable electrode, and then performing thermal annealing at a temperature of 600 ° C. or more and 900 ° C. or less. Features.

【0008】本願の請求項5に記載の発光素子は、請求
項4に記載の製造方法で作製された発光素子であり、前
記水素透過性電極が2層以上で構成されており、p型半
導体に接する側がPd電極であり、該Pd電極上の金属
の膜厚が20〜200Åであり、該Pd電極と該金属の
膜厚の合計膜厚が40〜400Åであることを特徴とす
る。
A light emitting device according to a fifth aspect of the present invention is a light emitting device manufactured by the manufacturing method according to the fourth aspect, wherein the hydrogen permeable electrode is composed of two or more layers, and a p-type semiconductor. Is a Pd electrode, the metal film thickness on the Pd electrode is 20 to 200 °, and the total film thickness of the Pd electrode and the metal film is 40 to 400 °.

【0009】上記に示した製造方法によれば、一回も高
温プロセスも経ていない清浄なGaN表面に電極形成を
行う事ができる。更に、特定の電極を用いることによ
り、その後の電極形成した後のp型化アニールによって
電極直下の水素を透過し低抵抗なp型GaNを形成する
ことができる。また、半導体と電極間でオーミック接触
を得るための熱アニールを兼ねる事ができる。このため
素子化のプロセスに於ける高温プロセスを1回に削減す
ることができる。
According to the above-described manufacturing method, an electrode can be formed on a clean GaN surface which has never undergone a high-temperature process. Further, by using a specific electrode, it is possible to form p-type GaN having low resistance by transmitting hydrogen immediately below the electrode by p-type annealing after forming the electrode. In addition, thermal annealing for obtaining ohmic contact between the semiconductor and the electrode can also be performed. For this reason, the number of high-temperature processes in the device fabrication process can be reduced to one.

【0010】[0010]

【発明の実施の形態】以下、本発明を具体的な実施の形
態に基づいて説明する。 (実施の形態1)図1は、本発明の実施の形態1のGa
N半導体受光素子を示す構造概略図である。101がサ
ファイア基板であり、102がn−GaN層、103が
MgドープGaN層、104が水素透過性電極Pdであ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on specific embodiments. (Embodiment 1) FIG.
FIG. 3 is a schematic structural view showing an N semiconductor light receiving element. 101 is a sapphire substrate, 102 is an n-GaN layer, 103 is a Mg-doped GaN layer, and 104 is a hydrogen permeable electrode Pd.

【0011】先ず、サファイア基板101C面上にMO
CVD装置を用いてSiドープのn−GaN層102を
4μmの膜厚で成長した後、不純物濃度が1×1020
-3程度にMgのドープされたGaN層103を1μm
の膜厚で成長させる。p型化アニールを行う前の清浄な
窒化ガリウム系半導体の表面に、水素透過性電極Pd電
極104を厚さ40Å〜1μmの範囲で形成する。その
後、窒素もしくはアルゴン等の不活性ガス雰囲気中で7
00℃、10分間の熱アニールを行う。この時のPdの
膜厚と、p−GaNの抵抗率の関係をグラフに示したの
が図2の●である。この時Pdが水素透過性電極であ
り、Pd電極直下の窒化ガリウム系半導体中の水素10
5が電極を透過していくため、MgドープGaN層を低
抵抗のp型にする事ができる事が分かった。抵抗率とし
ては、1.2Ω・cmであり、従来の場合と同程度の特
性が得られ、半導体と金属間のコンタクト抵抗も従来の
1×10-2Ω・cm2から3×10-3Ω・cm2に改善し
ており良好なオーミック接触が得られている。この時、
上記に示した膜厚の範囲に於いて、水素透過性電極であ
るPdの膜厚によらず低抵抗なp−GaN膜が得られ
た。40Åより薄い膜厚では、良好なオーミック接触が
得られず、また1μm以上では水素が透過できなくなる
ためMgドープGaN層が低抵抗化できない。
First, an MO was placed on the sapphire substrate 101C.
After the Si-doped n-GaN layer 102 is grown to a thickness of 4 μm using a CVD apparatus, the impurity concentration becomes 1 × 10 20 c.
The GaN layer 103 doped with Mg to about m −3 is 1 μm
It grows with the film thickness of. A hydrogen permeable electrode Pd electrode 104 is formed on the surface of the clean gallium nitride-based semiconductor before the p-type annealing, in a thickness range of 40 ° to 1 μm. Then, in an inert gas atmosphere such as nitrogen or argon,
Thermal annealing is performed at 00 ° C. for 10 minutes. At this time, the relationship between the Pd film thickness and the resistivity of p-GaN is shown by a graph in FIG. At this time, Pd is a hydrogen-permeable electrode, and hydrogen 10 in the gallium nitride-based semiconductor immediately below the Pd electrode.
Since 5 passes through the electrode, it was found that the Mg-doped GaN layer can be made into a low-resistance p-type. The resistivity is 1.2 Ω · cm, and the same characteristics as the conventional case are obtained. The contact resistance between the semiconductor and the metal is also 3 × 10 -3 from the conventional 1 × 10 −2 Ω · cm 2. Ω · cm 2 , and good ohmic contact has been obtained. At this time,
Within the above range of the film thickness, a p-GaN film having a low resistance was obtained irrespective of the film thickness of Pd as the hydrogen permeable electrode. If the film thickness is less than 40 °, good ohmic contact cannot be obtained, and if it is 1 μm or more, hydrogen cannot pass therethrough, so that the resistance of the Mg-doped GaN layer cannot be reduced.

【0012】また、熱アニール温度について400〜1
000℃の範囲で実験を行った。600〜800℃の間
で低抵抗なp−GaNになり、更に金属電極との間でオ
ーミック接触が得られる事が分かった。これにより、熱
アニールを行う前の清浄なp−GaN表面に電極を形成
することができ良好なオーミック接触が得られるように
なった。
The thermal annealing temperature is 400 to 1
The experiment was performed in the range of 000 ° C. It was found that p-GaN with low resistance was obtained between 600 and 800 ° C., and that ohmic contact with the metal electrode was obtained. As a result, an electrode can be formed on a clean p-GaN surface before thermal annealing, and good ohmic contact can be obtained.

【0013】(実施の形態2)本発明の実施の形態2で
用いた試料の構造概略図が図3である。図3に示すよう
にサファイア基板301上にGaNバッファ層302、
n型のGaN層303、n型Al0.1Ga0.9N下部クラ
ッド層304、In0.2Ga0.8N活性層305、薄層p
型Al0.05Ga0.95N蒸発防止層306、p型Al0.1
Ga0.9N上部クラッド層307、p型電極GaNキャ
ップ層308を順次積層する。次にRIBE(反応性イ
オンビームエッチング)によってn型のGaN層303
が露出するまでドライエッチングし、n型のGaN層の
露出した表面の一部にn電極312を形成する。その後
p型電極GaNキャップ層308上の一部に透光性電極
309を形成し、更に透光性電極上の一部にAuの電極
パッド310を形成する。また図中の311はp−Ga
N層中の水素を表している。
Embodiment 2 FIG. 3 is a schematic structural view of a sample used in Embodiment 2 of the present invention. As shown in FIG. 3, a GaN buffer layer 302 is formed on a sapphire substrate 301,
n-type GaN layer 303, n-type Al 0.1 Ga 0.9 N lower cladding layer 304, In 0.2 Ga 0.8 N active layer 305, a thin layer p
Type Al 0.05 Ga 0.95 N evaporation prevention layer 306, p-type Al 0.1
A Ga 0.9 N upper cladding layer 307 and a p-type electrode GaN cap layer 308 are sequentially laminated. Next, an n-type GaN layer 303 is formed by RIBE (reactive ion beam etching).
Is dry-etched until the n-type GaN layer is exposed to form an n-electrode 312 on a part of the exposed surface of the n-type GaN layer. Thereafter, a light-transmitting electrode 309 is formed on a part of the p-type electrode GaN cap layer 308, and an Au electrode pad 310 is formed on a part of the light-transmitting electrode. 311 in the figure is p-Ga
Represents hydrogen in the N layer.

【0014】ここで、素子化プロセスに関して詳細に述
べる。先ずMOCVD装置を用いてH2雰囲気中でサフ
ァイア基板301を1050℃で加熱し、基板の表面処
理を行う。その後、基板温度を500℃まで下げ、Ga
N又はAlNバッファ層302を形成する。この時バッ
ファ層の層厚はGaNであれば250Å、AlNであれ
ば500Åとする。次に基板温度を1020℃まで上げ
てn型のGaN層303を4μm程度成長させ、同じ温
度でn型Al0.1Ga0.9N下部クラッド層304を1μ
m成長させる。次に基板温度を800℃に下げノンドー
プ又はSiドープIn0.2Ga0.8N活性層305を約2
00Åの膜厚で成長させる。次に基板温度をノンドープ
又はSiドープIn0.2Ga0.8N活性層305の成長温
度以上かつp型Al0.1Ga0.9N上部クラッド層307
の成長温度以下である約900℃にて薄層p型Al0.05
Ga0.95N蒸発防止層306を成長させる。その後成長
温度を約1020℃まで上げ、p型Al0.1Ga0.9N上
部クラッド層307を約1μm成長させる。次にp型電
極GaNキャップ層308を約1μm成長させる。この
時薄層p型Al0.05Ga0.95N蒸発防止層306は、基
板温度を1020℃まで上げる間に良質膜となる。その
後、n電極312を形成するため、レジストを塗布して
パターニングを行い成長した半導体層の一部をドライエ
ッチングにより除去してn型のGaN層303を露出さ
せる。Ti、Alの順でn−GaN層上に、各々膜厚3
00Å、8000Åで蒸着しn電極312を形成する。
ついで水素透過性電極Pdを50Åの膜厚で蒸着し透光
性電極309を形成し、更にAuの電極パッド310を
透光性電極309上の一部に8000Åの層厚で形成す
る。
Here, the device forming process will be described in detail. First, the sapphire substrate 301 is heated at 1050 ° C. in an H 2 atmosphere using an MOCVD apparatus to perform a surface treatment on the substrate. Thereafter, the substrate temperature is lowered to 500 ° C., and Ga
An N or AlN buffer layer 302 is formed. At this time, the thickness of the buffer layer is 250 ° for GaN and 500 ° for AlN. Next, the substrate temperature is raised to 1020 ° C., an n-type GaN layer 303 is grown to about 4 μm, and the n-type Al 0.1 Ga 0.9 N lower cladding layer 304 is grown to 1 μm at the same temperature.
m. Next, the substrate temperature is reduced to 800 ° C., and the non-doped or Si-doped In 0.2 Ga 0.8 N active layer 305 is
It is grown to a thickness of 00 °. Next, the substrate temperature is equal to or higher than the growth temperature of the non-doped or Si-doped In 0.2 Ga 0.8 N active layer 305 and the p-type Al 0.1 Ga 0.9 N upper cladding layer 307 is formed.
About 900 ° C. by thin layer p-type Al 0.05 is the growth temperature below
A Ga 0.95 N evaporation prevention layer 306 is grown. Thereafter, the growth temperature is increased to about 1020 ° C., and the p-type Al 0.1 Ga 0.9 N upper cladding layer 307 is grown to about 1 μm. Next, a p-type electrode GaN cap layer 308 is grown to about 1 μm. At this time, the thin p-type Al 0.05 Ga 0.95 N evaporation preventing layer 306 becomes a high quality film while the substrate temperature is raised to 1020 ° C. Thereafter, in order to form the n-electrode 312, a resist is applied and patterned, and a portion of the grown semiconductor layer is removed by dry etching to expose the n-type GaN layer 303. A film thickness of 3 on the n-GaN layer in the order of Ti and Al
An n-electrode 312 is formed by vapor deposition at 00 ° and 8000 °.
Next, a hydrogen-permeable electrode Pd is deposited to a thickness of 50 ° to form a light-transmissive electrode 309, and an Au electrode pad 310 is formed on a part of the light-transmissive electrode 309 with a layer thickness of 8000 °.

【0015】電極形成終了後、窒素もしくはAr等の不
活性ガス中で600〜900℃で1分から30分間熱ア
ニールを行う。この熱アニールは、同時に一度の熱処理
において窒化ガリウム系半導体のp型層の低抵抗p型化
とp電極の低コンタクト抵抗化を実現するものである。
透光性電極の層厚を上記で示した値に制御することによ
り、熱アニールによりMgから切り離されたp−GaN
層中の水素311をGaN膜外に通り抜けさせることが
でき、上部にAu電極パッドがない領域のp型層313
を選択的に低抵抗化する事ができる。Au電極が非常に
厚いため、Au電極直下の窒化ガリウム系半導体内の水
素がAu電極を通り抜けることができず、この部分のp
型層は高抵抗のまま残る。以上のような、プロセス工程
を経ることにより、Au電極パッド直下は高抵抗で、A
uパッドがない透光性電極部分は低抵抗な膜が作製でき
る。最後にダイシングする事によりLEDチップを形成
している。
After the electrodes are formed, thermal annealing is performed in an inert gas such as nitrogen or Ar at 600 to 900 ° C. for 1 to 30 minutes. This thermal annealing realizes a low resistance p-type of the p-type layer of the gallium nitride based semiconductor and a low contact resistance of the p-electrode in one heat treatment at the same time.
By controlling the layer thickness of the translucent electrode to the value shown above, p-GaN separated from Mg by thermal annealing
Hydrogen 311 in the layer can pass outside the GaN film, and the p-type layer 313 in a region where there is no Au electrode pad on the top
Can be selectively reduced. Since the Au electrode is very thick, hydrogen in the gallium nitride-based semiconductor immediately below the Au electrode cannot pass through the Au electrode, and the p
The mold layer remains at a high resistance. Through the above-described process steps, the resistance immediately below the Au electrode pad is high, and A
A low-resistance film can be formed on the translucent electrode portion without the u pad. Finally, an LED chip is formed by dicing.

【0016】ここで、透光性電極部をPd/Auの2層
構造にした場合の、Pd/Au総膜厚とp−GaNの抵
抗率の関係をグラフに示したのが図2の■で表されたグ
ラフである。この場合はPdの膜厚は40Åで一定とし
てあり、Auの膜厚を0から4000Åまで変化させて
いる。Auの厚さが160Åまではp−GaNの抵抗率
は50Ω/cm2程度であり、Auが160Å以下と薄
い状態ではp−GaN中の水素がPd/Au電極を透過
しp−GaNは低抵抗化する事が分かる。しかし、Au
の膜厚が160Åより厚くなるとp−GaNは高抵抗で
ある。Pd上の金属がNi、Ptと異なっても同じよう
な結果がえられた。更にPd/Au電極の800℃、2
0分間の熱アニール後のコンタクト抵抗は1×10-3Ω
・cm2であり、オーミック特性に関しても良好な特性
が得られ、透光性電極をこのように2層化する事で、P
dの高温プロセスにおける酸化といった問題が回避でき
ることが分かった。
FIG. 2 is a graph showing the relationship between the total thickness of Pd / Au and the resistivity of p-GaN when the translucent electrode portion has a two-layer structure of Pd / Au. It is a graph represented by. In this case, the thickness of Pd is constant at 40 °, and the thickness of Au is changed from 0 to 4000 °. When the thickness of Au is up to 160 °, the resistivity of p-GaN is about 50 Ω / cm 2 , and when Au is as thin as 160 ° or less, hydrogen in p-GaN passes through the Pd / Au electrode and p-GaN has a low resistivity. It turns out that it becomes resistance. But Au
When the film thickness is more than 160 °, p-GaN has high resistance. Similar results were obtained even when the metal on Pd was different from Ni and Pt. Further, at 800 ° C. for the Pd / Au electrode,
Contact resistance after thermal annealing for 0 minutes is 1 × 10 -3 Ω
・ Cm 2 , and good ohmic characteristics can be obtained. By forming the light-transmitting electrode in two layers,
It was found that the problem of oxidation in the high temperature process of d can be avoided.

【0017】また、上記の実施形態では、水素透過性電
極の材料としてPdを用いたが、Pdを主成分とし、他
の金属が10%程度の割合で混入させても、同様の効果
が得られることが確かめられた。この場合、反応性の高
い金属(Ti、Mg、Zn、等)をPdに10%程度混
入させることにより、熱処理時のPdと下地であるp型
電極GaNキャップ層308との反応が促進され電極の
密着性が上がる効果が得られた。
In the above embodiment, Pd is used as the material of the hydrogen-permeable electrode. However, the same effect can be obtained even if Pd is used as a main component and other metals are mixed at a ratio of about 10%. It was confirmed that it could be done. In this case, by mixing a highly reactive metal (Ti, Mg, Zn, etc.) into Pd at about 10%, the reaction between Pd and the p-type electrode GaN cap layer 308 as a base during heat treatment is promoted. The effect of increasing the adhesiveness of was obtained.

【0018】上記に述べたようなプロセスを行うことに
より簡単にセルフアライン的に電流狭窄構造を作製する
ことができる。更にp型化アニール処理を行う前に電極
形成を行っているため、表面からの窒素抜け、膜表面の
不純物とのコンタミネーションとうを防ぐことができ電
極の特性が向上する。またこれまで2回必要であった高
温プロセス(p型化アニール、アロイ処理)の工程を1
回で済むようになり、プロセス工程の簡略化と共に膜の
熱によるダメージも軽減する事ができる。
By performing the above-described process, the current confinement structure can be easily manufactured in a self-aligned manner. Further, since the electrodes are formed before the p-type annealing treatment, nitrogen escape from the surface and contamination with impurities on the film surface can be prevented, and the characteristics of the electrodes are improved. In addition, the high-temperature process (p-type annealing, alloying), which has been required twice, has been reduced to one step.
In this case, the number of times can be reduced, and the damage due to the heat of the film can be reduced while simplifying the process steps.

【0019】[0019]

【発明の効果】水素透過性電極であるPdを用いること
により、電極形成後においても電極直下の水素が熱アニ
ールによって抜けるため、一度の高温プロセスを経てい
ない清浄なGaN表面に電極形成を行え、金属と半導体
の間で良好なオーミック接触が得られる。また、素子化
のプロセスにおける高温プロセスを2回から1回に削減
できることから、煩雑なプロセスを簡略化する事がで
き、更に高温プロセスによる膜へのダメージを減少させ
ることができる。更にPd電極を用いた部分と、他の電
極を用いた部分をGaN表面に形成することにより、p
型ドーパントをドープした窒化ガリウム系化合物半導体
層を選択的にp型化する事ができ、例えば電流狭窄構造
等を作り込むことができる。上記で示した水素透過性電
極Pdでなく、ある膜厚以下に薄くした電極を用いた場
合にも、上記で示したような効果が得られる。
By using Pd which is a hydrogen-permeable electrode, hydrogen immediately below the electrode is released by thermal annealing even after the electrode is formed, so that the electrode can be formed on a clean GaN surface that has not undergone a single high-temperature process. Good ohmic contact between metal and semiconductor is obtained. In addition, since the number of high-temperature processes in the device fabrication process can be reduced from two to one, complicated processes can be simplified, and damage to the film due to the high-temperature process can be reduced. Furthermore, by forming a portion using a Pd electrode and a portion using another electrode on the GaN surface,
The gallium nitride-based compound semiconductor layer doped with a type dopant can be selectively made p-type, and for example, a current confinement structure can be formed. The effect as described above can be obtained even when an electrode thinned to a certain film thickness or less is used instead of the hydrogen permeable electrode Pd as described above.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態によるp−GaN上に形
成された水素透過性電極Pdの構造概略図である。
FIG. 1 is a schematic structural diagram of a hydrogen-permeable electrode Pd formed on p-GaN according to an embodiment of the present invention.

【図2】MgドープGaNの熱アニール後の抵抗率とG
aN上に形成された電極の厚さとの関係を表したグラフ
である。
FIG. 2 shows the resistivity and G of Mg-doped GaN after thermal annealing.
5 is a graph showing a relationship with the thickness of an electrode formed on aN.

【図3】本発明の一実施の形態によるLEDの構造概略
図である。
FIG. 3 is a schematic structural view of an LED according to an embodiment of the present invention.

【図4】従来例のLED構造概略図である。FIG. 4 is a schematic view of a conventional LED structure.

【符号の説明】[Explanation of symbols]

101 サファイア基板 102 n−GaN層 103 MgドープされたGaN層 104 Pd電極 105 水素 301 サファイア基板 302 GaNバッファ層 303 n型のGaN層 304 n型Al0.1Ga0.9N下部クラッド層 305 In0.2Ga0.8N活性層 306 薄層p型Al0.05Ga0.95N蒸発防止層 307 p型Al0.1Ga0.9N上部クラッド層 308 p型電極GaNキャップ層 309 透光性電極 310 Auの電極パッド 311 p−GaN層中の水素 312 n電極 313 p型層Reference Signs List 101 sapphire substrate 102 n-GaN layer 103 Mg-doped GaN layer 104 Pd electrode 105 hydrogen 301 sapphire substrate 302 GaN buffer layer 303 n-type GaN layer 304 n-type Al 0.1 Ga 0.9 N lower cladding layer 305 In 0.2 Ga 0.8 N Active layer 306 Thin p-type Al 0.05 Ga 0.95 N evaporation preventing layer 307 p-type Al 0.1 Ga 0.9 N upper cladding layer 308 p-type electrode GaN cap layer 309 translucent electrode 310 Au electrode pad 311 in p-GaN layer Hydrogen 312 n-electrode 313 p-type layer

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 p型ドーパントをドープした高抵抗の窒
化ガリウム系化合物半導体表面に、水素透過性電極を形
成し、その後熱処理を行いp型層を得ることを特徴とす
る半導体素子の製造方法。
1. A method for manufacturing a semiconductor device, comprising: forming a hydrogen-permeable electrode on the surface of a high-resistance gallium nitride-based compound semiconductor doped with a p-type dopant, and then performing heat treatment to obtain a p-type layer.
【請求項2】 請求項1に記載の製造方法で作製された
半導体素子であり、前記水素透過性電極の主要構成材料
がPdである事を特徴とする半導体素子。
2. A semiconductor device manufactured by the manufacturing method according to claim 1, wherein a main constituent material of the hydrogen-permeable electrode is Pd.
【請求項3】 前記水素透過性電極が2層構造であり、
p型ドーパントをドープした高抵抗の窒化ガリウム系化
合物半導体に接する側がPd電極であり、Pd電極の上
が金属電極であり、該金属電極の厚さが20〜200Å
であることを特徴とする請求項2に記載の半導体素子。
3. The hydrogen-permeable electrode has a two-layer structure,
The side in contact with the high-resistance gallium nitride-based compound semiconductor doped with a p-type dopant is a Pd electrode, the upper side of the Pd electrode is a metal electrode, and the thickness of the metal electrode is 20 to 200 °.
The semiconductor device according to claim 2, wherein
【請求項4】 基板上に窒化物系化合物半導体のn型
層、発光層、p型層をこの順に形成し、該p型層上に主
要構成材料がPdである水素透過性電極を形成し、該水
素透過性電極の一部に水素を透過しない材料からなる電
極パッドを形成し、その後、600℃以上900℃以下
の温度で熱アニールを行うことを特徴とする発光素子の
製造方法。
4. An n-type layer of a nitride-based compound semiconductor, a light-emitting layer, and a p-type layer are formed in this order on a substrate, and a hydrogen-permeable electrode whose main constituent material is Pd is formed on the p-type layer. A method of manufacturing a light emitting element, comprising: forming an electrode pad made of a material that does not transmit hydrogen on a part of the hydrogen permeable electrode; and performing thermal annealing at a temperature of 600 ° C. or more and 900 ° C. or less.
【請求項5】 請求項4に記載の製造方法で作製された
発光素子であり、前記水素透過性電極が2層以上で構成
されており、p型半導体に接する側がPd電極であり、
該Pd電極上の金属の膜厚が20〜200Åであり、該
Pd電極と該金属の膜厚の合計膜厚が40〜400Åで
あることを特徴とする発光素子。
5. A light emitting device manufactured by the manufacturing method according to claim 4, wherein the hydrogen permeable electrode is composed of two or more layers, and a side in contact with the p-type semiconductor is a Pd electrode,
A light emitting device, wherein the thickness of the metal on the Pd electrode is 20 to 200 °, and the total thickness of the Pd electrode and the metal is 40 to 400 °.
JP34352497A 1997-12-15 1997-12-15 Manufacture of semiconductor element, semiconductor, manufacture of light emitting element, and light emitting element Pending JPH11177134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34352497A JPH11177134A (en) 1997-12-15 1997-12-15 Manufacture of semiconductor element, semiconductor, manufacture of light emitting element, and light emitting element

Publications (1)

Publication Number Publication Date
JPH11177134A true JPH11177134A (en) 1999-07-02

Family

ID=18362192

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Country Status (1)

Country Link
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