JPH1117626A - Signal distribution with low skew with respect to integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow the integrated circuit to distribute signals and to receive signals, while minimizing signal skew. SOLUTION: An integrated circuit device 10 includes a semiconductor die 14 and an optical signal-emitting diode 18 that communicates an optical signal, such as a clock signal or a trigger signal to each circuit on the die 14. Each circuit is placed on the die and an active device for photosensing performance is provided, which converts the received optical signal into an electrical signal clocking or triggering a local circuit (e.g. a data storage register). A translucent material 20 is used to seal the emitter diode 18 and the die 14. With the above constitution, the signal optically communicated has a vary low skew, and the skew becomes independent of the geometrical configuration of the die 14.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention relates to distributing signals in or to an integrated circuit while minimizing signal skew.
The invention is particularly suitable for distributing signals such as clocks or trigger signals, but is not so limited.

[0002]

2. Description of the Related Art Within an integrated circuit, clock signals are typically distributed throughout the integrated circuit die by metal interconnect layers. However, this has the potential for the metal layer used to distribute the clock signal to be affected by signal path wires in other layers that are located parallel to or across the clock signal wire. There are inherent disadvantages.

[0003] These wires at the other layers capacitively couple with the clock wires, thereby creating a problem by varying the speed at which the clock signal can travel through the die. Propagation delay
y) will be referred to herein as "skew". Skew is very important because it can be very difficult to guarantee that clock pulses reach different parts of the die simultaneously. Skew is one of the factors that can significantly limit the maximum operating speed of an integrated circuit, such that some parts of the integrated circuit behave differently from others due to the large skew of the clock signal. If so, problems can arise.

[0004] Very complex clock signal routing
Even when an algorithm is used, the clock wire always runs close to other wires. By using special routing algorithms, it is possible to predict the capacitive effects of wires located very close to each other. However, these predictions are only valid for DC signal conditions, and if the wire carries a switching signal that has a different effect than the DC line, even for simple circuit configurations. Predicting the actual effects that can occur is even more difficult. As the complexity of integrated circuits increases due to the large number of internal wires, it is difficult to even predict the effects of DC coupling, and to predict the effects of dynamic switching on a time scale in a real design. Is virtually impossible.

The above problems often delay the development and design of integrated circuits and increase development costs. By trying different arrangements of the clock wires and gradually improving, the effects of unpredictable skew can be counteracted.

The present invention has been devised with the above problems in mind.

[0007]

SUMMARY OF THE INVENTION In a broad sense, one aspect of the invention is to communicate signals to and / or within an integrated circuit package using optical means, and / or Or distributing and further converting the optical signals to electronic signals on the integrated circuit die. As used herein, the term "optical" is not limited to visible light, but rather broadly refers to radiation that substantially conforms to the laws of optics.

In this manner, capacitive coupling and other signal interferences associated with traditional interconnect wires can be avoided, and signals can be distributed with minimal signal skew. I do. Only the speed of light (and the switching speed of the circuit elements used to generate and receive the optical signal, which is predictable) limits the signal propagation speed. For example, for a 15 mm die, the achievable skew can be as low as about 50 ps. This is much better than the minimum achievable with conventional distribution wires, which is about 400 ps. Future technologies are expected to require skew less than about 200 ps,
Such skew would be very difficult to achieve using conventional wire technology.

Further, the present invention can be used to distribute signals, such as clocks or trigger signals, to different parts of an integrated circuit die simultaneously, without the same routing and design constraints associated with distribution wires. . This gives die designers greater design flexibility, and furthermore,
Circuits can be placed in relative positions that are not currently considered practical.

The present invention allows for reduced development time and reduced development costs by causing skew across the die in a predictable manner. Furthermore,
By not using metal wires for clock signal distribution, the number of layout steps is reduced, thus further reducing the time required to complete the design.

The optical signal is generated by an optical emitter provided on the die, or provided within an integrated circuit package containing the die, or mounted externally to provide optical input to the package. . The optical signal can be transmitted over substantially the entire surface of the die or over one of the die.
Alternatively, a plurality of predetermined regions are irradiated. Opaque masks can also be used to mask areas of the die that are not intended to receive optical radiation (eg, to reduce unwanted photoelectric effects). If desired, an optical guide (ie, a light guide) can be provided to define a predetermined optical path for the optical signal. Such a guide is provided by a translucent material that can achieve excellent omnidirectional illumination by scattering light and avoid shading effects.

A plurality of emitters can be used to generate a larger optical signal or a plurality of different optical signals.

Each optical signal is directly equal to the signal it represents, and digital pulses (eg, clock pulses) are represented by optical pulses.
The optical signal is encoded by, for example, modulation.

An optical signal can represent a single signal or a plurality of signals. For example, these multiple signals can be multiplexed, or
Having different carrier or modulation frequencies or represented by different emission wavelengths allows individual signals to be separated optically or electronically.

In a preferred embodiment, the optical signal is a clock signal distributed across the die and used to clock a plurality of circuit elements, such as, for example, data storage registers. Each circuit element has or is associated with its own optical receiver. Also,
Multiple elements may be grouped together and receive input from an optical receiver for the group. In this way, signals can be distributed at the die scale using optical methods, and then the signals can be distributed to local circuits using local wires. The circuit can also be used to provide a local clock signal that is different from, but derived from, the optical signal. In this way, the local circuit is driven by a locally generated signal that is synchronized to the optical signal throughout the die.
Can be driven.

In one particular aspect, the present invention provides an integrated circuit device comprising an integrated circuit die and optical means for distributing a clock or trigger signal to different regions of the die.

In another aspect, the invention comprises an integrated circuit die, optical means for distributing optical signals to at least first and second regions of the die, and at or on the first region of the die. A first optical receiver implemented to produce a first electronic signal synchronized with the optical signal;
And a second optical receiver, which is implemented in or on the region and generates a second electronic signal synchronized with the optical signal.

In yet another aspect, the present invention is an optically clockable or triggerable data signal processing circuit, comprising: an optical receiver that receives an optical signal and generates an electronic clock or trigger signal therefrom. An integrated circuit including a data signal processing circuit provided.

In yet another aspect, a method for communicating a signal to an integrated circuit device and / or distributing the signal to a plurality of circuits within the integrated circuit device, wherein the signal is optically communicated; Generating at least one electronic signal in response to reception by a circuit on an integrated circuit die.

In yet another aspect, the invention is a method of distributing a clock or trigger signal to different regions of an integrated circuit die of an integrated circuit device, comprising the step of optically communicating the signal in the integrated circuit device. Provide a way.

[0021]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

Referring to FIGS. 1 and 2, an integrated circuit device 10 has a package base 12 on which an integrated circuit die 14 is placed. In this embodiment, die 14 is placed on a silicon substrate,
In other embodiments, another semiconductor material may be used. In FIG. 1, conventional package terminal pins or balls and the connections between the pins (or balls) and the die have been removed for clarity, but such elements are well known to those skilled in the art. It is. In FIG. 2, the pins are schematically indicated by reference numeral 16.

Device 10 includes upper surface 1 of die 14.
On the side of 4a, but slightly above it, an optical emitter 18 is provided. Emitter 18 is supported by package base 12 and is attached thereto, for example, by an adhesive. Die 14 and emitter 18
Means that the light emitted by the emitter 18 is covered by the translucent encapsulating material 20 and can fall onto the die surface 14a. Emitter 18 is driven by an external signal applied through one or more "clock input" pins 16a of device 10.

With particular reference to FIG. 2, the die 14 includes a plurality of circuit elements 22, but only two are shown. For the purpose of visual clarity, the size of each element has been greatly exaggerated. In that sense, this drawing is purely schematic. Each circuit element 22 includes a phototransistor or photodiode 2
4, including an optical receiver disposed on the die 14 for receiving optical radiation through the upper surface 14a. The optical signal is used as a clock signal for clocking the operation of the circuit element 22.

FIG. 3 shows an example of the circuit element 22. The output from the photodiode 24 is conditional (conditionin).
g) Coupled to the input of circuit 26. Conditioning circuit 26
Is typically coupled to the amplifier 26a with a threshold
olding) circuit 26b to condition the optically received signal. The output from the conditioning circuit 26 represents the available clock signal and the data storage register 28
Provided as a clock input to clock the register.

In this embodiment, the translucent seal 20 functions to scatter light from the emitter 18 so that
The orientation of the emitter 18 is not important. This scattering allows the die to be evenly illuminated and avoids the occurrence of shading that would otherwise result from the inclined position of the emitter 18. The seal 20
Coated with an opaque layer 30 to prevent external radiation from interfering with the optical clock signal. Also, scattering allows light to reach locations on or at the die that are not in a straight line visible from the emitter 18. For example, light penetrates to the active lower layer of die 14 over which some photodiodes 24 are formed, and reaches both sides of the die.

In this embodiment, the emitter 18 is connected to the die 1
4, and symmetrically positioned with respect to the die 14, to reduce signal skew. However, in other embodiments, the emitters can be located at a distance from the die and asymmetrically with respect to the die.

In this embodiment, the emitter 18 is connected to the die 1
4 is installed on almost the same plane as
Height profile has not increased substantially. In addition, the upper region of the device is left open for mounting a heat sink if desired. In another embodiment, the emitter can be located below the upper surface of the die 14 so that the scattering caused by the translucent seal 20 causes the light to expand over the die 14.

In yet another embodiment, the emitter 18 comprises
It can be placed downward above the die 14 (as indicated by the dotted line 32 in FIG. 1). According to such a configuration, signal skew can be further reduced. However, if you want to install a heat sink, it may not be practical.

Emitter 18 may be implemented as a light emitting diode or laser diode, or any other suitable device capable of operating at a desired switching speed. The emitter emits radiation in the visible wavelength range or, for example, in the infrared wavelength range.

The photodiode 24 can be very simply integrated, since all metal oxide semiconductor (MOS) active devices have a photoelectric effect. All that is required to maximize this effect is a different type of layout structure than conventional transistors. To ensure that other MOS devices are not affected by the optical signal, an additional opaque layer can be added over the die during the manufacturing process. Holes are created in the opaque layer to allow light to penetrate into the area of the photodiode. This method is not limited to MOS devices. This is because other semiconductor devices show the same light sensitivity.

It is to be understood that the above description is only illustrative of the presently preferred embodiment, and that many modifications are possible without departing from the principles of the present invention. In particular, the configuration of the package, the arrangement of the optical emitters and receivers, and the dies, etc., may vary with different device configurations and semiconductor implementations.

The present invention, particularly according to the present invention as described in the preferred embodiment, relates to the prior art of using interconnect wires in communicating or distributing signals to an integrated circuit device in an integrated circuit. Much smaller signal skew can be achieved than with the conventional method. Also,
Equally important, the magnitude of the skew is almost independent of the die geometry,
It can be easily predicted. According to the present invention, many problems that limit the operating speed of current integrated circuits can be overcome, and the design time of a new integrated circuit can be significantly reduced.

While the features which may be considered important are identified in the following claims, the applicant hereby assigns any novel features described herein and / or illustrated in the accompanying drawings. And any combination of such features, regardless of whether they are highlighted or not.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of an integrated circuit package.

FIG. 2 is a schematic view of a plane along line II-II in FIG. 1;

FIG. 3 is a circuit diagram of a circuit element implemented on an integrated circuit die.

Claims (23)

[Claims] 1. An integrated circuit device, comprising: an integrated circuit die; and optical means for distributing a clock or trigger signal to different areas of the die. 2. The device of claim 1, wherein the optical means is implemented in or on a first area of the die, the optical means generating a first electronic signal from the optical signal. An optical receiver, and a second optical receiver, implemented in or on a second region of the die, for generating a second electronic signal from the optical signal. A device comprising: 3. An integrated circuit die, optical means for distributing optical signals to at least first and second regions of the die, and implemented in or on the first region of the die. A first optical receiver for producing a first electronic signal synchronized with the optical signal, wherein the first optical receiver is implemented in or on the second region of the die and is synchronized with the optical signal. A second optical receiver for producing a second electronic signal. 4. The device according to claim 2, wherein each of said optical receivers comprises a light-sensitive active semiconductor element. 5. The device according to claim 2, wherein each of said optical receivers is coupled to a data signal processing circuit, said data signal processing circuit comprising: A device that is clockable or triggerable in response to the optical signal received by a receiver. 6. The device according to claim 5, wherein at least one of said data signal processing circuits comprises a data storage register. 7. The device according to claim 1, further comprising an optical emitter for emitting an optical signal to the die. 8. The device according to claim 7, wherein said optical emitter comprises a light emitting diode. 9. The device of claim 7, wherein said optical emitter comprises a laser diode. 10. The device according to claim 7, 8 or 9, wherein the optical emitter comprises a device supporting the die. 11. The device according to claim 7, 8, 9 or 10, wherein the optical emitter is mounted to illuminate the die from one side. device. 12. The device according to any one of claims 7 to 11, wherein said optical emitter comprises:
A device mounted above a surface of the integrated circuit die. 13. The device according to claim 7, wherein said optical emitter comprises:
A device coupled to be driven by a signal applied through one or more external terminals of the integrated circuit device. 14. The device according to any of claims 1 to 13, wherein said optical means comprises: an optically transparent or semi-transparent means for communicating said optical signal to a surface of said die. A device comprising a material. 15. The device according to claim 14, wherein
The device wherein the die is at least partially encapsulated by the transparent or translucent material. 16. The device according to claim 1, wherein the die has an opaque mask having an opening defining an area of the die for receiving the optical signal. A device, characterized in that: 17. An integrated circuit comprising an optically clockable or triggerable data signal processing circuit, said data signal processing circuit receiving an optical signal and generating an electronic clock or trigger signal therefrom. An integrated circuit comprising a dynamic receiver. 18. The integrated circuit according to claim 17, wherein
The integrated circuit according to claim 1, wherein the data signal processing circuit includes a data storage register responsive to the electronic clock or trigger signal. 19. The integrated circuit according to claim 17, further comprising a conditioning circuit receiving the output of the optical receiver and generating a conditioned signal therefrom. 20. The integrated circuit according to claim 19, wherein
The integrated circuit according to claim 1, wherein the conditioning circuit includes a threshold circuit. 21. Communicating a signal to an integrated circuit device.
And / or distributing a signal to a plurality of circuits within an integrated circuit device, the method comprising: optically communicating the signal; and at least one signal responsive to its reception by a circuit on the integrated circuit die. Generating two electronic signals. 22. A method for distributing a clock or trigger signal to different regions of an integrated circuit die of an integrated circuit device, the method comprising optically communicating the signal at the integrated circuit device. . 23. A method and apparatus substantially as herein described with reference to any of the accompanying drawings.