JPH04239759A - Electronic device - Google Patents

Electronic device

Info

Publication number
JPH04239759A
JPH04239759A JP3024062A JP2406291A JPH04239759A JP H04239759 A JPH04239759 A JP H04239759A JP 3024062 A JP3024062 A JP 3024062A JP 2406291 A JP2406291 A JP 2406291A JP H04239759 A JPH04239759 A JP H04239759A
Authority
JP
Japan
Prior art keywords
signal
signals
blocks
light
electronic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3024062A
Other languages
Japanese (ja)
Inventor
Hisanobu Yazawa
矢澤 弥亘
Hiroyuki Kono
浩之 河野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3024062A priority Critical patent/JPH04239759A/en
Publication of JPH04239759A publication Critical patent/JPH04239759A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To eliminate a propagating delay time difference by providing an optical signal processor having a photodetector at each of a plurality of unit circuit blocks to receive an input signal as an optical signal and converting it to an electric signal. CONSTITUTION:When optical input signals 80 in which strong and weak are repeated in an operation clock frequency, are simultaneously emitted on a semiconductor substrate 60, photodetector blocks 15 of unit logical circuit blocks 31, 33 are operated as clock signal generators which output H, L levels in the clock frequency of the signals 80. In this case, since the light simultaneously arrives at photodiodes 16 as its properties, a propagating delay time difference of the clock signals does not occur between the blocks 15. Since the signals 80 are emitted to the entire substrate 60, the signals are not necessarily sent via wirings fixed on the substrate, and the blocks 31, 33 can be disposed at arbitrary positions on the board 60 without considering the lengths of wirings.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は電子装置に関し、特に
電子装置を構成する複数の単位回路ブロックへの入力信
号の供給方法の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to electronic devices, and more particularly to an improvement in a method for supplying input signals to a plurality of unit circuit blocks constituting an electronic device.

【0002】0002

【従来の技術】この発明に関する従来技術の一例を図3
を用いて説明する。一般に1つの電子装置は複数のブロ
ックに分割することができ、図3はこのように回路構成
を分割した従来の電子装置の構成を示している。図にお
いて10はクロック信号を入力するクロック信号入力端
子である。21〜27は上記電子装置を構成する第1〜
第7の単位回路ブロックである。101〜107は上記
入力端子10から各単位回路ブロック21〜27にクロ
ック信号を供給する第1〜第7のクロック信号配線であ
る。ここで、これらのクロック信号配線101〜107
は図に示すように単位回路ブロック1つにつき1つは存
在する。41〜43は上記第1,第3,第7の単位回路
ブロック21,23,27のクロック入力端子以外の端
子である出力端子である。
[Prior Art] An example of the prior art related to this invention is shown in FIG.
Explain using. Generally, one electronic device can be divided into a plurality of blocks, and FIG. 3 shows the configuration of a conventional electronic device in which the circuit configuration is divided in this way. In the figure, 10 is a clock signal input terminal for inputting a clock signal. 21 to 27 are first to second parts constituting the electronic device;
This is the seventh unit circuit block. Reference numerals 101 to 107 indicate first to seventh clock signal wirings that supply clock signals from the input terminal 10 to each unit circuit block 21 to 27. Here, these clock signal wirings 101 to 107
As shown in the figure, one exists for each unit circuit block. 41 to 43 are output terminals other than the clock input terminals of the first, third, and seventh unit circuit blocks 21, 23, and 27.

【0003】このような電子装置では、入力端子10に
供給されたクロック信号は、上記各クロック信号配線1
01〜107を介して各単位回路ブロック21〜27に
供給される。そして各ブロック21〜27では上記クロ
ック信号に基づいて所定の動作を行う。
In such an electronic device, the clock signal supplied to the input terminal 10 is transmitted through each of the clock signal wirings 1 described above.
It is supplied to each unit circuit block 21-27 via 01-107. Each block 21 to 27 performs a predetermined operation based on the clock signal.

【0004】0004

【発明が解決しようとする課題】ところが、一般にクロ
ック信号入力端子10から各単位回路ブロック21〜2
7までのクロック信号配線101〜107はそれぞれそ
の配線長が異なっている。そのため、該配線長の差に起
因して、各クロック信号配線101〜107ではクロッ
ク信号の伝搬遅延時間に差が生じ、各単位回路ブロック
21〜27間での動作タイミングが一致しなくなる。
However, in general, it is difficult to connect the clock signal input terminal 10 to each unit circuit block 21 to 2.
The clock signal wirings 101 to 107 up to 7 have different wiring lengths. Therefore, due to the difference in wiring length, a difference occurs in the propagation delay time of the clock signal in each of the clock signal wirings 101 to 107, and the operation timings of the unit circuit blocks 21 to 27 do not match.

【0005】また各クロック信号配線の長さを概ね等し
くして、各クロック信号配線での伝搬遅延時間差を小さ
くすることも可能であるが、完全に等しくはできない。 また各単位回路ブロックの回路構成等が同一でない場合
、各単位回路ブロックの面積が異なることとなり、この
ため各単位回路ブロックを、これらに対応するクロック
信号配線の長さが等しくなるように配置するのが困難に
なる。さらに配線の抵抗、容量成分、さらに隣接する配
線間の干渉等による波形のなまりや伝搬遅延時間差が発
生するという問題は避けられない。
[0005]Although it is possible to make the lengths of each clock signal wiring approximately equal to reduce the difference in propagation delay time between each clock signal wiring, it is not possible to make them completely equal. Furthermore, if the circuit configurations, etc. of each unit circuit block are not the same, the area of each unit circuit block will be different. Therefore, each unit circuit block should be arranged so that the lengths of the clock signal wirings corresponding to these blocks are equal. becomes difficult. Furthermore, problems such as waveform distortion and propagation delay time differences due to wiring resistance and capacitance components, and interference between adjacent wirings are unavoidable.

【0006】また電子装置では、これを構成する電子回
路に光が入射すると、電子回路の信号値が変化すること
がある。これは光が電子回路の信号の媒体である電子や
陽極のエネルギーに影響を与えるからであるが、上記電
子回路の信号値の変化は電子装置の誤動作を招くことに
もなる。
Furthermore, in an electronic device, when light is incident on the electronic circuit constituting the device, the signal value of the electronic circuit may change. This is because light affects the energy of electrons and anodes that are the signal medium of electronic circuits, but changes in the signal values of electronic circuits can also lead to malfunctions of electronic devices.

【0007】この発明は、上記のような問題を解消する
ためになされたもので、各単位回路ブロックへの信号の
伝搬遅延時間差の発生を、各単位回路ブロックのレイア
ウト上の制約を招くことなく低減することができる電子
装置を提供することを目的とする。
The present invention was made to solve the above-mentioned problems, and it is possible to prevent the occurrence of a difference in signal propagation delay time to each unit circuit block without causing restrictions on the layout of each unit circuit block. It is an object of the present invention to provide an electronic device that can reduce the amount of noise.

【0008】またこの発明は、信号の伝搬遅延時間差の
発生を防止できるだけでなく、光の入射による誤動作の
少ない電子装置を得ることを目的とする。
Another object of the present invention is to provide an electronic device that not only prevents the occurrence of signal propagation delay time differences but also has fewer malfunctions due to the incidence of light.

【0009】[0009]

【課題を解決するための手段】この発明に係る電子装置
は、基板上に形成された複数の単位回路ブロック毎に、
受光素子を有し入力信号を光信号として受けこれを電気
信号に変換する光信号処理部を配置したものである。
[Means for Solving the Problems] An electronic device according to the present invention includes a plurality of unit circuit blocks formed on a substrate.
It is equipped with an optical signal processing section that has a light receiving element and receives an input signal as an optical signal and converts it into an electrical signal.

【0010】またこの発明は、上記電子装置において、
上記基板上の、受光素子の配置部以外の部分を遮光性材
料で遮光したものである。
[0010] Furthermore, the present invention provides the above electronic device, which includes:
A portion of the substrate other than the area where the light-receiving element is arranged is shielded from light by a light-shielding material.

【0011】[0011]

【作用】この発明においては、複数の単位回路ブロック
毎に、入力信号を光信号として受けこれを電気信号に変
換する光信号処理部を配置したから、入力信号を各単位
回路ブロックに直接供給することができ、入力信号を配
線を介して入力端子から各単位回路ブロックまで伝搬す
る必要がなくなる。このため配線長の差,配線間の干渉
や各配線の抵抗,容量成分のばらつきの影響をなくすと
ともに、これらに起因して生ずる伝搬遅延時間差をなく
すことができる。またこれと同時に、電気信号の伝搬用
配線を必要としないので、各単位回路ブロックを、所定
の入力端子等からの配線経路長の差を考慮することなく
、自由に配置することができる。
[Operation] In this invention, since an optical signal processing section that receives an input signal as an optical signal and converts it into an electrical signal is arranged in each of a plurality of unit circuit blocks, the input signal is directly supplied to each unit circuit block. This eliminates the need to propagate the input signal from the input terminal to each unit circuit block via wiring. Therefore, it is possible to eliminate the effects of differences in wiring length, interference between wirings, and variations in resistance and capacitance components of each wiring, and also to eliminate differences in propagation delay times caused by these. At the same time, since there is no need for electrical signal propagation wiring, each unit circuit block can be freely arranged without considering differences in wiring path lengths from predetermined input terminals and the like.

【0012】また、基板上の、受光素子の配置部以外の
部分を遮光したので、受光素子以外の回路部分への光の
入射を防止でき、これにより光の照射による回路の誤動
作を抑制することができる。
[0012] Furthermore, since the portion of the substrate other than the area where the light receiving element is arranged is shielded from light, it is possible to prevent light from entering the circuit portion other than the light receiving element, thereby suppressing malfunction of the circuit due to light irradiation. I can do it.

【0013】[0013]

【実施例】図1は本発明の一実施例による電子装置を説
明するための図であり、図において、61は半導体基板
60上に設けられた半導体回路であり、第1〜第8の単
位論理回路ブロック(単位回路ブロック)31〜38を
有している。該各単位論理回路ブロックは、受光素子ブ
ロック(光信号処理部)15とともに、該受光素子ブロ
ック15の出力をクロック信号として動作する、アンド
ゲート,オアゲート等の論理回路、及びカウンタやメモ
リなどを有している。80は上記半導体基板60の全面
に一括照射され、論理回路の動作クロック周波数に基づ
いて強弱を繰り返す平行な光入力信号である。ここで上
記受光素子ブロック15は該光入力信号80を電気信号
に変換するフォトダイオード(受光素子)16とその光
の強弱に応じて ’H ’レベルと ’L ’レベルを
出力する増幅器17とから構成されている。また51〜
53は所定の単位論理回路ブロック間の配線、41〜4
5は単位論理回路ブロックの出力端子である。
[Embodiment] FIG. 1 is a diagram for explaining an electronic device according to an embodiment of the present invention. In the figure, 61 is a semiconductor circuit provided on a semiconductor substrate 60, and the first to eighth units are It has logic circuit blocks (unit circuit blocks) 31 to 38. Each unit logic circuit block includes a light receiving element block (optical signal processing section) 15, logic circuits such as an AND gate and an OR gate, which operate using the output of the light receiving element block 15 as a clock signal, a counter, a memory, and the like. are doing. Reference numeral 80 denotes a parallel optical input signal that is irradiated onto the entire surface of the semiconductor substrate 60 and repeats its strength and weakness based on the operating clock frequency of the logic circuit. Here, the light-receiving element block 15 includes a photodiode (light-receiving element) 16 that converts the optical input signal 80 into an electrical signal, and an amplifier 17 that outputs 'H' level and 'L' level depending on the strength of the light. It is configured. Also 51~
53 is wiring between predetermined unit logic circuit blocks, 41 to 4;
5 is an output terminal of the unit logic circuit block.

【0014】なお、図では第1の単位論理回路ブロック
31についてのみ受光素子ブロック15の詳細な構成,
つまりフォトダイオード16と増幅器17を示し、その
他の単位論理回路ブロック32〜38については受光素
子ブロックを円形の斜線領域15で示している。
Note that the detailed configuration of the light receiving element block 15 is shown only for the first unit logic circuit block 31 in the figure.
That is, the photodiode 16 and the amplifier 17 are shown, and for the other unit logic circuit blocks 32 to 38, the light receiving element blocks are shown by circular hatched areas 15.

【0015】次に作用効果について説明する。上記動作
クロック周波数で強弱を繰り返す光入力信号80を半導
体基板61上に一括照射すると、各単位論理回路ブロッ
ク31〜38の受光素子ブロック15は上記光入力信号
80の動作クロック周波数で’H ’レベル, ’L 
’レベルを出力するクロック信号発生器として動く。こ
のとき光はその性質として各フォトダイオード16に同
時に到達するので、各受光素子ブロック15間でクロッ
ク信号の伝搬遅延時間差を発生することがない。また半
導体基板60の全体に光入力信号80を照射するように
しているので、信号を半導体基板上に固定した配線でお
くる必要がなく、配線長を考慮することなく各単位論理
回路ブロック31〜38を半導体基板60上の任意の位
置に自由に配置することが可能である。また各単位論理
回路ブロックについてクロック信号配線を設ける必要が
ないため、配線の長さや配線間の干渉や各配線の抵抗,
容量成分のばらつきの影響もない。つまり配線の持つ容
量や抵抗成分の長さの違いからくる信号の劣化や伝搬遅
延時間差の違いを著しく減らすことができる。
Next, the functions and effects will be explained. When the optical input signal 80 which repeats the strength and weakness at the above operating clock frequency is irradiated onto the semiconductor substrate 61 all at once, the light receiving element blocks 15 of each unit logic circuit block 31 to 38 are at the 'H' level at the operating clock frequency of the optical input signal 80. , 'L
'It works as a clock signal generator that outputs the level. At this time, since the light reaches each photodiode 16 at the same time by its nature, no difference in propagation delay time of the clock signal occurs between the respective light receiving element blocks 15. In addition, since the optical input signal 80 is irradiated to the entire semiconductor substrate 60, there is no need to send the signal through fixed wiring on the semiconductor substrate, and each unit logic circuit block 31 to 38 can be connected without considering the wiring length. can be freely placed at any position on the semiconductor substrate 60. In addition, since there is no need to provide clock signal wiring for each unit logic circuit block, there is no need to provide clock signal wiring for each unit logic circuit block.
There is no influence of variations in capacitance components. In other words, it is possible to significantly reduce signal deterioration and differences in propagation delay time differences due to differences in the length of capacitance and resistance components of wiring.

【0016】次に本発明の第2の実施例について説明す
る。図2は本発明の第2の実施例による電子装置の構成
を示す模式図であり、図において、31,32は第1,
第2の単位論理回路ブロック、60は半導体基板、15
は光入力信号80を受け、その光の強弱に応じて ’H
 ’レベルと ’L ’レベルを出力する受光素子ブロ
ックであり、フォトダイオード16と増幅器17とから
なっている。これらは図1で説明した第1の実施例装置
と同一のものである。
Next, a second embodiment of the present invention will be described. FIG. 2 is a schematic diagram showing the configuration of an electronic device according to a second embodiment of the present invention.
a second unit logic circuit block, 60 a semiconductor substrate, 15
receives the optical input signal 80 and outputs 'H' depending on the strength of the light.
This is a light receiving element block that outputs 'level' and 'L' level, and consists of a photodiode 16 and an amplifier 17. These are the same as the device of the first embodiment described in FIG.

【0017】そして、70は半導体基板60上の、各単
位回路ブロック31,32のフォトダイオード16配置
部に対応する部分にのみ開口部71を有する遮光材料で
、上記半導体基板60全面を被覆している。なお理解を
助けるため、図2(b) に図2(a) のIIb−I
Ib線で切断した断面構造を示している。
Reference numeral 70 denotes a light-shielding material having openings 71 only in the portions of the semiconductor substrate 60 corresponding to the photodiode 16 arrangement portions of the respective unit circuit blocks 31 and 32, covering the entire surface of the semiconductor substrate 60. There is. For easier understanding, Figure 2(b) shows IIb-I in Figure 2(a).
A cross-sectional structure taken along line Ib is shown.

【0018】一般に半導体回路に光が入射すると、半導
体回路の信号である電子や陽極の原子を励起し、誤動作
を引き起こすことがあるが、本実施例装置では、上記実
施例の効果に加えて、フォトダイオード16配置部に対
応する部分に開口部71を有する遮光膜により半導体基
板60を被覆しているので、フォトダイオード16の部
分だけ光入力信号80が入射し、他の回路部分への光の
入射が遮断されることとなり、光に起因する半導体回路
61の誤動作を防止できる効果もある。
Generally, when light enters a semiconductor circuit, it excites the electrons and atoms of the anode, which are the signals of the semiconductor circuit, and may cause malfunction, but in addition to the effects of the above-mentioned embodiment, the device of this embodiment has the following effects: Since the semiconductor substrate 60 is covered with a light shielding film having an opening 71 in a portion corresponding to the photodiode 16 arrangement portion, the optical input signal 80 is incident only on the photodiode 16 portion, and light is not transmitted to other circuit portions. The light incident thereon is blocked, which also has the effect of preventing malfunctions of the semiconductor circuit 61 caused by light.

【0019】なお上記各実施例では、光信号を電気信号
に変換する受光素子としてフォトダイオードを示したが
、フォトトランジスタ等の光−電気変換素子を用いても
よい。
In each of the above embodiments, a photodiode is shown as a light receiving element that converts an optical signal into an electrical signal, but a photo-electrical conversion element such as a phototransistor may also be used.

【0020】また上記実施例では、各単位論理回路ブロ
ックに1つの受光素子をオン・チップした半導体回路を
例に挙げて説明したが、各単位論理回路ブロックを、そ
れぞれ1つ又は複数のICなどの電子部品と、1つ又は
複数の光電変換素子とから構成し、その各光電変換素子
に例えば長さの等しい光ファイバ等で光入力信号を入力
するようにしてもよい。
Furthermore, in the above embodiments, each unit logic circuit block has been described as an example of a semiconductor circuit in which one light-receiving element is on-chip. It may be constructed of an electronic component and one or more photoelectric conversion elements, and an optical input signal may be input to each photoelectric conversion element using, for example, an optical fiber having the same length.

【0021】また上記実施例では、強,弱2つのレベル
を持つ光入力信号をディジタルのクロック信号入力とす
る例を示したが、入力信号はクロック入力以外のディジ
タルデータ入力信号でもよく、また入力信号はディジタ
ル信号ではなく光の強弱の変化がアナログ的な信号でも
よく、これをアナログ信号処理回路やアナログディジタ
ル変換回路を有する複数の単位回路ブロックに同一のタ
イミングで供給するようにしてもよい。
Further, in the above embodiment, an example is shown in which an optical input signal having two levels, strong and weak, is used as a digital clock signal input, but the input signal may be a digital data input signal other than a clock input, or the input signal may be a digital data input signal other than a clock input. The signal may not be a digital signal but may be an analog signal that changes the intensity of light, and may be supplied at the same timing to a plurality of unit circuit blocks each having an analog signal processing circuit or an analog-to-digital conversion circuit.

【0022】さらに各受光素子毎に特定の波長のみを透
過するフィルタを設け、あるいは受光素子として特定の
波長の信号に対してのみ動作する光電変換素子を用い、
波長に応じてデータ,つまり強弱のタイミング等を変え
るようにすれば、各単位回路ブロックの受光素子を異な
るタイミングで動作させることができ、また異なるデー
タ,つまり異なる単位論理回路ブロックがそれぞれ必要
とするデータを各単位論理回路ブロックに同時に送るこ
とが可能である。
Furthermore, each light receiving element is provided with a filter that transmits only a specific wavelength, or a photoelectric conversion element that operates only for signals of a specific wavelength is used as the light receiving element,
By changing the data, that is, the timing of strength and weakness, etc., depending on the wavelength, the light receiving elements of each unit circuit block can be operated at different timings, and different data, that is, different unit logic circuit blocks require each. It is possible to send data to each unit logic circuit block simultaneously.

【0023】[0023]

【発明の効果】以上のように本発明に係る電子装置によ
れば、複数の単位回路ブロック毎に、受光素子を有し入
力信号を光信号として受けこれを電気信号に変換する光
信号処理部を配置したので、入力信号を各単位回路ブロ
ックに直接供給することができ、入力信号を配線を介し
て入力端子から各単位回路ブロックまで伝搬する必要が
なくなり、配線長の差,配線間の干渉や各配線の抵抗,
容量成分のばらつきに起因して生ずる伝搬遅延時間差を
なくすことができる効果がある。また、電気信号の伝搬
用配線を必要としないので、各単位回路ブロックを、所
定の入力端子等からの配線経路長の差を考慮することな
く、自由に配置することができる効果がある。
As described above, according to the electronic device according to the present invention, each of a plurality of unit circuit blocks has an optical signal processing section that has a light receiving element and receives an input signal as an optical signal and converts it into an electrical signal. Since the input signal is placed directly into each unit circuit block, there is no need to propagate the input signal from the input terminal to each unit circuit block via wiring, and this eliminates the need for differences in wiring length and interference between wiring. and the resistance of each wiring,
This has the effect of eliminating propagation delay time differences caused by variations in capacitance components. Furthermore, since wiring for propagating electrical signals is not required, each unit circuit block can be freely arranged without considering differences in wiring path lengths from predetermined input terminals and the like.

【0024】また、この発明によれば、上記電子装置に
おいて、基板上の、受光素子の配置部以外の部分を遮光
したので、上記効果に加えて、受光素子以外の回路部分
への光の入射を防止でき、これにより光の照射による回
路の誤動作を抑制することができる効果がある。
Further, according to the present invention, in the above-mentioned electronic device, a portion of the substrate other than the portion where the light-receiving element is arranged is shielded from light. This has the effect of suppressing circuit malfunctions caused by light irradiation.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の第1の実施例による電子装置の構成図
である。
FIG. 1 is a configuration diagram of an electronic device according to a first embodiment of the present invention.

【図2】本発明の第2の実施例による電子装置の構成図
である。
FIG. 2 is a configuration diagram of an electronic device according to a second embodiment of the present invention.

【図3】従来例の電子装置の構成例を示す図である。FIG. 3 is a diagram showing a configuration example of a conventional electronic device.

【符号の説明】[Explanation of symbols]

15                  受光素子ブ
ロック(光信号処理部) 16                  フォトダイ
オード(受光素子)31〜38           
 第1〜第8の単位論理回路ブロック
15 Light receiving element block (optical signal processing section) 16 Photodiode (light receiving element) 31 to 38
1st to 8th unit logic circuit blocks

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  基板上に形成され、所定の入力信号に
基づいて動作する複数の単位回路ブロックを有する電子
装置において、上記単位回路ブロックのそれぞれに、受
光素子を有し上記入力信号を光信号として受けこれを電
気信号に変換する光信号処理部を配設したことを特徴と
する電子装置。
1. An electronic device having a plurality of unit circuit blocks formed on a substrate and operating based on a predetermined input signal, each of the unit circuit blocks having a light receiving element and converting the input signal into an optical signal. What is claimed is: 1. An electronic device comprising: an optical signal processing section that receives signals as signals and converts them into electrical signals.
【請求項2】  上記基板上の、受光素子の配置部以外
の領域を遮光性材料で遮光したことを特徴とする請求項
1記載の電子装置。
2. The electronic device according to claim 1, wherein a region on the substrate other than the area where the light receiving element is arranged is shielded from light by a light shielding material.
JP3024062A 1991-01-22 1991-01-22 Electronic device Pending JPH04239759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3024062A JPH04239759A (en) 1991-01-22 1991-01-22 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3024062A JPH04239759A (en) 1991-01-22 1991-01-22 Electronic device

Publications (1)

Publication Number Publication Date
JPH04239759A true JPH04239759A (en) 1992-08-27

Family

ID=12127960

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3024062A Pending JPH04239759A (en) 1991-01-22 1991-01-22 Electronic device

Country Status (1)

Country Link
JP (1) JPH04239759A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237411A (en) * 2000-02-21 2001-08-31 Sony Corp Optoelectric integrated circuit device
US7863062B2 (en) 2007-05-31 2011-01-04 Sharp Kabushiki Kaisha Semiconductor device with a shielding section to prevent condensation and optical device module having the semiconductor device
US7999284B2 (en) 2007-05-31 2011-08-16 Sharp Kabushiki Kaisha Semiconductor device and optical device module having the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001237411A (en) * 2000-02-21 2001-08-31 Sony Corp Optoelectric integrated circuit device
US7863062B2 (en) 2007-05-31 2011-01-04 Sharp Kabushiki Kaisha Semiconductor device with a shielding section to prevent condensation and optical device module having the semiconductor device
US7999284B2 (en) 2007-05-31 2011-08-16 Sharp Kabushiki Kaisha Semiconductor device and optical device module having the same

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