JPH1117051A - Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor - Google Patents

Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor

Info

Publication number
JPH1117051A
JPH1117051A JP9166397A JP16639797A JPH1117051A JP H1117051 A JPH1117051 A JP H1117051A JP 9166397 A JP9166397 A JP 9166397A JP 16639797 A JP16639797 A JP 16639797A JP H1117051 A JPH1117051 A JP H1117051A
Authority
JP
Japan
Prior art keywords
wiring board
semiconductor element
resin
mounting
adhesive sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9166397A
Other languages
Japanese (ja)
Inventor
Toshiyuki Iijima
利行 飯島
Hiroshi Sakai
広志 酒井
Yoshihiro Nakamura
吉宏 中村
Akira Murai
曜 村井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP9166397A priority Critical patent/JPH1117051A/en
Publication of JPH1117051A publication Critical patent/JPH1117051A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a multi-layered wiring board for mounting of a semiconductor element, in which an adhesion sheet is disposed between a base wiring substrate and a bored wiring substrate to form a laminate, the laminate is disposed between end plates and then hot-pressed, thereby suppressing flow-out of resin from the adhesion sheet. SOLUTION: In the method for manufacturing a multi-layered wiring board for mounting of a semiconductor element, in which a base wiring substrate 11, bored wiring substrates 13 having cavity hole 12 and an adhesion sheet 15 disposed therebetween are stacked and hot-pressed to form a laminate, the adhesion sheet 15 is 0% in its resin flow-out percentage at 170 deg.C and 1-5% at 200 deg.C, and the laminate is hot-pressed and molded at a temperature of 180-250 deg.C under a pressure of 10-20 Mpa.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子搭載用
多層配線板の製造方法及び半導体素子搭載用多層配線板
製造用接着シートの製造方法に関する。
The present invention relates to a method for manufacturing a multilayer wiring board for mounting a semiconductor element and a method for manufacturing an adhesive sheet for manufacturing a multilayer wiring board for mounting a semiconductor element.

【0002】[0002]

【従来の技術】一般に、キャビティー仕様BGA又はキ
ャビティー仕様PGAと称されている半導体素子搭載用
パッケージは、半導体素子を搭載するためのキャビティ
ー22を有する多層配線板21である(図2参照)。こ
のようなキャビティー22を有する多層配線板21は、
ベース配線板11の上に、キャビティー用穴12を設け
た2枚の穴あき配線板13を、シート状の接着材料にキ
ャビティー用穴14を設けて得られた接着シート15を
介して重ね、2枚の鏡板16の間に挿んで加熱加圧する
ことにより積層成形して製造されていた(図1参照)。
なお、図1及び図2は、穴あき配線板13を2枚重ねと
して、ワイヤボンディング用の段部23を形成した例を
示す。キャビティー22内には、半導体素子と回路配線
とを接続するための端子となる回路が露出している。こ
のため、シート状の接着材料としては、加熱加圧すると
き、樹脂がキャビティー22内に流出しないように、樹
脂流出が小さい材料が使用されていた。
2. Description of the Related Art Generally, a package for mounting a semiconductor element called a cavity specification BGA or a cavity specification PGA is a multilayer wiring board 21 having a cavity 22 for mounting a semiconductor element (see FIG. 2). ). The multilayer wiring board 21 having such a cavity 22 is
On the base wiring board 11, two perforated wiring boards 13 provided with holes 12 for cavities are laminated via an adhesive sheet 15 obtained by providing holes 14 for cavities in a sheet-like adhesive material. It was manufactured by being laminated between two end plates 16 by applying heat and pressure (see FIG. 1).
1 and 2 show an example in which two perforated wiring boards 13 are stacked to form a step portion 23 for wire bonding. In the cavity 22, a circuit serving as a terminal for connecting the semiconductor element and the circuit wiring is exposed. For this reason, as the sheet-like adhesive material, a material with a small resin outflow has been used so that the resin does not flow into the cavity 22 when heated and pressed.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、このよ
うに樹脂流れの小さい材料を用いても、キャビティー2
2内への樹脂流出を皆無とすることはできなかった。キ
ャビティー22内に樹脂が流出すると、キャビティー2
2内に露出している回路の一部を覆ってしまい、その部
分については、半導体素子との接続に使用することがで
きない。このため、従来は、樹脂流出をある程度見込ん
でキャビティー22の寸法を半導体素子の搭載に必要な
大きさより大きめにする必要があり、小型化の障害とな
っていた。このような樹脂流出があると板厚精度低下の
原因ともなる。本発明の目的は、キャビティー22内へ
の樹脂流出をより少なくできる半導体素子搭載用多層配
線板の製造方法を提供すること、及び、半導体素子搭載
用多層配線板を製造するときにキャビティー22内への
樹脂流出をより少なくできる接着シートの製造方法を提
供することにある。
However, even if a material having a small resin flow is used as described above, the cavity 2 can be used.
It was not possible to eliminate the outflow of resin into 2. When the resin flows into the cavity 22, the cavity 2
2 covers a part of the circuit exposed inside, and that part cannot be used for connection with the semiconductor element. For this reason, conventionally, it is necessary to make the size of the cavity 22 larger than the size required for mounting the semiconductor element in consideration of resin outflow to some extent, which has been an obstacle to miniaturization. Such resin outflow may cause a reduction in plate thickness accuracy. SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a multilayer wiring board for mounting a semiconductor element, which can reduce resin outflow into the cavity 22, and to provide a method of manufacturing the multilayer wiring board for mounting a semiconductor element. It is an object of the present invention to provide a method of manufacturing an adhesive sheet which can reduce resin outflow into the inside.

【0004】[0004]

【課題を解決するための手段】請求項1に記載の発明
は、ベース配線板11及び半導体素子搭載用のキャビテ
ィー用穴12を設けた穴あき配線板13を、キャビティ
ー用穴14を設けた接着シート15を介して重ね、加熱
加圧して積層する半導体素子搭載用多層配線板の製造方
法において、樹脂流れが、170℃において0%であり
かつ200℃において1〜5%である接着シート15を
用い、温度180〜250℃、圧力10〜20MPaで
加熱加圧することにより積層成形することを特徴とする
半導体素子搭載用多層配線板の製造方法である。
According to the first aspect of the present invention, a perforated wiring board 13 provided with a base wiring board 11 and a cavity hole 12 for mounting a semiconductor element, and a cavity hole 14 provided with a cavity hole 14 are provided. The resin flow is 0% at 170 ° C. and 1 to 5% at 200 ° C. in a method for manufacturing a multilayer wiring board for mounting a semiconductor element, wherein the resin flow is 0% at 170 ° C. and 1 to 5% at 200 ° C. 15 is a method for producing a multilayer wiring board for mounting a semiconductor element, wherein the laminate is molded by heating and pressing at a temperature of 180 to 250 ° C. and a pressure of 10 to 20 MPa.

【0005】ここで、樹脂流れとは、式数1の(1)に
より求められる数値である。
Here, the resin flow is a numerical value obtained by equation (1).

【数1】 樹脂流れ(%)=100×(W0 −2W1 )/W0 (1) ただし、W0 は、100×100mmの大きさに切り取
った試料4枚の重量であり、W1 は、前記4枚の試料を
重ね、所定の温度(前記170℃又は200℃)におい
て、圧力1.372MPaで10分間加熱加圧した後、
直径81mmの円板状に打ち抜いて得られる円板の重量
である。
[Number 1] Resin flow (%) = 100 × (W 0 -2W 1) / W 0 (1) However, W 0 is the sample four weight cut to a size of 100 × 100 mm, W 1 After heating the four samples at a predetermined temperature (170 ° C. or 200 ° C.) at a pressure of 1.372 MPa for 10 minutes,
It is the weight of a disk obtained by punching into a disk having a diameter of 81 mm.

【0006】本発明では、170℃における樹脂流れが
0%とされ、それよりも高い200℃における樹脂流れ
を1〜5%とした樹脂流れが小さい接着シートを用い
る。170℃における樹脂流れが0%を超えるとキャビ
ティー内の樹脂流出を抑えることができない。200℃
における樹脂流れが1%未満であると、積層成形におい
て、回路間の凹みを埋めることができず、5%を超える
とキャビティー22内への樹脂流出をなくすことができ
ない。このことから、200℃における樹脂流れは、3
〜5%であるのがより好ましい。
In the present invention, an adhesive sheet is used in which the resin flow at 170 ° C. is 0% and the resin flow at 200 ° C. which is higher than 1% is 1 to 5%. If the resin flow at 170 ° C. exceeds 0%, it is impossible to suppress the resin outflow in the cavity. 200 ° C
If the resin flow is less than 1%, the dent between the circuits cannot be filled in the lamination molding, and if it exceeds 5%, the resin cannot flow out into the cavity 22. From this, the resin flow at 200 ° C. is 3
More preferably, it is 55%.

【0007】接着シート15として樹脂流れが小さいも
のを用いることから、積層成形するとき、温度180〜
250℃、圧力10〜20MPaで加熱加圧する必要が
ある。積層成形するときの温度が180℃未満である
と、接着強度が不足し、250℃を超えると樹脂が劣化
してしまう。また、積層成形するときの圧力が10MP
a未満であると、接着強度が不足し、20MPaを超え
ると、接着シートに亀裂を生ずることがあるので好まし
くない。このことから、積層成形するとき、温度は19
0〜210℃、圧力15〜18MPaで加熱加圧するの
がより好ましい。
[0007] Since the resin sheet having a small resin flow is used as the adhesive sheet 15, the temperature of the adhesive sheet 15 is not higher than 180 ° C.
It is necessary to heat and press at 250 ° C. and a pressure of 10 to 20 MPa. If the temperature at the time of laminating is less than 180 ° C., the adhesive strength is insufficient, and if it exceeds 250 ° C., the resin is deteriorated. In addition, the pressure at the time of lamination molding is
If it is less than a, the adhesive strength is insufficient, and if it exceeds 20 MPa, the adhesive sheet may be cracked, which is not preferable. From this, when lamination molding, the temperature is 19
It is more preferable to heat and press at a temperature of 0 to 210 ° C. and a pressure of 15 to 18 MPa.

【0008】シート状接着材料は硬化を進めることによ
り、170℃における樹脂流れが0%でありかつ200
℃における樹脂流れが1〜5%である接着シートとする
ことができるが、このように硬化を進めると、可撓性が
低くなることから、接着シートを製造するとき、キャビ
ティー用穴の形成は、硬化を進める前に行うのが好まし
い。すなわち、請求項2に記載の発明は、シート状接着
材料にキャビティー用穴を設けた後、完全硬化に至らな
い条件で加熱加圧してシート状接着材料の樹脂の硬化を
進めて、樹脂流れが170℃において0%でありかつ2
00℃において1〜5%となるようにすることを特徴と
する半導体素子搭載用多層配線板用接着シートの製造方
法である。加熱することにより、樹脂の硬化反応を進め
て、樹脂流れを上記の温度において上記の範囲とすると
ともに、加圧することにより樹脂に含まれているボイド
を押し出すことができる。
As the sheet-like adhesive material is cured, the resin flow at 170 ° C. is 0% and the resin flow is 200%.
An adhesive sheet having a resin flow at 1 ° C. of 1 to 5% can be used. However, if the curing proceeds as described above, the flexibility becomes low. Is preferably carried out before curing proceeds. That is, the invention according to claim 2 is to provide a cavity for a sheet-like adhesive material, and then heat and pressurize the sheet-like adhesive material under conditions that do not lead to complete curing, thereby promoting the curing of the resin of the sheet-like adhesive material, Is 0% at 170 ° C. and 2
A method for producing an adhesive sheet for a multilayer wiring board for mounting a semiconductor element, wherein the adhesive sheet is set to 1 to 5% at 00 ° C. By heating, the curing reaction of the resin is promoted, the resin flow is brought into the above-mentioned range at the above-mentioned temperature, and voids contained in the resin can be extruded by applying pressure.

【0009】[0009]

【発明の実施の形態】ベース配線板11及び穴あき配線
板13は、ガラス布基材銅張熱硬化性樹脂積層板に回路
加工及び穴あけ加工を施したものが使用される。ガラス
布基材銅張熱硬化性樹脂積層板としては、多層プリント
配線板の構成材として汎用されている、熱硬化性樹脂と
してエポキシ樹脂、ポリイミド樹脂、ビスマレイミド−
トリアジン樹脂などを用いたものを使用することができ
る。回路加工の手段については特に制限はなく、プリン
ト配線板の製造に汎用されている手段をそのまま適用す
ることができる。穴あけ加工の手段についても同様であ
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As a base wiring board 11 and a perforated wiring board 13, a circuit board and a perforation processing are applied to a glass cloth base copper-clad thermosetting resin laminate. As a glass cloth base copper-clad thermosetting resin laminate, epoxy resins, polyimide resins, bismaleimides are widely used as constituent materials of multilayer printed wiring boards, and thermosetting resins.
Those using a triazine resin or the like can be used. The means for circuit processing is not particularly limited, and means generally used for manufacturing a printed wiring board can be applied as it is. The same applies to the means for drilling.

【0010】接着シートの製造に用いられるシート状接
着材料としては、多層プリント配線板用プリプレグ、例
えば、ガラス布を基材とするプリプレグを用いることが
できる。かかるプリプレグに用いられる熱硬化性樹脂と
しては、エポキシ樹脂、ビスマレイミド系ポリイミド樹
脂、ビスマレイミド−トリアジン樹脂などの熱硬化性樹
脂を挙げることができる。樹脂流れを170℃において
0%、200℃において1〜5%とするための温度など
の条件は、樹脂の組成などによっても異なり、それぞれ
最適な条件を実験などによって定める必要がある。
As the sheet-like adhesive material used for the production of the adhesive sheet, a prepreg for a multilayer printed wiring board, for example, a prepreg based on a glass cloth can be used. Examples of the thermosetting resin used for such a prepreg include thermosetting resins such as an epoxy resin, a bismaleimide-based polyimide resin, and a bismaleimide-triazine resin. Conditions such as a temperature at which the resin flow is 0% at 170 ° C. and 1 to 5% at 200 ° C. vary depending on the composition of the resin and the like, and it is necessary to determine the optimum conditions by experiments and the like.

【0011】例えば、エポキシ樹脂を用いたプリプレグ
においては、表裏を三フッ化ポリエチレンなどの離型フ
ィルムで覆い、温度70〜100℃、圧力0.3〜1.
0MPaで1〜5分間程度加熱加圧して樹脂の硬化を進
めるのが好ましい。温度が70℃未満であると樹脂流れ
が所定の範囲より大きくなる傾向にあり、温度が100
℃を超えると樹脂流れが所定の範囲より小さくなる傾向
にある。また、加熱加圧する時間が1分未満であると、
樹脂流れが所定の範囲より大きくなる傾向にあり、5分
を超えると、樹脂流れが所定の範囲より小さくなる傾向
にある。さらに、圧力が0.3MPa未満であると、接
着シート中にボイドが残り、1.0MPaを超えると接
着シートの厚さ薄くなる傾向にある。接着シートの製造
に用いられるシート状接着材料としては、プリプレグの
ほかに、エポキシ樹脂にフィルム形成能を有する成分、
例えば、アクリル樹脂、ポリビニルブチラールなどを配
合して、シート状に製膜して得られるシート状接着剤も
使用することができる。
For example, in the case of a prepreg using an epoxy resin, the front and back are covered with a release film such as polyethylene trifluoride, at a temperature of 70 to 100 ° C. and a pressure of 0.3 to 1.0.
Preferably, the resin is cured by heating and pressing at 0 MPa for about 1 to 5 minutes. If the temperature is lower than 70 ° C., the resin flow tends to be larger than a predetermined range.
When the temperature exceeds ℃, the resin flow tends to be smaller than a predetermined range. If the time for heating and pressing is less than 1 minute,
The resin flow tends to be larger than a predetermined range, and if it exceeds 5 minutes, the resin flow tends to be smaller than the predetermined range. Further, when the pressure is less than 0.3 MPa, voids remain in the adhesive sheet, and when the pressure exceeds 1.0 MPa, the thickness of the adhesive sheet tends to be thin. As the sheet-like adhesive material used in the production of the adhesive sheet, in addition to the prepreg, a component having a film forming ability in the epoxy resin,
For example, a sheet-like adhesive obtained by blending an acrylic resin, polyvinyl butyral, or the like and forming a film into a sheet shape can be used.

【0012】ベース配線板11及び半導体素子搭載用の
キャビティー用穴12を設けた穴あき配線板13を、キ
ャビティー用穴14を設けた接着シート15を介して重
ね、加熱加圧するとき、これらの構成材料を2枚の鏡板
の間に挿むが、この鏡板としては、配線板分野の積層成
形で使用されているものがそのまま用いられ、例えば、
厚さ0.5〜5mmの金属板が使用される。金属板とし
ては、耐食性の観点から、ステンレス板が好適に用いら
れる。
When a base wiring board 11 and a perforated wiring board 13 provided with a cavity hole 12 for mounting a semiconductor element are stacked via an adhesive sheet 15 provided with a cavity hole 14, and these are heated and pressurized, Is inserted between two end plates. As the end plate, those used in laminate molding in the field of wiring boards are used as they are, for example,
A metal plate having a thickness of 0.5 to 5 mm is used. As the metal plate, a stainless steel plate is preferably used from the viewpoint of corrosion resistance.

【0013】さらに、鏡板と穴あき配線板13との間に
は、クッション材19としてポリエチレンシートのよう
な熱可塑性シート17を、三フッ化ポリエチレンフィル
ム18で包んで配置するのが好ましい。成形時に熱可塑
性シート17が溶融流動してキャビティー22の内部を
埋めてキャビティー22内への圧力伝達を良好にするか
らである。加熱加圧するときの時間は、必要な接着強度
が得られるように選定される。エポキシ樹脂を用いたプ
リプレグをシート状接着材料として用いたときには、3
0〜120分である。
Furthermore, it is preferable that a thermoplastic sheet 17 such as a polyethylene sheet is wrapped with a polyethylene trifluoride film 18 as a cushioning material 19 between the end plate and the perforated wiring board 13. This is because the thermoplastic sheet 17 melts and flows at the time of molding and fills the inside of the cavity 22 to improve the pressure transmission into the cavity 22. The time for heating and pressing is selected so as to obtain the required adhesive strength. When a prepreg using an epoxy resin is used as a sheet-like adhesive material, 3
0-120 minutes.

【0014】[0014]

【実施例】【Example】

実施例1 接着シートの作製 基材厚さが0.05mm、付着樹脂量65重量%、13
0℃での樹脂粘度が750Pa・sのガラス布基材エポ
キシ樹脂プリプレグ(日立化成工業株式会社製、GEA
−67N(商品名)を使用した)を250mm×250
mmにカットし、中央に10mm×10mmのキャビテ
ィー用穴を打ち抜き加工により形成した。次に、両面を
厚さ25μmの三フッ化ポリエチレンフィルムで覆い、
温度80℃、圧力0.7MPaで5分間加熱加圧して接
着シートAを作製した。同様にしてキャビティー用穴の
寸法が、15mm×15mmの接着シートBを作製し
た。接着シートA及び接着シートBの樹脂流れは、いず
れも、170℃において0%、200℃において3%で
あった。
Example 1 Preparation of Adhesive Sheet The thickness of the base material was 0.05 mm, the amount of adhered resin was 65% by weight, and 13
Glass cloth-based epoxy resin prepreg having a resin viscosity at 0 ° C. of 750 Pa · s (GEA manufactured by Hitachi Chemical Co., Ltd.)
-67N (trade name) was used.
mm, and a 10 mm × 10 mm cavity hole was formed in the center by punching. Next, both sides are covered with a 25 μm thick polyethylene trifluoride film,
An adhesive sheet A was produced by heating and pressing at a temperature of 80 ° C. and a pressure of 0.7 MPa for 5 minutes. Similarly, an adhesive sheet B having a cavity hole size of 15 mm × 15 mm was prepared. The resin flow of the adhesive sheets A and B was 0% at 170 ° C. and 3% at 200 ° C.

【0015】ベース配線板及び穴あき配線板の作製 銅はく厚さが18μmのガラス布基材エポキシ樹脂両面
銅張積層板(日立化成工業株式会社製のMCL E−6
7(商品名)を使用した)に回路加工を行い、250m
m×250mmにカットしてベース配線板を作製した。
ベース配線板と同じ両面銅張積層板に回路加工を行い、
250mm×250mmにカットし、中央に10mmに
×10mmのキャビティー用穴を打ち抜き加工により形
成して、穴あき配線板Aを作製した。同様にしてキャビ
ティー用穴の寸法が、15mm×15mmの穴あき配線
板Bを作製した。
Preparation of Base Wiring Board and Perforated Wiring Board A copper-clad laminate of epoxy resin double-sided copper-clad laminate with a copper foil thickness of 18 μm (MCL E-6 manufactured by Hitachi Chemical Co., Ltd.)
7 (using the product name)
The substrate was cut into mx250 mm to produce a base wiring board.
Perform circuit processing on the same double-sided copper-clad laminate as the base wiring board,
It was cut into 250 mm × 250 mm, and a hole for cavity of 10 mm × 10 mm was formed in the center by punching to produce a perforated wiring board A. Similarly, a perforated wiring board B having a cavity size of 15 mm × 15 mm was prepared.

【0016】半導体素子搭載用多層配線板の作製 厚さ2mmのステンレス鏡板の上に、ベース配線板、接
着シートA、穴あき配線板A、接着シートB、穴あき配
線板B、の順に重ね、その上にクッション材を介して厚
さ2mmのステンレス鏡板を重ね、温度210℃、圧力
17MPaで、90分間加熱加圧して半導体素子搭載用
多層配線板を作製した。なお、クッション材は、厚さ2
5μmの三フッ化ポリエチレンフィルム2枚の間に、厚
さ1.0mmのポリエチレンシートを挿んで用いた。
Fabrication of a Multilayer Wiring Board for Mounting a Semiconductor Element A base wiring board, an adhesive sheet A, a perforated wiring board A, an adhesive sheet B, and a perforated wiring board B are stacked on a stainless steel mirror plate having a thickness of 2 mm in this order. A stainless steel end plate having a thickness of 2 mm was stacked thereon via a cushion material, and heated and pressed at a temperature of 210 ° C. and a pressure of 17 MPa for 90 minutes to produce a multilayer wiring board for mounting a semiconductor element. The cushion material has a thickness of 2
A 1.0 mm thick polyethylene sheet was inserted between two 5 μm polyethylene trifluoride films.

【0017】得られた半導体素子搭載用多層配線板につ
いて、マイクロメータを用いて厚さを測定したところ、
半導体素子搭載用多層配線板の外縁では平均して、1.
32mm、キャビティーの周縁で1.37mmであっ
た。また、キャビティー内への樹脂流出はまったく認め
られなかった。
The thickness of the obtained multilayer wiring board for mounting a semiconductor element was measured using a micrometer.
On average, the outer edge of the multilayer wiring board for mounting a semiconductor element is:
32 mm and 1.37 mm at the periphery of the cavity. Also, no outflow of resin into the cavity was observed.

【0018】比較例 実施例1で用いたガラス布基材エポキシ樹脂プリプレグ
を、そのままで接着シートを作製したほか実施例1と同
様にして半導体素子搭載用多層配線板を作製した。
Comparative Example A multi-layer wiring board for mounting a semiconductor element was produced in the same manner as in Example 1 except that an adhesive sheet was produced using the glass cloth base epoxy resin prepreg used in Example 1 as it was.

【0019】得られた半導体素子搭載用多層配線板につ
いて、マイクロメータを用いて厚さを測定したところ、
半導体素子搭載用多層配線板の外縁では1.30mm、
キャビティーの周縁で1.31mmであった。また、キ
ャビティー内には最大2.0mm(キャビティーの縁か
ら流出した樹脂の先端までの距離)の樹脂流出があり、
半導体素子の搭載及びワイヤボンデイングによる半導体
素子と回路配線との接続が不可能であった。
The thickness of the obtained multilayer wiring board for mounting a semiconductor element was measured using a micrometer.
1.30 mm at the outer edge of the multilayer wiring board for mounting semiconductor elements,
1.31 mm at the periphery of the cavity. Also, there is a resin outflow of up to 2.0 mm (the distance from the edge of the cavity to the tip of the resin flowing out) in the cavity,
It has been impossible to mount the semiconductor element and connect the semiconductor element to the circuit wiring by wire bonding.

【0020】[0020]

【発明の効果】本発明の製造方法によれば、接着シート
からキャビティー内への樹脂流出がなく、また板厚精度
の良好な半導体素子搭載用多層配線板を得ることができ
る。
According to the manufacturing method of the present invention, it is possible to obtain a multilayer wiring board for mounting a semiconductor element, which does not cause resin to flow out of the adhesive sheet into the cavity and has a good thickness accuracy.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例に関する断面図である。FIG. 1 is a cross-sectional view related to one embodiment of the present invention.

【図2】半導体素子搭載用多層配線板の一例を示す断面
図である。
FIG. 2 is a cross-sectional view illustrating an example of a multilayer wiring board for mounting a semiconductor element.

【符号の説明】[Explanation of symbols]

11 ベース配線板 12 キャビティー用穴 13 穴あき配線板 14 キャビティー用穴 15 接着シート 16 鏡板 17 熱可塑性シート 18 三フッ化ポリエチレンフィルム 19 クッション材 21 多層配線板 22 キャビティー 23 ワイヤボンディング用の段部 DESCRIPTION OF SYMBOLS 11 Base wiring board 12 Cavity hole 13 Perforated wiring board 14 Cavity hole 15 Adhesive sheet 16 Mirror plate 17 Thermoplastic sheet 18 Polyethylene trifluoride film 19 Cushion material 21 Multilayer wiring board 22 Cavity 23 Wire bonding step Department

───────────────────────────────────────────────────── フロントページの続き (72)発明者 村井 曜 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館工場内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor You Murai You 1500 Odai Ogawa, Shimodate City, Ibaraki Prefecture Inside the Hitachi Chemical Co., Ltd. Shimodate Plant

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ベース配線板及び半導体素子搭載用のキ
ャビティー用穴を設けた穴あき配線板を、キャビティー
用穴を設けた接着シートを介して重ね、加熱加圧して積
層する半導体素子搭載用多層配線板の製造方法におい
て、樹脂流れが170℃において0%でありかつ200
℃において1〜5%である接着シートを用い、温度18
0〜250℃、圧力10〜20MPaで加熱加圧するこ
とにより積層成形することを特徴とする半導体素子搭載
用多層配線板の製造方法。
1. A semiconductor element mounting wherein a base wiring board and a perforated wiring board provided with a cavity hole for mounting a semiconductor element are laminated via an adhesive sheet provided with a cavity hole, and heated and pressed to be laminated. The resin flow is 0% at 170 ° C. and 200%
Use an adhesive sheet that is 1 to 5% at
A method for manufacturing a multilayer wiring board for mounting a semiconductor element, comprising laminating and molding by heating and pressing at 0 to 250 ° C. and a pressure of 10 to 20 MPa.
【請求項2】 シート状接着材料にキャビティー用穴を
設けた後、完全硬化に至らない条件で加熱加圧して接着
材料の樹脂の硬化を進めて、樹脂流れが170℃におい
て0%でありかつ200℃において1〜5%となるよう
にすることを特徴とする半導体素子搭載用多層配線板用
接着シートの製造方法。
2. After providing a cavity hole in the sheet-like adhesive material, the resin of the adhesive material is cured by heating and pressing under conditions that do not result in complete curing, and the resin flow is 0% at 170 ° C. A method for producing an adhesive sheet for a multilayer wiring board for mounting a semiconductor element, wherein the adhesive sheet is set to 1 to 5% at 200 ° C.
JP9166397A 1997-06-23 1997-06-23 Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor Pending JPH1117051A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9166397A JPH1117051A (en) 1997-06-23 1997-06-23 Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9166397A JPH1117051A (en) 1997-06-23 1997-06-23 Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor

Publications (1)

Publication Number Publication Date
JPH1117051A true JPH1117051A (en) 1999-01-22

Family

ID=15830667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9166397A Pending JPH1117051A (en) 1997-06-23 1997-06-23 Manufacture of multi-layered wiring board for mounting semiconductor element and manufacture of adhesive sheet therefor

Country Status (1)

Country Link
JP (1) JPH1117051A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100385709B1 (en) * 2001-07-12 2003-05-27 삼성전기주식회사 Sheet type resin for filling and preparing method of multilayer printed circuit board using the same
JPWO2008146487A1 (en) * 2007-05-29 2010-08-19 パナソニック株式会社 Circuit board and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100385709B1 (en) * 2001-07-12 2003-05-27 삼성전기주식회사 Sheet type resin for filling and preparing method of multilayer printed circuit board using the same
JPWO2008146487A1 (en) * 2007-05-29 2010-08-19 パナソニック株式会社 Circuit board and manufacturing method thereof
US8446736B2 (en) 2007-05-29 2013-05-21 Panasonic Corporation Circuit board and manufacturing method thereof

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