JPH11148946A - Integration acceleration sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To compensate offset drift to contrive the stability of sensitivity and contrive low noise and high resolution. SOLUTION: A differential amplification circuit 510, which outputs as a differential mode for acceleration component in the director of the detector axis to which stress is applied, and outputs as the same phase mode for the acceleration component in the direction the other axis, is used and the gain of the differential amplification circuit 510 is determined by negative feedback processing to reduce irregularity of sensitivity. In addition, offset voltage offset voltage drift and temperature are compensated by inputting the compensation voltage of a compensation circuit to an input terminal and a current control terminal of the differential amplification circuit 510.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated acceleration sensor for detecting acceleration by using deflection of a beam, and more particularly, to a signal processing circuit mixedly mounted on a structure constituted by a micro-machine and a multi-axial direction. The present invention relates to an integrated acceleration sensor capable of detecting an acceleration component.

[0002]

2. Description of the Related Art In recent years, instead of an integrated acceleration sensor capable of detecting acceleration in only one axis, a sensor capable of detecting acceleration in two or three axes has been announced (Japanese Patent Laid-Open No. Hei 9-113534). Reference).

First, as a first conventional example, the structure of an integrated acceleration sensor for detecting acceleration components in three axial directions is shown in FIG.
This will be described with reference to FIG.

In FIG. 1, reference numeral 102 is a sectional view of an acceleration sensor 102 for detecting acceleration components in three axial directions.
The acceleration sensor 102 includes a cylindrical base 104,
The circular silicon substrate 10 adhered on the pedestal 104
5 is provided. A cylindrical weight portion 107 made of Pyrex glass is provided on the central bottom surface of the silicon substrate 105.
Is glued.

[0005] In the silicon substrate 105, a region between a peripheral portion 105a bonded to the pedestal 104 and a central portion 105b bonded to the weight portion 107 is constituted by a flexible portion 108 having a small thickness. ing.

FIG. 2 is a plan view of the acceleration sensor 102. On the surface of the flexible portion 108, two piezoresistive elements Rx1, Rx2, Rx3, and Rx4 are provided at positive and negative portions on the X axis with the center of the silicon substrate 102 as the origin.
Piezoresistive elements Ry1, Ry2,
Two Ry3 and Ry4 are provided, and piezoresistive elements Rz1, Rz2, Rz3, and Rz4 are arranged in parallel at positions close to the piezoresistive elements Rx1 to Rx4 on the X axis.

The piezoresistive elements Rx1 to Rx4, the piezoresistive elements Ry1 to Ry4, and the piezoresistive elements Rz1 to Rz4 each constitute a bridge circuit. Before the acceleration measurement, these three bridge circuits are in a balanced state and have zero output.

In the acceleration sensor 102 having such a structure, when an acceleration is applied, a stress is applied to the flexible portion 108 by the weight of the central weight portion 107, and the flexible portion 108 is mechanically deformed. I do.

[0009] Due to this mechanical deformation, the resistance of the piezoresistive element arranged on the flexible portion 108 in the direction in which the stress is applied changes, and the bridge balance of the bridge circuit is broken and an output appears. Since the change in the resistance value of the piezoresistive element constituting the bridge circuit differs depending on the magnitude and direction of the acceleration, the change in the resistance of each bridge circuit is measured, so that the change in the X, Y, and Z axes can be obtained. The acceleration component can be measured.

FIG. 3 shows an example of a bridge circuit composed of piezoresistive elements Rz1 to Rz4 for detecting an acceleration component in the Z-axis direction. In FIG. 1, when an acceleration is applied from the bottom to the top, Rz1 and Rz4 have minus (minus), Rz2 and Rz2.
A positive (+) stress is applied to z3, whereby the bridge balance is broken, a potential difference is generated between the terminals Vab, and an acceleration component in the Z-axis direction can be detected.

As a second conventional example, a current detection type acceleration sensor having a differential amplifier circuit is shown in FIG.
A description will be given based on (b) (see JP-A-6-207948).

In FIG. 4A, a diffusion layer 15 having conductivity opposite to that of the semiconductor substrate 150 is provided on the surface of the semiconductor substrate 150.
1, 152 are formed. An electrode 153 is arranged above the semiconductor substrate 150 between the diffusion layer 151 and the diffusion layer 152 at a predetermined interval. This electrode 153 is a movable electrode having a beam structure. As described above, MIS (Metal Insulator Sem) using air as an insulating film.
(iconductor) type transistor.

When an appropriate voltage is applied to the electrode 153, an inversion layer 154 is formed immediately below the electrode 153, and the diffusion layer 151 and the diffusion layer 152 conduct.
An electric current proportional to the capacitance between the semiconductor substrate 3 and the semiconductor substrate 150 flows.

Now, when acceleration is applied in the X-axis direction perpendicular to the semiconductor substrate 150, the electrode 153 is displaced in the direction perpendicular to the substrate surface, and the distance between the electrode 153 and the substrate surface changes.
As a result, the capacitance changes and the amount of current flowing through the inversion layer 154 changes, so that an acceleration proportional to the change in the amount of current can be measured.

In FIG. 4B, when a set of differential amplifier circuits is formed by using two MOS transistors, the acceleration in the X-axis direction becomes two MOS transistors 1
To work the same for both 60 and 161
No difference occurs between the currents flowing through MOS transistors 160 and 161. However, with respect to the displacement in the Z-axis direction, the overlap width Wa of the MOS transistor 160 and the overlap width Wb of the MOS transistor 161 have a relationship that if one increases, the other decreases. Accordingly, the current flowing through the two MOS transistors 160 and 161 also has the overlap width W.
Since it changes according to a and Wb, only the acceleration in the Z-axis direction can be detected.

On the other hand, in various systems using a pressure sensor or an acceleration sensor, the size and power consumption of the sensor have been reduced, and recently, not only a sensor main body but also a module mounted on a sensor substrate to a peripheral circuit has emerged. I have. Further, in consideration of connection of such a module to a computer or the like, a sensor having an A / D conversion function capable of directly obtaining a digital output has been developed. As an A / D conversion circuit equipped with such a sensor, a simplified A / D conversion circuit in which a plurality of CMOS inverters having different logic thresholds are connected in parallel has been proposed.

[0017]

In the first conventional example shown in FIG. 1, a semiconductor diffusion resistance layer is formed as a piezoresistive element on a flexible portion 108, and a bridge circuit is formed by forming a set of four piezoresistive elements. And the acceleration is measured using the piezoresistance effect.

However, in the case of the structure using the semiconductor diffusion resistance layer, there is no function of adjusting the manufacturing variation of the operating point voltage of the bridge circuit, and the offset voltage cannot be sufficiently reduced. Therefore, a compensation circuit for compensating the offset voltage due to manufacturing variations is required,
Manufacturing costs increase.

In the configuration using such a bridge circuit, there is no amplification function for amplifying the detected signal.
Output signal level is low. Particularly, in the acceleration sensor, since the output signal level is small and the detection sensitivity is low, the load on the amplifier circuit for amplifying the small output signal increases, and the power consumption also increases.

In addition, when acceleration is measured using such a bridge circuit, there is no function of adjusting the detection sensitivity in the other axis direction with respect to the detection component in the other axis direction other than the own axis direction to which the stress is applied. There is a problem in measurement accuracy.

Further, in the case of the second conventional example shown in FIG. 4, a structure immediately below the electrode 153 is of a capacitance type using air as an insulating film, and a current is detected in proportion to a change in capacitance. , Measuring acceleration.

However, such a capacitance type acceleration sensor is not configured using a piezoresistive element, and cannot be manufactured by using a well-known CMOS LSI manufacturing technology as it is. As a result, the manufacturing process becomes complicated, and there is a problem that an inexpensive sensor cannot be manufactured while suppressing the manufacturing cost.

Further, since the gate electrodes of the two input transistors are common, it is impossible to compensate the offset voltage of the differential circuit on the circuit.

Further, in an acceleration sensor for detecting acceleration components in three axial directions, compensation of offset voltage,
There is a problem that it is not possible to simultaneously improve the SN ratio in all axial directions.

Therefore, a first object of the present invention is to provide an inexpensive integrated acceleration sensor having a simple circuit configuration, eliminating the effects of offset and offset drift, regardless of the variation in manufacturing conditions.

A second object of the present invention is to provide an integrated acceleration sensor capable of performing temperature compensation of sensor sensitivity.

It is a third object of the present invention to provide an integrated acceleration sensor which eliminates the influence of low frequency noise and has excellent sensor sensitivity.

A fourth object of the present invention is to provide an integrated acceleration sensor capable of improving the detection accuracy and suppressing the sensitivity to other axes, thereby improving the measurement accuracy.

[0029]

The present invention comprises a fixed support, a movable weight portion, and a thin beam connecting the support and the weight portion, An integrated acceleration sensor that measures acceleration by using deflection of the beam due to stress, and is disposed at a stress concentration portion of the beam, and includes a plurality of strain detection elements that detect a stress applied to the beam,
A first amplifier circuit provided on the support, and a differential amplifier for output components output from the plurality of strain detecting elements with respect to an axial component to which stress is applied; A differential amplifier circuit that detects the signal as a mode and detects the other axis direction component as an in-phase mode, and the first and second amplifiers in response to respective output signals of the first and second amplifier circuits. Offset compensating means for generating an offset compensation signal for compensating for an offset in each of the amplifier circuits, and feeding the offset compensation signal back to the corresponding input sides of the first and second amplifier circuits. Thus, an integrated acceleration sensor is configured.

Here, the offset compensation signal generated by the offset compensating means is transmitted to the first and second offset compensation signals.
Can be input to each input terminal of the amplifier circuit.

A temperature compensating means for generating a temperature compensating signal for compensating for the temperature of each output signal of the first and second amplifying circuits subjected to the feedback processing can be further provided. .

The temperature compensation signal generated by the temperature compensation means can be input to control terminals of respective current sources of the first and second amplifier circuits.

The first and second amplifier circuits may further include a switch element whose operation state is switched in synchronization with a clock.

The strain detecting element can be constituted by a MOS transistor.

[0035]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIGS. 5 to 1 show the first embodiment of the present invention.
4 will be described.

First, the structure of the acceleration sensor is shown in FIGS.
It will be described based on.

In FIG. 5, a support 1 is provided at the center, and a weight 2 is provided at the periphery of the support 1. The support 1 and the weight 2 have a small thickness of 10 μm.
They are connected by beams 3 of about m. The beam 3 is formed along the directions of the X axis and the Y axis. A pedestal 5 made of glass (mainly composed of SiO ₂ ) is provided under the support 1.
Are joined.

At the stress concentration portion of the beam 3, a strain detecting element 4
11 to 414, 421 to 424, 431 to 434 are provided in total. These strain detecting elements 411-
Reference numerals 434 denote p-channel MOSFETs (hereinafter, p-channel MOSFETs).
MOS transistors).
In this case, the pMOS transistors 411 to 434 are
Strain detection is performed by forming it as a mold inversion layer.

A signal processing section 500 is provided in the support 1. The signal processing unit 500 includes a differential amplifier circuit 5 electrically connected to the pMOS transistors 411 to 434.
10 and a control unit 600. This differential amplifier circuit 510 is configured such that a set of two amplifying units 520 in FIG. Note that this signal processing unit 500
It is configured as a CMOS integrated circuit for signal processing.

The support 1, the weight 2, and the beam 3 are formed using a silicon single crystal substrate having a crystal plane (100). Beam 3 has a crystal axis <between support 1 and weight 2.
011>.

In FIG. 6, the end of the beam 3 in the X-axis direction which is the stress concentration portion has a p for detecting the stress in the X-axis direction.
MOS transistors 411 to 414 are provided.
In this case, the pMOS transistors 411 and 412 are arranged at the ends near the boundary with the weight 2, and the pMOS transistors 413 and 414 are arranged at the ends near the boundary with the support 2.

PMOS transistors 421 to 424 for detecting stress in the Y-axis direction are provided at the ends of the beam 3 in the Y-axis direction which are the stress concentration portions. In this case, pM
The OS transistors 421 and 422 are arranged at the ends near the boundary with the weight 2 and the pMOS transistors 423 and 4
Reference numeral 24 is disposed at an end near the boundary with the support 2.

PMOS transistors 431 to 434 for detecting stress in the Z-axis direction are provided at the ends of the beam 3 in the X-axis and Y-axis directions which are the stress concentration portions. In this case, the pMOS transistor 431 is arranged at the same position as the pMOS transistor 414 arranged in the X-axis direction,
The pMOS transistor 432 is a pMOS transistor 432 arranged in the X-axis direction.
It is arranged at the same position as the MOS transistor 411. The pMOS transistor 433 is arranged at the same position as the pMOS transistor 422 arranged in the Y-axis direction.
The pMOS transistor 434 is a pMOS transistor 434 arranged in the Y-axis direction.
It is arranged at the same position as the MOS transistor 423.

Next, the piezoresistance effect of the p-type inversion layer, the crystal plane (100) of the silicon single crystal substrate, and the crystal axis <
011> will be described.

It is known that a piezoresistive effect also occurs in an inversion layer generated by a vertical electric field on the silicon surface, similarly to bulk silicon. The piezoresistance coefficients (π11, π12) in the p-type inversion layer are significantly different from the piezoresistance coefficients of bulk p-type silicon, but the dominant piezoresistance coefficient (π44) has almost the same value as bulk p-type silicon. . Accordingly, it is sufficiently possible to form the inversion layer at the stress concentration portion on the beam and replace it with the conventional piezoresistor by the diffusion resistance. In particular, when the peripheral circuits are simultaneously integrated by using the CMOS LSI manufacturing technology. Is a very effective method because the detection element can be formed without changing the conventional manufacturing process at all. It is also known that the piezoresistance coefficient of the inversion layer has a vertical electric field dependency, and there is an advantage that the piezoresistance effect can be controlled by the gate voltage.

Generally, the mobility of carriers changes by applying a mechanical stress to a semiconductor element. MO
In the case of the SFET, since the mobility of the carrier is proportional to the drain current, the relationship between the strain generated in the semiconductor element due to mechanical stress and the drain current can be defined as a piezoresistance coefficient.

Here, the strain ε of the pMOS transistor
And the relationship between the drain current Id will be described. In addition,
πl is the piezoresistance coefficient when stress is applied in a direction parallel to the direction in which the current flows. πt is a piezoresistance coefficient when stress is applied in a direction perpendicular to the direction in which current flows.

The crystal plane (100), the piezoresistance coefficients πl and πt at the crystal axis <011>, and the crystal plane (10
0) crystal axis ^<0 - 11> piezoresistance coefficient πl when the
, Πt have good change characteristics of the drain current Id with respect to the strain ε. Therefore, in this example, as shown in FIG. 6, the beam 3 on which the pMOS transistors 411 to 434 are formed is formed by using the substrate having the crystal plane (100) and the crystal axis <011>.
Or crystal axis <0 ^- 11> formed in a direction parallel to. As a result, the drain current Id
, That is, the detection accuracy of the output voltage of the differential amplifier 510 can be improved.

Next, the differential amplifier circuit 510 of the acceleration sensor
Will be described with reference to FIG. 7.

In the amplifier 520, 411, 412
Is a pMOS transistor (strain detecting element) that forms a p-type inversion layer provided at the stress concentration portion of the beam 3 on the X axis in FIG.

A switch 350 is connected to the gate of the pMOS transistor 411, and switches 352 and 354 are connected to its source and drain. Similarly, p
The switch 351 is connected to the gate of the MOS transistor 412.
Is connected, and a switch 35 is connected to its source and drain.
3,355 are connected. In addition, these switches 3
A switch switching structure in which switches 360 to 365 are connected instead of 50 to 355 is provided. Then, the pMOS transistor 41 is connected via the switches 350 to 355 or the switches 360 to 365.
1, 412 is supplied with a bias current Io. 371
372 is a dummy switch.

Reference numerals 301 to 308 denote pMOS transistors, and reference numerals 310 to 315 denote nMOS transistors.
316 is a pMOS transistor, and 317 is an nMO
It is an S transistor. Reference numeral 320 denotes an nMOS transistor. The pMOS transistors 411, 4
All circuit elements other than 12 are formed in the support 1. V _GSCC is a gate voltage for current control applied to the gate of the nMOS transistor 320.

A bias generating circuit is constituted by the MOS transistors 301, 307 and 320. Reference numeral 301 denotes a bias generation transistor; 307, a level shifter transistor; and 320, a current control transistor.

Reference numerals 302, 308, 310, and 311 denote bias generation circuits for cascade transistors. 31
0 is applied to the cascade transistors 312 and 3
14 gates are biased. 302 is a transistor for supplying the same current as 303 to the bias stage, and 308 is a dummy transistor of the strain detecting elements 411 and 412. 310, 311 are 312 and 314, 313 and 31
5 dummy transistors.

303, 411, 412, 312, 31
4,313,315 are input stages of the differential amplifier. 3
03 is a current source. 312 and 314 are cascade gate grounded amplifier elements. 313 and 315 are load current mirror circuits.

304 and 316 are level shifters (pMO
S source follower) and the subsequent class B amplifier is AB
Bias as class. Reference numerals 305 and 317 denote class AB amplifiers at the output stage.

The amplifier 520 shown in FIG.
It is composed of two pMOS transistors 411 and 412 on the axis, and the other two pMO transistors on the X axis.
The S-transistors 413 and 414 have the same circuit configuration, so that the differential amplifier circuit 510 for detecting the X-axis component is configured by using two amplifiers 520 as one set. Similarly, the differential amplifier circuits 510 for detecting the Y-axis and Z-axis components can be configured by configuring the two amplifiers 520 as one set for each of the Y-axis and the Z-axis.

When a differential amplifier circuit for detecting three-axis components is formed, three sets of amplifiers 520 shown in FIG. 7 are formed in the support 1 of the sensor chip shown in FIG. Can be configured. in this case,
When acceleration is applied in each of the X, Y, and Z axes by arranging the pMOS transistors 411 to 434 on the beam 3, one set (one-axis component) of the output voltage Vo becomes the acceleration in the own axis direction. The component is output as a differential mode signal, and the acceleration component in the other axis direction is output as a common mode signal. Therefore, the acceleration can be detected with a high detection sensitivity for the own axis component and a low detection sensitivity for the other axis components.

In FIG. 7, a voltage Vin (corresponding to an offset voltage described later) is input to a negative input terminal n1 of the amplifier 520, and a positive input terminal n2 is grounded. The output voltage Vo of the amplifier 520 appears at the output terminal n3. The resistance r between the input and output of the amplifier 520
By connecting 1 and r2, an inverting amplifier 530 can be configured. The inverting amplifier 530 can be used for detecting one axis component of each of the X axis, the Y axis, and the Z axis by configuring two as one set.

Next, the operation principle of the differential amplifier circuit 510 constituted by using the amplifier 520 of FIG. 7 (a set of two amplifiers corresponds to one axial component) will be described with reference to FIG.

FIG. 8 shows a basic configuration of a stress-electric signal conversion circuit used in the present sensor. FIG. 8 shows an example in which the amplifier 520 in FIG. 7 is configured as a closed loop amplifier, whereas the amplifier 520 is configured as an open loop amplifier. When the circuit of FIG. 8 is configured as a set of two, a differential amplifier circuit 510 of a one-axis direction component is configured.

Reference numerals 411 and 412 correspond to the pMOS transistors of the amplifier 520 shown in FIG. Therefore, when the components are configured as uniaxial components, similar circuits using the pMOS transistors 413 and 414 are further added.

Vd is the pMOS transistors 411, 4
12 is a gate differential voltage that acts as a correction voltage applied to eliminate the output offset caused by T.12. Vcm
b is a power supply for setting a common-mode gate bias voltage for forming p-type inversion layers in the pMOS transistors 411 and 412. In this case, the common mode gate bias voltage Vcm
Since b changes the vertical electric field to the p-type inversion layer and at the same time changes the operating point of the amplifier, the piezoresistance coefficient π, circuit parameters, and the like change, thereby changing the sensor sensitivity as a whole.

The principle of operation of the circuit shown in FIG. 8 will be described below.

In the present equivalent circuit, a current source gmmσin1 is newly provided in consideration of the modulation of conductivity due to the stress σin1. In this case, since the current source gmmσin1 is controlled by the stress, the mechanical transconductance gmm with respect to the stress of the pMOS transistor 411 is set as a proportional constant.

On the other hand, in a small signal equivalent circuit of a normal MOSFET, a current source is represented by a product of gm and an input voltage.
In this circuit, the input of the stress σin1 changes the source potential v of the pMOS transistor 411 and changes the gate-source voltage Vgs, so the current source is expressed as gmv.

Therefore, the drain current id1 can be expressed as the sum of the normal current source gmv and the current source gmmσin1 due to stress.

Similarly, in the case of the pMOS transistor 412, the drain current id2 can be expressed as the sum of the current source gmv and the current source gmmσin2.

The drain current flowing through the nMOS transistor 313 is represented by id3, and the nMOS transistor 31
The drain current flowing through 5 is id4. These nMOS
The current sources of transistors 313 and 315 are represented as gmlv2. The pMOS transistors 411 and 412
Substrate effect is ignored.

Then, the pMOS transistors 411, 4
12 and the nMOS transistors 313 and 315 are all in the saturation region, the pMOS transistor 41
The change of the drain currents id1 and id2 at 1,412 corresponds to the stress σ
It is the sum of the change due to in1 and σin2 and the change due to the source voltage v, and is expressed by the following equations (1) and (2).

[0072]

(Equation 1)

[0073]

(Equation 2)

If the current source is ideal, equation (3) holds.

[0075]

(Equation 3)

Equations (1) to (3) are converted to the drain current id1,
Solving for id2 is represented by equation (4).

[0077]

(Equation 4)

The change in the current of the pMOS transistor 411 is equal to the change in the drain current of the low-impedance nMOS transistor 313, and also gives the current change to the nMOS transistor 315 forming the current mirror. The relationship between the currents is given by equation (5).

[0079]

(Equation 5)

The current flowing into the output terminal 350 is represented by the following equation (6).

[0081]

(Equation 6)

Since the output terminal 350 is loaded with the drain conductance of the pMOS transistor 412 and the nMOS transistor 315, the output voltage of the differential amplifier is

[0083]

(Equation 7)

Is obtained. Accordingly, if this voltage is input to the source follower formed by the pMOS transistor 305 and the nMOS transistor 317, the same voltage can be obtained at the output terminal with low output impedance because the voltage gain is one time. Differential signal of stress σin1 and σin2 (= σin1
−σin2), and an output voltage Vout proportional to (−in2) can be obtained.

Here, the mechanical transconductance gmm with respect to the stress σ will be considered.

It is assumed that π and σ are the piezoresistance coefficient of the inversion layer and the stress applied to the inversion layer when the direction of the current is taken into consideration, and that the change due to stress other than the mobility can be ignored. PMOS transistor 41
The drain currents ID (= id1, id2) of 1,412 are expressed as in equation (8). IDo is the drain current when the stress input is zero.

[0087]

(Equation 8)

Here, μn denotes the MOS without stress.
The carrier mobility of the FET, Cox is the gate capacitance of the MOSFET, W is the gate width, L is the gate length, and VT is the threshold voltage.

Therefore, the pMOS transistors 411, 4
The gmm of 12 is

[0090]

(Equation 9)

Is obtained. Thus, gmm is proportional to the drain current and the piezoresistance coefficient. From Equation 7, the conversion coefficient Tdm (differential stress sensitivity of the circuit) for converting the differential signal to the output voltage Vout is:

[0092]

(Equation 10)

Is obtained.

As described above, the circuit shown in FIG.
The configuration is the same as that of the differential amplifier circuit, which is a voltage amplifier, and has a high common-mode stress signal rejection ratio for common-mode stress input. (In principle, for a common-mode input, Equation 7 becomes zero and The sensitivity is zero).

Therefore, the stress input to the circuit by the acceleration component of the axis other than the own axis whose acceleration is being detected is in the in-phase mode, and the stress input to the circuit by the acceleration component of the own axis is in the differential mode. By arranging the pMOS transistors 411 to 434 on the beam 3 as described above,
The sensitivity ratio between the other axis and the own axis (other axis sensitivity) is the reciprocal of the in-phase stress signal rejection ratio of the detection circuit.

The input transistor (distortion detecting element) in the differential amplifier circuit is a p-channel MOS.
The invention is not limited to the FET, and a bipolar transistor or the like may be used.

Next, the principle of removing the acceleration component of the other axis and detecting only the acceleration component in the own axis direction to which the acceleration is applied will be described. pMOS transistors 411-
The arrangement position of 414 corresponds to the position on the beam 3 in FIG.

(Principle of Detection in X, Y Axis Direction) The principle of detection in the X axis direction will be described. Here, a circuit constituted by the pMOS transistor 411 and the pMOS transistor 412 is taken as an example.

When an acceleration is applied in the X-axis direction (left direction in the figure), a negative (-) stress σin1 is applied to the pMOS transistor 411, and the pMOS transistor 41
Since (+) stress σin2 of +2 is applied to 2, (σin1-σin2) in Expression 7 is added. This (σin1 −
.sigma.in2) multiplied by the conversion coefficient Tdm of Equation 10 is output as the output voltage.

When acceleration is applied in the Z-axis direction (upward in the figure), the stresses σin1 and σin2 having the same sign (−) and the same magnitude are applied to the pMOS transistor 411 and the pMOS transistor 412. 7 (σin1
−σin2) becomes zero, and the output voltage becomes zero. According to the same principle, the Y-axis direction can be detected.

(Principle of Detection in Z-Axis Direction) The principle of detection in the Z-axis direction will be described. Here, a circuit constituted by the pMOS transistor 431 and the pMOS transistor 432 is taken as an example.

When the acceleration is applied in the X-axis direction (left direction in the figure), the stresses σin1 and σin2 having the same sign (−) and the same magnitude are applied to the pMOS transistor 431 and the pMOS transistor 432. 7 (σin1
−σin2) becomes zero, and the output voltage becomes zero. Similarly, in the Y-axis direction, the same sign (+) applies the same stress, so that the output becomes zero and the output becomes zero.

When acceleration is applied in the Z-axis direction (upward in the figure), + (plus) is applied to the pMOS transistor 431.
Is applied to the pMOS transistor 432, and (-in minus) stress .sigma.in2 is applied to the pMOS transistor 432, so that (.sigma.in1 -.sigma.in2) in the equation 7 is added to obtain the output voltage.

Therefore, only the acceleration component in the direction of the own axis to which the acceleration is applied is detected as the differential mode, and the acceleration component of the other axis is detected as the in-phase mode, whereby the other axis component can be removed.

Next, various characteristics measured by trial production of the present acceleration sensor will be described with reference to FIG. Here, the result of measurement using a vibrator that changes the input frequency between 50 Hz and 5 kHz will be described.

(Relationship Between Acceleration Detection Characteristics and Sensitivity of Other Axis) FIG. 9 shows output characteristics of acceleration components of each axis when acceleration is applied in the Z-axis direction. Thus, the output voltages of the X and Y axes serving as the other axes can be suppressed low, and the output voltage of the Z axis serving as the own axis can be set to a value proportional to the acceleration.

When the detection circuit of this sensor is considered as a voltage input differential amplifier, the reciprocal of the measurement result of the common mode voltage signal rejection ratio is 0.002 (0.2%). Thus, even when the input is stress, the sensitivity to the in-phase stress signal is expected to be about 0.002 times that of the differential signal. However, in the prototype sensor element, the ratio between the in-phase stress sensitivity (X, Y-axis component output) and the differential stress sensitivity (Z-axis component detection output) when acceleration is input in the Z-axis direction is 0.02.
8 (2.8%). This value is about one digit larger than 0.2%. This indicates that there was about 2.8% of the stress imbalance caused by the asymmetry error of the structure that occurred during the fabrication of the sensor. It is considered that the magnitude of the manufacturing error is usually several percent, and the magnitude of the sensitivity to the in-phase stress signal is almost determined by the magnitude of the manufacturing error. If the sensor sensitivity is the same in all axial directions, 2.8% will be the other axis sensitivity as it is, but in the case of this sensor, since the X, Y axis sensitivity and the Z axis sensitivity are different,
The relationship between the other axis sensitivities becomes slightly complicated.

Table 1 shows the detection sensitivities and other-axis sensitivities of the axis detection circuits of the sensor element manufactured as a trial.

[0109]

[Table 1]

Since the stress generated in the beam portion with respect to the Z-axis acceleration component is about ten times that in the case of the X and Y-axis components,
The X and Y axis sensitivities are about 10% of the Z axis sensitivities. For this reason, an in-phase stress that is nearly 10 times larger is input to the X- and Y-axis detection circuits due to the acceleration component of the Z-axis, and the sensitivity of the other axis is increased about 10 times (about 25%).

This difference in sensitivity can be solved by increasing the stress generated by the X- and Y-axis acceleration components until the stress becomes equal to that in the case of the Z-axis acceleration component. Work is required. As another solution, it is possible to cancel an error output due to sensitivity to other axes by performing an arithmetic processing on an output signal from the present sensor by a microprocessor or performing a correction signal processing by an analog circuit.

(System Configuration) Next, an example of a system configuration in which a compensation circuit is added to the acceleration sensor will be described with reference to FIGS.

FIG. 10 shows an example of a system configuration in which two inverting amplifiers 530 having the amplifier 520 shown in FIG. 7 are used (for detecting a component in one axial direction). Output voltages Vo1 and Vo2 of the inverting amplifier 530 are passed through a cross-coupling switch circuit 550 and a low-pass filter circuit 560, respectively.
It is input to the control unit 600.

The cross-coupling switch circuit 550 synchronously detects the output voltages Vo1 and Vo2 from both amplifiers 520, demodulates the modulated signal, and modulates low-frequency noise to high-frequency. The low-pass filter circuit 560 removes high-frequency modulated noise generated in the amplifier 520 and the signal line.

The control section 600 outputs the output voltages Vo1, Vo2
, The offset voltage Vi for offset compensation
1, Vi2, and a voltage V _GSCC for temperature compensation are created, and the compensation signals Vi1, Vi2, and V _GSCC are fed back to the inverting amplifier 530, whereby negative feedback control is performed. Vkc is a clock signal for performing synchronous detection when the signal is demodulated by the cross-coupling switch circuit 550.

FIG. 11 shows the internal structure of the control unit 600. A CPU 601 controls the entire system. A ROM 602 stores an offset compensation control program 602a according to the present invention. The offset compensation control program 602a may be stored separately on a floppy disk or the like. Reference numeral 603 denotes a RAM used as an area for executing arithmetic processing. Reference numeral 604 denotes a rewritable EPROM. This EPROM 604 contains offset compensation data 604a.
Is stored. 605, an A / D converter;
Reference numeral 6 denotes a D / A converter. Also, this control unit 600
An output signal T of the temperature sensor 570 is input to perform temperature compensation. This temperature sensor 570 is installed in the support 1 of FIG.

FIGS. 12 and 13 show an inverting amplifier 530.
The principle of negative feedback using is shown.

FIG. 12 shows the principle of a negative feedback circuit using the inverting amplifier 530 of FIG. n1 and n2 are input terminals, n
3 is an output terminal. Now, it is assumed that the offset voltage Vstr is generated between the input terminals n1 and n2 of the amplifier 520 due to the stress acting on the acceleration sensor. Thus, the input voltage Vi becomes

[0119]

[Equation 11]

Is obtained. Also, assuming that the feedback gain of the inverting amplifier 530 is ANFB and the open loop gain of the amplifier 520 is Ao, the feedback gain ANFB is

[0121]

(Equation 12)

[0122]

(Equation 13)

[0123]

[Equation 14]

Is obtained. The output voltage Vo of the inverting amplifier 530 is the product of the feedback gain ANFB and the offset voltage Vstr generated by the differential stress input,

[0125]

(Equation 15)

This can be expressed as

The output voltage Vo is equal to the offset voltage Vst
Since r is related to stress,

[0128]

(Equation 16)

Is as follows. Here, Io is the bias current of the differential stage shown in FIG. In this case, since the amplification factor is determined by the external feedback circuit, the offset voltage Vst
The proportionality constant between r and the stress determines the sensitivity. When the strain detecting element is in the strong inversion state, Vstr, that is, the sensitivity is
It increases in proportion to the square root of the bias current Io. The bias current Io is a current control nMOS
Since it is proportional to the square of the gate voltage V _GSCC of the transistor 320, the offset voltage Vstr due to this stress, that is, the sensitivity is

[0130]

[Equation 17]

As shown in the _graph , the voltage changes in proportion to the gate voltage V _GSCC . βs and βcc are drain current coefficients of the detection and current control transistors, respectively. Vt is
This is the threshold voltage of the nMOS transistor 320. π is
This is the piezoresistance coefficient of the inversion layer of the pMOS transistor. According to Equation 17, the sensitivity of the feedback amplifier can be linearly controlled by the voltage.

FIG. 13 shows the inverting amplifier 530 of FIG.
FIG. 12 illustrates the exchange of signals with the control unit 600 in FIG. 11. In FIG. 13, when stress is applied to the strain detecting element of the acceleration sensor by acceleration, the amplifier 52 of Ao
An offset voltage Vstr converted to 0 is generated, and the offset voltage Vstr is multiplied by the feedback gain ANFB, and is output as an output voltage Vo = Vstr · ANFB. The value of the output voltage Vo changes in proportion to the acceleration.

Then, the offset voltage of the entire circuit is set to, for example, the input terminal n of the inverting amplifier 530 having a negative feedback configuration.
By inputting from 1, n2, the offset can be canceled. In this case, the amplification factor of the amplifier output with respect to the offset voltage is substantially constant by the feedback gain ANFB, and the gain variation of the amplifier itself due to sensitivity correction can be ignored. Therefore, in the detection circuit including the feedback inverting amplifier 530, the detection sensitivity and the offset voltage can always be controlled in a linear relationship with the voltage without depending on the manufacturing process.

Here, the offset voltage of the whole circuit means the offset voltage of the negative feedback amplifier circuit. When there is no input, for example, when the power supply is ± 2.5 V, the output voltage is any voltage from 0 V. It means that it is shifted only. In this example, the value (Vi1) output by the calculation of the control unit 600 is used for offset voltage correction. If there is a sensitivity drift, it is corrected using V _GSCC .

(Temperature Dependence of Sensor Sensitivity and Offset Voltage) Next, a second embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. The description of the same parts as in the first embodiment is omitted, and the same reference numerals are given.

This example is an example of the temperature compensation of the inverting amplifier 530. When temperature compensation of the inverting amplifier 530 is performed, a temperature signal T from the temperature sensor 570 is input to the control unit 600 as shown in FIG. As the temperature sensor 570, for example, a polysilicon resistor is used.

When temperature compensation is performed in the control section 600 shown in FIG. 11, a compensation voltage for canceling the temperature characteristics of offset and sensitivity of the acceleration sensor is measured in advance, and the compensation voltage is stored in the compensation data in the EPROM 604. 6
04a. Then, the CPU 601 issues a command to the D / A converter 606 to make the stored compensation data correspond to the output voltage T actually measured by the temperature sensor 570 and output a value corresponding to the stored compensation data. Generate a compensation voltage. The compensation voltage generated in this manner is converted to an offset voltage (Vi1, Vi1).
2) and as a sensitivity correction voltage (V _GSCC ), by inputting to each input terminal of the inverting amplifier 530, offset and sensitivity drift can be canceled out, and temperature compensation can be performed. The drift of the offset voltage indicates how much the offset voltage has changed with the temperature change with the offset voltage at room temperature as a reference point, and the offset voltage change when the temperature changes from T1 to T2. Voff is

[0138]

(Equation 18)

This can be expressed as

Here, a specific example of the temperature compensation control will be described.

The detection sensitivity Vs and offset Voff of the inverting amplifier 510 are determined by compensation voltages (Vin = Vi1, Vi2, V
_GSCC )

[0142]

[Equation 19]

[0143]

(Equation 20)

The control is performed as follows. FIGS. 14A and 14B
Shows an example of the sensor characteristics.

Thus, the offset voltage (Vin = Vi1, Vi2, V _GSCC ) as the correction signal is

[0146]

(Equation 21)

[0147]

(Equation 22)

Here, ks and ko are slope coefficients.

From the relations of Expressions 21 and 22, even if the detection sensitivity Vs and the offset Voff vary depending on the temperature, the offset voltages (Vin = Vi1, Vi2,
V _GSCC ) can be kept constant.

In equation 21, the detection sensitivity Vs changes almost linearly with temperature T, and the coefficient ks also decreases linearly with temperature T. Therefore, in order to keep the detection sensitivity Vs constant with respect to the temperature, an offset voltage V _GSCC proportional to the square of T may be applied to the gate of the nMOS transistor 320 of the inverting amplifier 530.

In Equation 22, the offset Voff changes in proportion to the temperature T, but the coefficient ko is considered to be almost constant due to the feedback gain ANFB. Therefore, the offset Voff
Can be kept constant with respect to temperature by applying an offset voltage Vin proportional to T to the input terminal of the inverting amplifier 530.

The EPROM 604 shown in FIG.
1 to 22 are offset compensation data 60
4a. That is, the offset compensation data 604a stores data obtained by examining the relationship between the temperature T and the compensation voltage (Vin = Vi1, Vi2, V _GSCC ) shown in Expressions 21 and 22 for each sensor.

The ROM 602a has the following formulas (21) and (2).
Compensation control program 6 for calculating the equation shown in FIG.
02a is recorded.

When actual temperature control is performed, C
The PU 601 detects the output value of the temperature sensor 570 at a certain cycle via the A / D converter 605, and the parameters ks, ko, Vs, Voff corresponding to the detected temperature T.
From the compensation data 604a of the EPROM 604. Then, the offset voltage (Vin = Vi1, Vi2, V _GSCC ) is calculated by performing an arithmetic process according to Expressions 21 to 22 using the read value and the temperature T. The value calculated in this way is the D / A converter 6
05 output from the control unit 600 via the inverting amplifier 5
30 is applied to each input terminal. In this way, temperature compensation for offset and sensitivity can be performed.

FIG. 15 shows the sensitivity and the temperature coefficient TCS (Temperature Coefficient of SCS) for each temperature from room temperature (30 ° C.) and the voltage gain of the amplifier 520 shown in FIG.
ensitivity), TCG (Temperature Coefficient o)
f Gain). In this case, the temperature coefficient TCS is

[0156]

(Equation 23)

T: measurement temperature S30: can be obtained as sensitivity at 30 ° C. From FIG. 15, it can be seen that the decrease in sensitivity due to the temperature rise is linear (the temperature coefficient is constant).

FIG. 16 shows an example of a hardware-like compensating circuit in which the compensating circuit 700 is most simply constituted by an analog circuit. The compensation circuit 700 amplifies the temperature information from the temperature sensor 570 and outputs an output voltage Vt.
0, an amplifier (squaring device) 720 with an amplification factor X, and an amplification factor A
Amplifier 730. In this compensation circuit 700, the temperature drift correction of the first-order approximation to some extent can be performed without using the digital control by the control unit 600.

The offset voltage (Vin = Vi1, Vi2, V _GSCC ) which is the compensation output value is

[0160]

(Equation 24)

[0161]

(Equation 25)

However, Xo and Ao are bias voltages for operating the sensor, and X and A are proportional constants (gain of the circuit).

Therefore, by generating V _GSCC in the compensation circuit 700 so that the sensitivity of the acceleration sensor becomes constant, it is possible to compensate for the change in sensitivity due to temperature.

The offset voltage drift due to the temperature rise is also linear, and the voltage drift (Vi1, Vi2) corresponding to the voltage drift is generated by the compensation circuit 700, so that the temperature drift of the offset voltage can be compensated.

(Switch Switching Mechanism) Next, a third embodiment of the present invention will be described with reference to FIGS. The description of the same parts as those in the first and second embodiments is omitted, and the same reference numerals are given.

This example is an example of the switch switching mechanism in the inverting amplifier 530 in FIG.

In FIG. 7, switches 350, 351, 352, 353, 354, 35 which are analog switches
5 and switches 360, 361, 362, 363, 36
4,365 is the control unit 600 shown in FIGS.
Can be alternately switched on the basis of the input of the clock signal Vkc. By such switching, the pMOS transistors 411 and 41 serving as strain detecting elements are provided.
2 can be switched.

FIG. 17 shows a configuration example of the switches 350 to 355 and the switches 360 to 365. These switches have a general CMOS transmission gate configuration. Now, when a clock "high level" is applied to the nMOS transistor, the switch is turned on, and when a clock "low level" is applied, the switch is turned off.

The dummy switches 371 and 372 are
Switches of the same shape, which are always turned on, are included in a bias circuit for biasing the gate of the cascade transistor with an appropriate voltage.

For example, when the clock signal Vkc is at the high level, the switches 352, 353, 354, 3
When the clock signal 55 is conductive and the clock signal Vkc is at a low level, the switches 362, 363, 364, 365 are conductive. In order to apply a stable negative feedback, the gate terminals of the pMOS transistors 411 and 412 are also switched by the clock signal Vkc.
When 0 and 351 are conducting and low, the switch 36
0,361 conducts.

By such switching of the switches, the output voltages Vo1 and Vo2 shown in FIG. 10 are modulated to odd harmonics of the clock frequency, and output with an amplitude according to the equation (16). In FIG. 10, the output voltages Vo1 and Vo2 are synchronously detected by the cross-coupling switch circuit 550 and demodulated. While the signal modulated by this demodulation operation returns to the baseband, the inverting amplifier 530 including an amplifying circuit other than the distortion detection element and the feedback resistor, and the low frequency noise generated in the signal line are modulated to the high frequency, and the modulation The noise thus removed is removed in the low-pass filter circuit 560 at the subsequent stage.

By realizing such a switch mechanism, negative feedback can be applied stably just like a normal operational amplifier. Further, by connecting a class AB output stage of a cascode type using a MOS transistor to which stress is applied as an input, the gain can be further improved, and the accuracy of the negative feedback circuit can be improved.

A specific example will be described below with reference to FIGS.

(Specific Example 1) FIGS. 18A and 18B are similar to FIGS.
7 shows the sensitivity characteristics of the inverting amplifier 510 when the gain is changed by changing the feedback resistance ratio in the system configuration of FIG.
Both graphs were measured by changing only the amount of negative feedback of the closed loop circuit (gate voltage V _GSCC for bias current control = 1, 2 V). This gives a large V according to equation 16.
_{With GSCC} , greater sensitivity can be obtained.

(Specific Example 2) FIG. 19 shows the relationship between the gate voltage V _GSCC for controlling the bias current Io shown in FIG. 7 and the detection sensitivity of the acceleration sensor. The threshold voltage of the current control nMOS transistor 320 is set to 0.8V. In this case, the detection sensitivity is V _{GSCC in} the range of _0.8 V to _2.4 V.
There is a relationship proportional to. Thereby, the detection sensitivity is V
_GSCC allows for linear control.

(Specific Example 3) FIG. 20 shows drift of sensitivity and offset voltage with respect to temperature. When a compensation voltage is not applied to the input terminal of the inverting amplifier 530, the sensitivity drifts as the temperature rises as shown in a waveform A. On the other hand, when an appropriate compensation voltage is applied as V _GSCC , sensitivity drift can be suppressed as shown in waveform C. The waveform B is a voltage value applied to the input terminal of the inverting amplifier 530 in order to cancel the offset drift of the output terminal.

(Example 4) FIGS. 21 and 22 show examples of the noise reduction effect using the chopper technique in the system of FIG. The measuring method is the cross coupling switch circuit 55
The output signal was detected by performing the switching of 0 in synchronization with the clock for switching the transistor of the inverting amplifier 530.

FIG. 21 shows the noise spectrum of the output signal of the system when the clock input is off, that is, when there is no chopper effect. On the other hand, FIG. 22 shows a noise spectrum of an output signal of the system when the system is operated in a chopper at a clock frequency of 10 KHz.
Due to the chopper effect, 1 / f noise is reduced to about half or less as compared with FIG. Also, hum (60 Hz) noise mixed into the signal line is modulated and completely removed from the signal band. Therefore, by adopting this system, the resolution of the sensor can be improved by noise reduction.

Next, a modification of the acceleration sensor will be described with reference to FIG.

FIG. 23 shows an example of a structure in which the weight 2 is on the inside and the support 1 is on the outside. For each axial beam 3, pM
OS transistors 411 to 434 are arranged. Also in this example, by configuring a differential amplifier circuit similar to that of FIG. 7, it is possible to detect acceleration components in each axial direction.

[0181]

As described above, according to the present invention,
Since the gain of the differential amplifier circuit was determined by negative feedback processing,
Variations in sensitivity due to manufacturing errors can be reduced for stabilization, and gain changes due to temperature can be reduced to improve temperature characteristics.

Further, according to the present invention, since the compensation voltage from the compensation circuit is input to the input terminal of the differential amplifier circuit, the offset voltage and the offset voltage drift can be compensated.

Further, according to the present invention, since the compensation voltage from the compensation circuit is input to the control terminal of the current source of the differential amplifier circuit, it is possible to stabilize the sensitivity by controlling the change with temperature.

Further, according to the present invention, the switching elements of the differential amplifier circuit are replaced in synchronization with the clock, and the output signal is symmetrically inverted in synchronization with the clock to detect the output signal. The components can be separated, and noise can be reduced.

Further, according to the present invention, the stress is electrically amplified and detected by using a plurality of strain detecting elements arranged on the beam, so that the stress is compared with a conventional bridge circuit using a diffusion resistor. As a result, the detection sensitivity can be increased by increasing the output signal level, the bridge circuit can be omitted, and the load on the amplifier circuit can be reduced, so that the power consumption can be suppressed.

According to the present invention, the differential amplifier circuit is used to output the acceleration component in the detection axis direction to which the stress is applied in the differential mode, and to output the in-phase acceleration component in the other axis direction. Since the mode is output, the sensitivity ratio between the detection axis and the other axis can be increased.

Further, according to the present invention, since the differentially amplified output signal is used, the offset output and the sensitivity of the other axis can be suppressed irrespective of the variation in the manufacturing conditions.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure of an acceleration sensor as a first conventional example.

FIG. 2 is a plan view of the acceleration sensor of FIG.

FIG. 3 is a circuit diagram illustrating a Z-axis bridge circuit.

FIG. 4A is a cross-sectional view showing a second conventional example, and FIG. 4B is a plan view thereof.

FIG. 5 is a perspective view showing a structure of the acceleration sensor according to the first embodiment of the present invention.

FIG. 6 is a plan view showing the structure of a sensor unit.

FIG. 7 is an enlarged circuit diagram showing electrical wiring of the inverting amplifier.

FIG. 8 is a circuit diagram showing a configuration of a basic circuit.

FIG. 9 is a characteristic diagram showing a relationship between acceleration and output voltage.

FIG. 10 is a block diagram showing a system configuration of the present invention.

FIG. 11 is a block diagram illustrating an internal configuration of a control unit.

FIG. 12 is a circuit diagram showing an inverting amplifier.

FIG. 13 is a block diagram showing exchange of signals between an inverting amplifier and a control unit.

FIG. 14 is a characteristic diagram showing output characteristics of the sensor according to the second embodiment of the present invention.

FIG. 15 is a characteristic diagram showing a change in sensitivity to a temperature rise.

FIG. 16 is a circuit diagram showing an example of a compensation circuit using an analog circuit.

FIG. 17 is a characteristic diagram illustrating a basic configuration of a switch element according to a third embodiment of the present invention.

FIG. 18 is a characteristic diagram showing a relationship between amplifier gain and stress sensitivity.

FIG. 19 is a characteristic diagram showing a relationship between a bias of a current control transistor and acceleration sensitivity.

FIG. 20 is a characteristic diagram showing drift of sensitivity and offset with respect to temperature.

FIG. 21 is a characteristic diagram illustrating an output noise level of a differential amplifier circuit when a clock is off.

FIG. 22 is a characteristic diagram illustrating an output noise level of the differential amplifier circuit when the clock is 10 KHz.

FIG. 23 is a plan view showing a modification of the acceleration sensor.

[Explanation of symbols]

 510 Differential amplifier circuit 520 Amplifier 530 Inverting amplifier circuit 600 Control unit 700 Compensation circuit

Claims (6)

[Claims] 1. A fixed support, a movable weight portion, a thin beam connecting the support and the weight portion, and utilizing the deflection of the beam due to stress. An integrated acceleration sensor for measuring acceleration by disposing a plurality of strain detecting elements disposed on a stress concentration portion of the beam, detecting a stress applied to the beam, and a strain detecting element disposed on the support. A first amplifier circuit and a second amplifier circuit, for detecting output components output from the plurality of strain detection elements with respect to a component in a self-axis direction to which stress is applied, as a differential mode; A differential amplifier circuit for detecting a directional component as a common mode; and compensating for an offset in each of the first and second amplifier circuits in response to each output signal of the first and second amplifier circuits. Create an offset compensation signal to perform Integrated accelerometer, characterized in that the offset compensation signal comprises an offset compensation means for feeding back to the input side of each corresponding said first and second amplifier circuits. 2. The integrated acceleration sensor according to claim 1, wherein said offset compensation signal generated by said offset compensation means is input to each input terminal of said first and second amplifier circuits. 3. A temperature compensating means for generating a temperature compensating signal for compensating a temperature for each output signal of the first and second amplifier circuits subjected to the feedback processing. 3. The integrated acceleration sensor according to claim 1, wherein: 4. The integrated acceleration according to claim 3, wherein said temperature compensation signal generated by said temperature compensation means is input to control terminals of respective current sources of said first and second amplifier circuits. Sensor. 5. The integrated circuit according to claim 1, wherein the first and second amplifier circuits further include a switch element whose operation state is switched in synchronization with a clock. Acceleration sensor. 6. The integrated acceleration sensor according to claim 1, wherein said strain detecting element is a MOS transistor.