JPH111397A - Production of semi-insulating inp single crystal and semi-insulating inp single crystal substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semi-insulating InP single crystal having the uniformity of the mobility and resistivity in the wafer plane of <=5% and <=10%, respectively, and provide a process for producing the single crystal. SOLUTION: Plural InP wafers 1 are arranged in an ampule 2 interposing spaces between the wafers. Red phosphorus 3 is placed in the ampule 2 in an amount to form an atmosphere having a phosphorus vapor pressure between the dissociation pressure of InP equilibrated at the heat-treatment temperature and 5 atm and the ampule is sealed in vacuum. The ampule is placed in a horizontal furnace 6 and maintained at the heat-treatment temperature of >=930 deg.C and <1,000 deg.C for a prescribed period (the 1st heat-treatment). Subsequently, the ampule is maintained at >=300 deg.C and <800 deg.C for a prescribed period to obtain a phosphorus vapor pressure between the dissociation pressure of InP equilibrated at the heat-treatment temperature and 5 atm (the 2nd heat- treatment).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to OEIC, HEM
The present invention relates to a method for manufacturing a semi-insulating compound semiconductor used for an electronic device such as a T-ion implanted FET, and more particularly to a technique for achieving semi-insulating properties by heat treatment.

[0002]

2. Description of the Related Art A group III-V compound semiconductor has a resistivity of 10%.
^{In order} to increase the resistance to ⁶ Ω · cm or more (that is, to make the semiconductor semi-insulating), it is industrially necessary to add Fe, Co, Cr or the like as a deep acceptor to a crystal containing Si or S as a shallow donor. Used. This semi-insulating property is due to a mechanism of compensating a shallow donor with a deep acceptor. Therefore, the semi-insulating property cannot be obtained unless an element serving as a deep acceptor is added so as to be higher than the concentration of a shallow donor contained in the crystal.

However, when semi-insulating properties are obtained by doping Fe, Co, Cr or the like, it is desirable that the content of these elements be as low as possible. Because Fe, Co,
Since Cr or the like acts as a deep acceptor, in an ion-implanted electronic device (such as a FET), the activation rate of ion-implanted shallow donor-type impurities is reduced, or a device operating at a high frequency (OEIC or HE) is used.
This is because these elements diffuse into the epitaxially grown film and act as traps, which hinders high frequency and high speed. Furthermore, these F
Elements such as e are easily segregated, and the concentration of Fe or the like is different between the upper and lower portions of the crystal, so that the activation rate becomes non-uniform and the yield is reduced.

Conventionally, for example, as semi-insulating InP, F
e-doped InP is mainly used. But F
When the concentration of e or the like is less than 0.2 ppmw, the resistivity becomes 1
0 ⁶ Ω · cm becomes lower than, the semi-insulating property is lowered. In order to make this a semi-insulating crystal, the concentration of Fe or the like had to be higher than a certain concentration (0.2 ppmw). In general, a group III-V compound semiconductor is Fe,
It is considered that the resistivity decreases when the concentration of Cr or the like decreases, because the impurity element serving as a shallow donor exists in the crystal as a residual impurity up to that level.
However, the present inventor believes that the mechanism of semi-insulating InP single crystal involves not only compensation by a shallow donor and a deep acceptor, but also electrically active point defects. By controlling the concentration of point defects by heat-treating the crystal, it is possible to obtain a semi-insulating group III-V compound semiconductor even if the impurity element concentration of the deep acceptor is much lower than the conventional one. Was.

[0005] The applicant hereby prescribes that Fe, Co
Or the sum of the concentrations of any one or more of Cr is 0.2
The present invention has proposed a compound semiconductor manufacturing technology having a ppmw or less and a resistivity of 10 ⁷ Ω · cm or more (Japanese Patent Publication No. 5-2963).
No. 9). In order to process a plurality of wafers at the same time, each wafer is aligned at substantially equal intervals using a jig, and is applied to a quartz ampoule.
An InP wafer (compound semiconductor) cut out from a single crystal prepared by, for example, a melt growth method containing 0.2 ppmw or less of Co or Cr is vacuum-sealed in a quartz ampule, and red phosphorus is arranged in the quartz ampule. The partial pressure of phosphorus in the ampoule is set to a pressure not lower than the dissociation pressure of InP, and the quartz ampoule is heated at 400 to 640 ° C. In the prior invention, after our research, even if the undoped or InP single crystal in which the concentration of one or more of the impurity elements of Fe, Co or Cr is 0.05 ppmw or less is heat-treated, half of the It turned out that it did not become insulating.

Therefore, the present applicant has further studied, and as an improvement plan, first of all, Fe, Co or Cr existing as a residual impurity without intentionally adding impurities together with red phosphorus in a quartz ampoule. A method of heat-treating an InP wafer having a total concentration of any one or more of 0.05 ppmw or less in an atmosphere having a phosphorus partial pressure exceeding 6 kg / cm ^{2, such} that the total concentration of the impurity elements is 0. 05 ppmw or less, the resistivity at 300K is 10 ⁶ Ω · cm or more, and the mobility is 3000 cm ² / V · s.
III-V compound semiconductors (InP) that are more than semi-insulating
(Japanese Patent Application Laid-Open No. 3-279299).
No., "Semi-insulating InP single crystal and its manufacturing method"). The semi-insulating group III-V compound semiconductor (I
nP) is 0.05% of the total concentration of impurities contained in the crystal, in particular, at least one of Fe, Co and Cr.
By setting the content to ppmw or less, a decrease in mobility due to contained impurities is suppressed, and the mobility is set to a desired value or more. However, following our research, Japanese Patent Application Laid-Open No. 3-279299
In the invention proposed in (1), a high resistivity and high mobility InP single crystal can be obtained, but when a plurality of wafers are heat-treated at the same time, a wafer having high resistance and high mobility does not occur. It has been found that a high resistivity and high mobility InP single crystal cannot always be obtained stably.

[0007]

Therefore, the present applicant has conducted further studies, and has conducted a study without intentionally adding impurities and the concentration of at least one of Fe, Co and Cr present as residual impurities. An InP single crystal having a total of 0.05 ppmw or less is subjected to a temperature of 930 ° C. or more and less than 1000 ° C. and a dissociation pressure of InP equilibrated at that temperature of 15% or more.
After the first heat treatment step of performing heat treatment in a phosphorus vapor pressure atmosphere of atm or less, a second heat treatment step of performing heat treatment in a phosphorus vapor pressure atmosphere of more than 640 ° C. and less than 900 ° C. and 5 atm to 50 atm is performed. The semi-insulating In
A technology for manufacturing P single crystal was proposed (Japanese Patent Application No. 9-713).
No. 74, "Method for producing semi-insulating InP single crystal and semi-insulating InP single crystal substrate").

However, according to the subsequent study by the inventors of the present invention, in the invention of Japanese Patent Application No. 9-71374, a high resistivity and high mobility InP single crystal can be obtained stably, and It has been found that the uniformity of the resistivity and the mobility can be improved. However, since the second heat treatment is performed at 5 atm or more, a high-pressure vessel is required, and the first and second heat treatments are performed. However, it was found that there was a problem that the phosphorous pressure had to be individually controlled, so that it had to be sealed in separate ampules and the cost was increased.

The present invention has been made in view of the above circumstances, and an object thereof is to obtain a semi-insulating InP single crystal having good uniformity of resistivity and mobility in a wafer surface at low cost and simply. It is an object of the present invention to provide a method for producing a semi-insulating InP single crystal that can be used.

Another object of the present invention is to provide a semi-insulating InP having a mobility uniformity of 5% or less in a wafer plane.
5% mobility uniformity on single crystal substrate or wafer surface
An object of the present invention is to provide a semi-insulating InP single crystal substrate having a resistivity of not more than 10% and a uniformity of resistivity in a wafer surface of 10% or less.

[0011]

Means for Solving the Problems In order to achieve the above object, the present inventors have conducted intensive studies. As a result, after heat-treating an undoped InP single crystal in a high-temperature and low-phosphorus vapor pressure atmosphere, a low-temperature and low-temperature When heat treated in a phosphorus vapor pressure atmosphere,
It has been found that a semi-insulating InP single crystal having both good in-plane resistivity and uniform mobility can be obtained at low cost and easily.

The present invention has been made on the basis of the above-mentioned findings, and the total concentration of at least one of Fe, Co, and Cr present as residual impurities without intentionally adding impurities is 0.1%. After the first heat treatment step of subjecting the InP single crystal of not more than 05 ppmw to a phosphorus vapor pressure atmosphere at a temperature of not less than 930 ° C. and less than 1000 ° C. and a dissociation pressure of InP and not more than 5 atm equilibrated at that temperature,
The method is characterized in that a second heat treatment step is performed in a phosphorus vapor pressure atmosphere at a temperature of 0 ° C. or more and less than 800 ° C. and a equilibrium at the dissociation pressure of InP or more and less than 5 atm. In the present invention, the phosphorus vapor pressure in the first heat treatment step is preferably larger than 0.5 atm and smaller than 5 atm,
More preferably, it is more than 1.0 atm and less than 5 atm. Further, the phosphorus vapor pressure in the second heat treatment step is as follows:
Preferably, it is not less than 1.0 atm and less than 5 atm.

An example of the dissociation pressure of InP is Philips Research Report (Philips Res.
p.) Volume 12 (1957) 127-140 "THE PTx PHASE DI
AGRAMS OF THE SYSTEMS In-As, Ga-As AND In-P "
Page 38, FIG. 8. Is shown in The FIG. 8.
By extrapolating the line on the left and its line at
The dissociation pressure of P is determined.

Here, in the first heat treatment step, the reason why the heat treatment temperature is 930 ° C. or more and less than 1000 ° C. is as follows.
This is because if the temperature is lower than 0 ° C., InP does not become semi-insulating, whereas if it is higher than 1000 ° C., InP decomposes. In the first heat treatment step, the reason why the phosphorus vapor pressure is equal to or higher than the dissociation pressure of InP at equilibrium at the heat treatment temperature and equal to or lower than 5 atm is that if the dissociation pressure is lower than InP, the InP is decomposed. Since the temperature is high, contamination of Fe, Co, Cr, Ni and the like cannot be ignored, and a high-pressure container is required, so that the first and second heat treatments cannot be performed in a single low-pressure container.

[0015] In the second heat treatment step, the heat treatment temperature is 300 ° C or more and less than 800 ° C, preferably 450 ° C or more and 750 ° C or less, particularly preferably 550 ° C or more and 650 ° C.
The reason is that even if the temperature is lower than 300 ° C., no inconvenience in particular occurs, but if the temperature is lower than 300 ° C., the annealing time is too long to be practical. This is because the effect of chemical conversion does not appear. Further, in the second heat treatment step, the reason why the pressure is equal to or higher than the dissociation pressure of InP equilibrated at that temperature and lower than 5 atm is that when the dissociation pressure is lower, the uniformity of the mobility exceeds 5%, and on the other hand, 5 atm or higher. In this case, industrial productivity is lacking because a high-pressure container is required. further,
The phosphorus vapor pressure in the second heat treatment step is preferably 1.0 atm
The reason why it is less than 5 atm is that if it is less than 1.0 atm, the uniformity of resistivity may exceed 10% in some cases.

According to the above means, the first heat treatment step suppresses the incorporation of impurities such as Ni and Co while keeping the InP
A small amount of Fe in the single crystal is activated, and the concentration of a shallow donor (shallow donor) related to phosphorus vacancies is reduced, so that the InP single crystal becomes semi-insulating. And
By the second heat treatment step, the shallow donor remaining in the InP single crystal is further reduced, so that the in-plane resistivity of the InP single crystal is made uniform.

Further, the semi-insulating InP single crystal substrate of the present invention has a total content of at least one of Fe, Co and Cr present as residual impurities without intentionally adding impurities. After the first heat treatment step of heat-treating the InP single crystal of 0.05 ppmw or less in a phosphorus vapor pressure atmosphere at a temperature of 930 ° C. or more and less than 1000 ° C. and a dissociation pressure of InP and 5 atm or less equilibrated at that temperature, 30
Obtained by performing a second heat treatment step of performing a heat treatment in a phosphorus vapor pressure atmosphere at a temperature of 0 ° C. or more and less than 800 ° C. and at an equilibrium at that temperature and an InP dissociation pressure of 5 atm or more and less than 5 atm. Is 5% or less.

Furthermore, the semi-insulating InP single crystal substrate of the present invention has a total content of at least one of Fe, Co and Cr present as residual impurities without intentionally adding impurities. InP of 0.05 ppmw or less
After the first heat treatment step in which the single crystal is heat-treated at a temperature of 930 ° C. or more and less than 1000 ° C. and in a phosphorus vapor pressure atmosphere at a temperature equal to or higher than the dissociation pressure of InP and 5 atm or less, 3
At a temperature of from 00 ° C to less than 800 ° C and at a temperature equal to or higher than the InP dissociation pressure and less than 5 atm, preferably
second heat treatment in a phosphorus vapor pressure atmosphere of at least 5 m and less than 5 atm
Wherein the uniformity of the mobility in the wafer surface is 5% or less and the uniformity of the resistivity in the wafer surface is 10% or less. .

The "uniformity of the resistivity in the wafer surface" or "uniformity of the mobility in the wafer surface" means that a portion excluding the outer peripheral portion 5 mm of the wafer is defined in a specific direction (wafer (The center part of the measured value) is measured at regular intervals (standard deviation of the obtained value / average value) × 100 (%). That is, when the data y1, y2, y3,..., Yn are obtained, the uniformity is determined by converting yav to the data y1, y2, y3,.
..., the average of yn

[0020]

(Equation 1) It is represented by

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Fe, Co or C present as a residual impurity without intentionally adding impurities
The total concentration of any one or more of r is 0.05 ppmw
Wafer (thin plate) cut from the following InP single crystal
As shown in FIG. 1, a plurality of 1, 1,... Are arranged in a quartz ampule 2 at intervals using a quartz jig 4 serving as a spacer. Subsequently, an appropriate amount of high-purity red phosphorus 3 was placed in the quartz ampule 2 so that the inside of the quartz ampule 2 became a phosphorus vapor pressure atmosphere having a dissociation pressure of InP equal to or higher than the heat treatment temperature and 5 atm or less and evacuated. Thereafter, the opening of the quartz ampule 2 is sealed with an oxyhydrogen burner. Subsequently, the quartz ampoule 2 is set in a horizontal heating furnace 6 and is heated and held by the heater 5 at a heat treatment temperature of 930 ° C. or more and less than 1000 ° C. for a predetermined time (first heat treatment step).

In the first heat treatment step, if the heat treatment temperature is lower than 930 ° C., InP does not become semi-insulating,
Above 0 ° C., InP decomposes. Further, if the phosphorus vapor pressure atmosphere is lower than the dissociation pressure of InP, InP is decomposed, and if it exceeds 5 atm, contamination of Cr, Ni, etc. cannot be ignored, and a high-pressure vessel is required. Cannot be carried out in one low-pressure container. Further, the phosphorus vapor pressure atmosphere is preferably larger than 0.5 atm and 5 atm.
m, more preferably more than 1.0 atm and less than 5 atm, the variation in characteristics between wafers in the same lot becomes smaller.

Subsequently, the temperature of 300 ° C. or more and 80
After the heat treatment temperature is lower than 0 ° C., the heat treatment is performed for a predetermined time (second heat treatment step).

In the second heat treatment step, if the heat treatment temperature is lower than 300 ° C., a long time is required for annealing, and if the heat treatment temperature is higher than 800 ° C., the effect of making the resistivity in the wafer plane uniform is not exhibited.
If the vapor pressure of phosphorus is lower than the dissociation pressure, decomposition of phosphorus will occur,
The resistance is lowered, and if it is 5 atm or more, it is not suitable for industrial production because a high pressure vessel is required. Further, the phosphorus vapor pressure is preferably not less than 1.0 atm and less than 5 atm. The reason is that if it is less than 1.0 atm, the uniformity of resistivity may exceed 10%.

Thereafter, the wafer is cooled to room temperature, and the InP wafers 1, 1,.

According to the above embodiment, in one quartz ampoule 2 for low pressure, the first heat treatment step makes the InP single crystal semi-insulating, and remains in the InP single crystal by the second heat treatment step. Since defects are reduced, the in-plane resistivity of the InP single crystal is made uniform. Therefore, the uniformity of the resistivity and the mobility in the wafer surface is good, and the semi-insulating In
P single crystal can be obtained inexpensively and easily.

[0027]

EXAMPLES The features of the present invention will be clarified below with reference to specific examples, but the present invention is not limited by the following examples.

(Example 1) From the polycrystalline InP raw material, the content of Fe was 0.03 ppmw, and the content of Co and Cr was lower than the analytical detection lower limit (0%) by the liquid sealing Czochralski (LEC) method. .0.5 ppmw) or less, 0.5 mm thick InP wafers 1, 1,... Were cut out. Then, as shown in FIG. 1, 30 InP wafers 1, 1,... Were arranged in a plurality of quartz ampules 2 at intervals using a quartz jig 4. Subsequently, the purity was 7
N red phosphorus 3 is placed in each quartz ampoule 2 and 1 × 10
After evacuation to ^-6 Torr, the opening of each quartz ampule 2 was sealed with an oxyhydrogen burner. At this time, the amount of red phosphorus 3 in each quartz ampule 2 was adjusted so that the phosphorus (P ₄ ) partial pressure became 1.5 atm at the heat treatment temperature of 950 ° C. Subsequently, the quartz ampules 2 were placed one by one in a horizontal heating furnace 6 and heated and held at 950 ° C. for 40 hours by a heater 5 (corresponding to a first heat treatment step). Next, the temperature 650
℃, the partial pressure of phosphorus 1.1atm
Hold for a time (corresponding to the second heat treatment step). Then, cool to room temperature at a rate of 2 ° C./min.
, Were taken out of the InP wafer.

After the heat treatment, the in-plane resistivity and mobility of the <001> orientation of the (001) InP wafers 1, 1,... Were examined by a three-terminal guard ring method (hole measurement). The measurement interval is 100 μm, and the number of measurement points is 401.

As a result, the in-plane resistivity of one wafer was 2.3 × 10 ^{7 to} 3.5 × 10 ⁷ Ω · cm, and the uniformity was 5% or less. The in-plane mobility of one wafer was 4100 to 4300 cm ² / V · s, and the uniformity was 2% or less.

[0031]

According to the method for producing a semi-insulating InP single crystal according to the present invention, one or more of Fe, Co and Cr present as residual impurities without intentionally adding impurities is contained. An InP single crystal having a total concentration of 0.05 ppmw or less is heated at a temperature of 930 ° C. or more and less than 1000 ° C. and at a dissociation pressure of InP balanced at that temperature of 5 at or more.
m, preferably greater than 0.5 atm and less than 5 atm,
More preferably, after the first heat treatment step of performing heat treatment in a phosphorus vapor pressure atmosphere of more than 1.0 atm and less than 5 atm, subsequently at a temperature of 300 ° C or more and less than 800 ° C, and at an InP dissociation pressure equilibrium at that temperature and less than 5 atm, Preferably, the second heat treatment step in which the heat treatment is performed in a phosphorus vapor pressure atmosphere of 1.0 atm or more and less than 5 atm is performed, so that one low-pressure quartz ampule has good mobility and uniformity of resistivity in the wafer surface. A semi-insulating InP single crystal, particularly a semi-insulating InP single crystal having a uniformity of mobility in a wafer plane of 5% or less and a uniformity of resistivity in a wafer plane of 10% or less, can be obtained inexpensively and easily. Can be

[Brief description of the drawings]

FIG. 1 is a schematic view showing a state in which a wafer is installed in a heating furnace used for manufacturing a semi-insulating InP single crystal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Wafer (InP single crystal) 2 Quartz ampoule 3 Red phosphorus 4 Quartz jig 5 Heater 6 Horizontal heating furnace

Claims (3)

[Claims] 1. An InP single crystal in which a total concentration of at least one of Fe, Co, and Cr present as residual impurities is 0.05 ppmw or less without intentionally adding impurities, at 930 ° C. At a temperature lower than 1000 ° C. and higher than the dissociation pressure of InP equilibrated at that temperature and higher than 5 atm.
After the first heat treatment in which the heat treatment is performed in a phosphorus vapor pressure atmosphere described below, the second heat treatment is performed in a phosphorus vapor pressure atmosphere at a temperature of 300 ° C. or more and less than 800 ° C. and a dissociation pressure of InP and less than 5 atm which is equilibrated at that temperature. A method for producing a semi-insulating InP single crystal, comprising performing a heat treatment step. 2. A semi-insulating InP single crystal substrate, wherein the uniformity of mobility within a wafer surface is 5% or less. 3. The semi-insulating In according to claim 2, wherein the uniformity of the resistivity in the wafer surface is 10% or less.
P single crystal substrate.