JPH11135762A - Semiconductor substrate and manufacture thereof, and method for separating semiconductor layer from substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance producibility of a semiconductor base body and lower costs, by a method wherein adhered first and second base bodies are separated in a porous semiconductor layer and the first base body obtained by the separation is reused for manufacturing of a semiconductor base body. SOLUTION: First, a first Si single crystal substrate 11 is prepared and the surface layer is made as a porous property 12, and a non-porous single crystal Si layer 13 is formed on a porous Si layer 12. Next, after more one Si support substrate 14 is closely adhered to the single crystal Si layer 13 via an insulation layer 15 at a room temperature, they are adhered by anode junction, etc. Next, the substrate is isolated by the porous Si layer 12. Further, the porous Si layer 12 on a first Si single crystal substrate side is selectively removed. The first Si single crystal substrate 11 removes a residue porous Si, and when a surface flatness is roughed to an unallowable degree, after a surface flatness is made, it is possible to reuse for manufacturing of a semiconductor base body as the first Si single crystal substrate 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor substrate, a method for separating a semiconductor layer from a substrate, and a semiconductor substrate. More specifically, a method for producing a single crystal semiconductor on a dielectric isolation or insulator, a single crystal compound semiconductor on a semi-moving body substrate, an electronic device formed on a single crystal semiconductor layer, and a semiconductor substrate suitable for an integrated circuit It is about the method.

[0002]

2. Description of the Related Art The formation of a single-crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique, and has many advantages that cannot be attained by a bulk Si substrate for fabricating a normal Si integrated circuit. Much research has been done because devices using SOI technology have a. That is, by using the SOI technology, 1. High dielectric integration can be easily achieved; 2. Excellent radiation resistance. 3. Higher speed due to reduced stray capacitance. 4. Well step can be omitted; 5. Latch-up can be prevented. It is possible to obtain a fully-depleted field-effect transistor by thinning the film.

[0003] In order to realize many of the above advantages in device characteristics, researches have been made on a method of forming an SOI structure for several decades. The contents are summarized in, for example, the following documents.

[0004] Special Issue: "Sing
le-crystal silicon on non
-Single-crystal insulator
edited by GW Cullen, J
own of Crystal Growth,
volume 63, no3, pp429-590 (1
983). In the old days, Si was converted to CV on a single crystal sapphire substrate.
S (silicon on sapphire), which is formed by heteroepitaxy in D (Chemical Vapor Deposition), is known, and although it has achieved some success as the most mature SOI technology, the interface between the Si layer and the underlying sapphire substrate A large amount of crystal defects due to the lattice mismatch, the incorporation of aluminum from the sapphire substrate into the Si layer, and above all, the delay in increasing the substrate cost and area, has hindered the spread of its application. In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two.

[0005] 1. After oxidizing the surface of the Si single crystal substrate, a window is opened to partially expose the Si substrate, and the portion is used as a seed to epitaxially grow laterally to form a Si single crystal layer on SiO ₂ . (In this case, a Si layer is deposited on SiO _2. ) The Si single crystal substrate itself is used as an active layer, and SiO ₂ is formed below the active layer. (This method does not involve the deposition of a Si layer.) In addition, devices on compound semiconductors have high performance that cannot be obtained with Si, such as high speed and light emission.
At present, most of these devices are formed by epitaxial growth on a compound semiconductor substrate such as GaAs.

However, compound semiconductor substrates have problems such as being expensive, having low mechanical strength, and making it difficult to form large-area wafers.

[0007] For these reasons, attempts have been made to heteroepitaxially grow a compound semiconductor on a Si wafer which is inexpensive, has high mechanical strength, and can produce a large-area wafer.

[0008]

As means for realizing the above item 1, a method of directly growing a single crystal layer Si in a lateral direction by CVD, a method of depositing amorphous Si and performing a solid phase lateral epitaxial growth by a heat treatment. Method, a method of converging and irradiating an energy beam such as an electron beam or a laser beam to an amorphous or polycrystalline Si layer, growing a single crystal layer on SiO ₂ by melting and recrystallization, and a strip shape by a rod-shaped heater. Method for Scanning the Melted Area (Zone Melting Recrystry)
zation) is known. Each of these methods has its advantages and disadvantages, but its controllability, productivity, uniformity,
It leaves a great deal of quality problems, and none has been commercialized yet. For example, the CVD method requires sacrificial oxidation to make a thin film flat, and the solid phase growth method has poor crystallinity. Further, the beam annealing method has a problem in controllability such as processing time by convergent beam scanning, beam overlap, focus adjustment, and the like. Of these, Zone M
Although the eluting recrystallization technique is the most mature, and relatively large-scale integrated circuits have been prototyped, a large number of crystal defects such as sub-grain boundaries still remain. Not.

In the above method 2 in which the Si substrate is not used as a seed for epitaxial growth, the following 4 methods are used.
There are different methods.

[0010] 1. An oxide film is formed on a Si single crystal substrate having a V-shaped groove anisotropically etched on its surface, and a polycrystalline Si layer is deposited on the oxide film as thick as the Si substrate, and then polished from the back surface of the Si substrate Thereby, a dielectrically separated Si single crystal region surrounded by V grooves is formed on the thick polycrystalline Si layer.
In this method, the crystallinity is good, but the polycrystalline S
There is a problem in terms of controllability and productivity in the step of depositing i several hundred microns thick and in the step of polishing a single crystal Si substrate from the back surface to leave only the separated Si active layer.

2. Simox (SIMOX: Sepe
ratio by ion implanted o
xygen) is a method of forming a SiO ₂ layer by ion implantation of oxygen into a Si single crystal substrate, and is the most mature method at present because of its good compatibility with the Si process. However, in order to form a SiO ₂ layer,
Oxygen ions must be implanted at 10 ¹⁸ ions / cm ² or more, but the implantation time is long, the productivity is not high, and the wafer cost is high. Furthermore, many crystal defects remain, and from an industrial point of view, the quality has not reached a level sufficient to produce a minority carrier device.

3. A method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method uses P-type Si
Proton ion implantation of an N-type Si layer on the surface of the single crystal substrate,
(Imai et al., J. Crystal Growth, vo.
163, 547 (1983)) or an island formed by epitaxial growth and patterning, and anodized in an HF solution so as to surround the Si island from the surface.
After only the porous Si substrate is made porous, N
This is a method of dielectrically separating the Si islands. In this method, the separated Si region is determined before the device process, and there is a problem that the degree of freedom in device design may be limited.

In addition to the conventional SOI forming method as described above, in recent years, a Si single crystal substrate has been bonded to another thermally oxidized Si single crystal substrate using a heat treatment or an adhesive to form an SOI structure. The method of forming has attracted attention. This method requires that the active layer for the device be uniformly thinned. That is, it is necessary to reduce the thickness of a Si single crystal substrate having a thickness of several hundred microns to the order of microns or less. There are two types of thinning as described below.

1. 1. Thinning by polishing Thinning by Selective Etching It is difficult to make a uniform thin film by the first polishing. In particular, when the thickness is reduced to a submicron, the variation becomes tens of percent, and the uniformity is a serious problem. Further, as the diameter of the wafer increases, the difficulty level only increases.

Further, although the second etching is effective for uniform thinning, - at most 10 ² and the surface is poor ion implantation after the selective ratio is insufficient etching, a high concentration B-doped Si layer There are problems such as poor crystallinity of the SOI layer due to the use of epitaxial growth or heteroepitaxial growth of C. Harendt, et. Al., J. Elec.
t. Mater. Vol. 20, 267 (1991),
H. Baumgart, et. al. , Extende
d Abstract of ECS 1st Int
electronic Symposium of W
afer Bonding, pp-733 (199
1), C.I. E. FIG. Hunt, Extended Abst
ract of ECS 1st International
nal Symposium of Wafer Bo
nding, pp-696 (1991)).

Further, the semiconductor substrate using the bonding is
Inevitably, two wafers are required, and one of them is almost completely removed and discarded by polishing, etching, etc., and wastes limited earth resources.

Therefore, in the SOI by bonding, the current method has many problems in controllability, uniformity, and economy.

On a light-transmitting substrate represented by glass, the deposited thin-film Si layer is generally amorphous, reflecting the disorder of the substrate, due to the disorder of its crystal structure. It is only a polycrystalline layer at best, and a high-performance device cannot be manufactured. This is due to the fact that the crystal structure of the substrate is amorphous, and even if a Si layer is simply deposited, a high-quality single crystal layer cannot be obtained.

The light-transmitting substrate is important in forming a contact sensor as a light receiving element or a projection type liquid crystal image display device. In order to further increase the density, resolution, and precision of pixels (picture elements) of sensors and display devices, high-performance driving elements are required. As a result, it is necessary that the element provided on the light transmitting substrate be manufactured using a single crystal layer having excellent crystallinity.

Therefore, it is difficult to produce a drive element having the required or sufficient performance for amorphous Si or polycrystalline Si due to the crystal structure having many defects.

As described above, a compound semiconductor substrate is indispensable for manufacturing a compound semiconductor device. However, compound semiconductor substrates are expensive, and it is very difficult to increase the area.

Further, attempts have been made to epitaxially grow a compound semiconductor such as GaAs on a Si substrate, but the grown film has poor crystallinity due to differences in lattice constants and thermal expansion coefficients, and it is difficult to apply the film to devices. It has become very difficult.

Although attempts have been made to epitaxially grow a compound semiconductor on porous Si in order to alleviate lattice misfit, devices are being manufactured due to the low thermal stability of porous Si, its aging, and the like. Alternatively, it lacks stability and reliability as a substrate after fabrication.

Under these circumstances, Takao Yonehara, the inventor of the present invention, has taken the above-mentioned problems into consideration and has previously described Japanese Patent Application Laid-Open No. 5-213.
No. 38 proposes a novel method for manufacturing a semiconductor member.

The method disclosed in this publication is as follows. That is, a member in which a non-porous single-crystal semiconductor region is arranged on a porous single-crystal semiconductor region is formed, and the surface of the member whose surface is made of an insulating material is formed on the surface of the non-porous single-crystal semiconductor region. After bonding, the porous single-crystal semiconductor region is removed by etching.

This method is an excellent one that can solve the above-mentioned problems. However, if the method disclosed in this publication is further developed to further improve the productivity of the semiconductor substrate and reduce the cost, the contribution to the industry in the technical field will be extremely large.

[Object of the Invention] An object of the present invention is to provide a method of manufacturing a semiconductor substrate, which is a further improvement of the method disclosed in the above-mentioned publication.

Another object of the present invention is to provide a semiconductor layer or compound semiconductor active layer formed on a surface by using a single crystal substrate which is excellent in economical efficiency, is uniform and flat over a large area, and has extremely excellent crystallinity. An object of the present invention is to provide a method for manufacturing a semiconductor substrate in which a layer is left and one side thereof is removed from the active layer to the active layer to obtain a single crystal layer or a compound semiconductor crystal layer having extremely few defects on an insulator.

Still another object of the present invention is to provide a transparent substrate (light-transmitting substrate) having a crystallinity as high as that of a single crystal wafer.
Alternatively, in obtaining a compound semiconductor single crystal layer, productivity,
An object of the present invention is to propose a method for manufacturing a semiconductor substrate which is excellent in terms of uniformity, controllability, and cost.

Still another object of the present invention is to provide a large-scale integrated circuit having an SOI structure even when an expensive SOS or SI
An object of the present invention is to propose a method for manufacturing a semiconductor substrate which can be used as a substitute for MOX.

[0031]

The method of manufacturing a semiconductor substrate according to the present invention has the following configuration.

That is, the method for manufacturing a semiconductor substrate of the present invention comprises:
Providing a first base having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate; and connecting the first base and the second base to the non-porous single-crystal semiconductor layer. A bonding step of bonding the crystal semiconductor layer so that the crystal semiconductor layer is located on the inside, wherein the method further comprises the step of manufacturing a semiconductor substrate having the non-porous single crystal semiconductor layer on the second substrate. And a separating step of separating the second substrate in the porous semiconductor layer, and using at least a part of the first substrate obtained by the separating step to prepare the first substrate again. A method for manufacturing a semiconductor substrate.

A step of preparing a first base having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate; and the step of: A bonding step of bonding the non-porous single-crystal semiconductor layer so that the non-porous single-crystal semiconductor layer is positioned on the inner side, wherein a method of manufacturing a semiconductor substrate having the non-porous single-crystal semiconductor layer on the second substrate is performed. A method of manufacturing a semiconductor substrate, further comprising: a separation step of applying an external force to the combined first and second substrates to separate the first and second substrates at the porous semiconductor layer.

A step of preparing a first base having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate, and the step of: A bonding step of bonding the non-porous single-crystal semiconductor layer so that the non-porous single-crystal semiconductor layer is positioned on the inner side, wherein a method of manufacturing a semiconductor substrate having the non-porous single-crystal semiconductor layer on the second substrate is performed. A step of selectively etching and separating the porous semiconductor layer from the combined end faces of the first and second substrates.

Further, a non-porous single-crystal semiconductor layer is formed on a substrate via a porous layer, and then mechanically destructed inside the porous layer, whereby the non-porous single-crystal semiconductor is removed from the substrate. There is also provided a method for separating a semiconductor layer from a substrate, wherein the semiconductor layer is separated.

Further, a porous silicon layer is formed by anodizing a surface layer of a single crystal silicon substrate, a single crystal silicon semiconductor layer is epitaxially grown on the porous silicon layer, and then the inside of the porous silicon layer is formed. And causing the single-crystal silicon semiconductor layer to be separated from the single-crystal silicon substrate by causing mechanical destruction of the semiconductor layer.

The present invention is also a semiconductor substrate manufactured by the above method.

[0038]

According to the present invention, a substrate formed by bonding is separated by a porous layer, and the porous layer on the second substrate on which the non-porous single-crystal semiconductor layer is disposed is removed, thereby achieving a high performance. A semiconductor substrate on which a high-quality non-porous single-crystal semiconductor layer is arranged can be formed. In addition, the substrate formed by bonding is separated by a porous layer, and the porous layer constituting the first substrate is removed. Can be reused. This further improves the productivity of the semiconductor substrate and lowers the cost.

According to the present invention, it is possible to obtain a single crystal layer of Si or the like or a compound semiconductor single crystal layer having excellent crystallinity on a substrate such as a transparent substrate (light transmitting substrate) as well as a single crystal wafer. It is possible to propose a method for manufacturing a semiconductor substrate which is excellent in terms of productivity, uniformity, controllability and cost.

Further, according to the present invention, even when a large-scale integrated circuit having an SOI structure is manufactured, an expensive SOS or SIM is required.
It is possible to propose a method for manufacturing a semiconductor substrate which can be substituted for OX.

In the present invention, the substrate can be separated into two or more through the porous layer, and one of the separated substrates can be used as a semiconductor substrate after removing the residual porous material. After removing the remaining porous material, the other substrate can be used again for manufacturing a semiconductor substrate.

In the present invention, a porous layer and a non-porous single-crystal layer are formed on both sides of a substrate, and two different substrates are bonded together so as to sandwich the single-crystal layer. By separating the substrates by the above, two semiconductor substrates can be manufactured at the same time.

[0043]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor substrate according to the present invention will be described below in detail by taking silicon as an example.

The mechanical strength of porous Si is
Although it depends on y, it is considered to be sufficiently weaker than bulk Si. For example, if the porosity is 50%, the mechanical strength can be considered to be half that of the bulk. That is, when compressive, tensile or shearing force is applied to the bonded wafer, first, the porous Si layer is destroyed. In addition, if the porosity is increased, the porous layer can be broken with a weaker force.

The Si substrate can be made porous by anodization using an HF solution. This porous Si layer has a higher H density than the density of single crystal Si of 2.33 g / cm ^3.
By changing the F solution concentration to 50 to 20%, the density can be changed to a range of 1.1 to 0.6 g / cm ³ . This porous layer is made of N-type Si for the following reason.
It is not formed on a layer but is formed only on a P-type Si substrate. According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer.

The porous Si was prepared by Uhlir et al.
It was discovered in 56 in the course of research on semiconductor electropolishing (A. Uhlir, Bell Syst. Tech.
J. , Vol. 35, 333 (1956)).

Further, Unagami and the like are formed of Si in anodization.
And reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows (T. Unagami, J. Electroche).
m. Soc. , Vol. 127, 476 (198
0)).

Si + 2HF + (2-n) e ⁺ → SiF ₂
+ 2H ⁺ + ne ^- SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4-λ) e ⁺ → SiF ₄ + 4H ⁺ + λ
e ⁻ SiF ₄ + 2HF → H ₂ SiF ₆ Here, e ⁺ and e ⁻ represent holes and electrons, respectively. Further, n and λ are the number of holes required for dissolving the Sil atom, respectively, and it is assumed that porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

From the above, it can be seen that P-type Si having holes exists.
Is made porous, but N-type Si is not made porous. The selectivity in this porous formation has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Yasuno, Onaka, Kajiwara, IEICE Technical Report, vol. 79, SSD 79-9).
549 (1979)), (K. Imai, Solid-
State Electronics, vol. 24,
159 (1981)).

However, there is a report that high-concentration N-type Si is made porous (RP Holmstrom).
and J.J. Y. Chi, Appl. Phys. Let
t. , Vol. 42, 386 (1983)), P type, N
It is important to select a substrate that can realize porosity regardless of the type.

According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer, and the density thereof is less than half that of single crystal Si. Regardless, single crystallinity is maintained, and it is also possible to epitaxially grow a single crystal Si layer on the porous layer. However, 1000 ° C
Above, rearrangement of the internal holes occurs, and the characteristics of the accelerated etching are impaired. Therefore, the epitaxial growth of the Si layer includes molecular beam epitaxial growth, plasma CV
D, low-temperature growth such as low-pressure CVD, optical CVD, bias sputtering, and liquid phase growth are considered suitable.

The density of the porous layer is reduced to less than half since a large amount of voids are formed inside the porous layer. As a result, the surface area is dramatically increased as compared with the volume, so that the chemical etching rate is significantly increased as compared with the ordinary etching rate of the single crystal layer.

Embodiment 1 As shown in FIG. 1A, first, a first Si single crystal substrate 11 is prepared, the surface layer thereof is made porous 12, and a non-porous A crystalline single-crystal Si layer 13 is formed (FIG. 1B).

Next, as shown in FIG. 1C, the other Si support substrate 14 and the single crystal Si
And then bonded together by anodic bonding, pressing, heat treatment, or a combination thereof. As a result, the Si support substrate 14 and the single crystal layer 13 are firmly bonded via the insulating layer 15. The insulating layer 15 is formed on at least one of the single crystal Si layer and the Si support substrate 14, or is bonded by sandwiching three thin insulating plates.

Next, the substrate is separated by the porous Si layer 12 (FIG. 1D). The Si support substrate side is porous Si12 /
It has a structure like the single crystal Si layer 13 / insulating layer 15 / Si support substrate 14.

Further, the porous Si 12 is selectively removed. An etching solution of normal Si, hydrofluoric acid as a selective etching solution of porous Si, or a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to hydrofluoric acid, or buffered hydrofluoric acid or buffered hydrofluoric acid A single crystal in which only porous Si12 is subjected to electroless wet chemical etching to form a thin film on the insulating substrate 15 + 14 using at least one kind of a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to hydrofluoric acid. S
The i-layer 13 is left and formed. As described in detail above, the enormous surface area of porous Si makes it possible to selectively etch only porous Si with an ordinary Si etchant.

Alternatively, the porous Si 12 is removed by selective polishing using the single crystal Si layer 13 as a polishing stopper.

FIG. 1E shows a semiconductor substrate obtained by the present invention. Single-crystal Si on insulating substrate 15 + 14
The semiconductor substrate obtained in this manner is such that the layer 13 is flattened and uniformly thinned and is formed over a large area over the entire wafer. can do.

If the first Si single crystal substrate 11 has the residual porous Si removed and the surface flatness is unacceptably rough, after the surface flattening is performed, the first S single crystal substrate 11 is again formed.
Used as i-single-crystal substrate 11.

In the present invention, as a method of separating two substrates by a porous Si layer, a method of pressing both sides of a bonded substrate to crush the porous layer, a method of pulling each substrate to both sides, and separating the two. A method of inserting a jig into the porous layer, a method of applying a force in a direction parallel to the surface of the bonded substrate, a method of applying ultrasonic vibration to the porous layer, and the like.

In the present invention, porous Si suitable for separation
The porosity of the layer is generally between 10 and
It is in the range of 80%, more preferably in the range of 20 to 60%.

Embodiment 2 As shown in FIG. 2A, first, a first Si single crystal substrate 21 is prepared, the surface layer thereof is made porous 22, and a non-porous A crystalline single-crystal Si layer 23 is formed (FIG. 2B).

Next, as shown in FIG. 2C, a light-transmitting supporting substrate 24 typified by quartz or glass and a single-crystal Si layer 23 are brought into close contact with each other via an insulating layer 25 at room temperature. Bonding is performed by anodic bonding, pressing, heat treatment, or a combination thereof. As a result, the light transmitting support substrate 24 and the single crystal layer 23 are firmly bonded via the insulating layer 25. The insulating layer 25 is formed on at least one of the single-crystal Si layer and the light-transmitting support substrate 24, or is laminated with three thin insulating sheets.

Next, the substrate is divided by the porous Si layer 23 (FIG. 2D). The light transmitting support substrate side is made of porous Si2
2 / single-crystal Si layer 23 / insulating layer 25 / light-transmitting supporting substrate 24.

Further, the porous Si 22 is selectively removed. An etching solution of normal Si, hydrofluoric acid as a selective etching solution of porous Si, or a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to hydrofluoric acid, or buffered hydrofluoric acid or buffered hydrofluoric acid Using at least one of a mixture of hydrofluoric acid and at least one of an alcohol and a hydrogen peroxide solution, only porous Si22 is subjected to electroless wet chemical etching to form a thin film on light-transmitting insulating substrate 25 + 24. The formed single crystal Si layer 23 is left and formed. As described in detail above, the enormous surface area of porous Si makes it possible to selectively etch only porous Si with an ordinary Si etchant.

Alternatively, the porous Si 22 is selectively removed by polishing using the single crystal Si layer 23 as a polishing stopper.

FIG. 2E shows a semiconductor substrate obtained by the present invention. The single-crystal Si layer 23 is flat and uniformly thinned on the light-transmitting insulating substrate 25 + 24,
A large area is formed over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

The insulating intermediate layer 25 may not be provided.

If the surface of the first Si single crystal substrate 21 is unacceptably rough by removing the residual porous Si, the surface is flattened and then the first S
It can be used as the i single crystal substrate 21.

[Embodiment 3] As shown in FIG. 3A, first, a first Si single crystal substrate 31 is prepared, and its surface layer is made porous 32. The crystalline single-crystal compound semiconductor layer 33 is formed (FIG. 3B).

Next, as shown in FIG. 3C, the other Si support substrate 34 and the single-crystal compound semiconductor layer 33 are brought into close contact with each other via an insulating layer 35 at room temperature, and then anodically bonded and pressed. Or by heat treatment or a combination thereof. Thereby, the Si support substrate 34 and the single crystal layer 33 are firmly bonded via the insulating layer 35. The insulating layer 35 is formed on at least one of the single crystal compound semiconductor layer and the Si support substrate 34, or is laminated with three insulating thin plates and bonded together.

Next, the substrate is divided by the porous Si layer 32 (FIG. 3D). The Si support substrate side is porous Si32 /
It has a structure like the single crystal compound semiconductor layer 33 / insulating layer 35 / Si support substrate 34.

Further, the porous Si 32 is selectively removed. Using an etching solution having a high Si etching rate with respect to the compound semiconductor, only the porous Si 32 is chemically etched to leave the thinned single crystal compound semiconductor layer 33 on the insulating substrate 35 + 34.

Alternatively, the porous Si 32 is selectively removed by polishing using the single crystal compound semiconductor layer 33 as a polishing stopper.

FIG. 3E shows a semiconductor substrate obtained by the present invention. The single crystal compound semiconductor layer 33 is made flat and uniformly thin on the insulating substrate 35 + 34,
A large area is formed over the entire wafer. The semiconductor substrate obtained in this manner can be suitably used as a compound semiconductor substrate and further from the viewpoint of producing an insulated and separated electronic element.

When used as a compound semiconductor substrate, the insulating layer 35 may not be provided.

When the residual porous Si is removed from the first Si single crystal substrate 31 and the surface flatness is unacceptably rough, the first Si single crystal substrate 31 is flattened, and then the first S
It can be used as an i single crystal substrate 31.

[Embodiment 4] As shown in FIG. 4 (a), first, a first Si single crystal substrate 41 is prepared, and its surface layer is made porous 42. A crystalline single crystal compound semiconductor layer 43 is formed (FIG. 4B).

Next, as shown in FIG. 4C, a light-transmitting supporting substrate 44 typified by quartz or glass and a single-crystal compound semiconductor layer 43 are brought into close contact with each other via an insulating layer 45 at room temperature. , Anodic bonding, pressing, heat treatment, or a combination thereof. As a result, the light-transmitting support substrate 44 and the single crystal layer 43 are firmly connected via the insulating layer 45. The insulating layer 45 is formed on at least one of the single-crystal compound semiconductor layer and the light-transmitting supporting substrate 44, or is laminated with three thin insulating sheets.

Next, the substrate is divided by the porous Si layer 42 (FIG. 4D). The light transmitting support substrate side is made of porous Si4
2 / single-crystal compound semiconductor layer 43 / insulating layer 45 / light-transmitting supporting substrate 44.

Further, the porous Si 42 is selectively removed. Only the porous Si 42 is chemically etched using an etchant having a high Si etching rate with respect to the compound semiconductor, so that the thinned single crystal compound semiconductor layer 43 is formed on the insulating substrate 45 + 44.

Alternatively, the porous Si 42 is removed by selective polishing using the single crystal compound semiconductor layer 43 as a polishing stopper.

FIG. 4E shows a semiconductor substrate obtained by the present invention. The single-crystal compound semiconductor layer 43 is flattened and uniformly thinned on the light-transmitting insulating substrate 45 + 44, and formed over a large area over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

The insulating intermediate layer 45 may not be provided.

The first Si single crystal substrate 41 is formed by removing residual porous Si and, if the surface flatness is unacceptably rough, performing the surface flattening and then again performing the first S
It can be used as the i single crystal substrate 41.

[Embodiment 5] As shown in FIG. 5 (a), first, a first Si single crystal substrate 51 is prepared, and the surface layers on both sides thereof are made porous 52, 53. Quality Si
Non-porous single-crystal semiconductor layers 54 and 55 are formed on 52 and 53 (FIG. 5B).

Next, as shown in FIG. 5C, the two support substrates 56 and 57 and the single-crystal semiconductor layers 54 and 55 are brought into close contact with each other at room temperature via insulating layers 58 and 59, respectively. Bonding is performed by anodic bonding, pressing, heat treatment, or a combination thereof. Thereby, the supporting substrate 5
6 and 57 and the single crystal layers 54 and 55 are firmly connected via insulating layers 58 and 59. The insulating layers 58 and 59 are formed on at least one of the single crystal semiconductor layers 54 and 55 and the supporting substrates 56 and 67, or are laminated by sandwiching five thin insulating plates.

Next, the substrate is divided into three by the porous Si layers 52 and 53 (FIG. 5D). The two support substrates are porous Si / single crystal semiconductor layer / insulating layer / support substrate (52/54).
/ 58/56 and 53/55/59/57).

Further, both porous Si 52 and 53 are selectively removed. Only the porous Sis 52 and 53 are selectively chemically etched to leave the thinned single crystal semiconductor layers 54 and 55 on the supporting substrates 58/56 and 59/57.

Alternatively, the porous Si 52, 53 is selected using the single crystal semiconductor layers 54, 55 as a polishing stopper, and is removed by polishing.

FIG. 5E shows a semiconductor substrate obtained by the present invention. The single crystal compound semiconductor layer is flatly and uniformly thinned on the support substrate, and two single crystal compound semiconductor layers are simultaneously formed over a large area over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

The insulating intermediate layers 58 and 59 need not be provided.

The support substrates 56 and 57 need not be the same.

If the first Si single-crystal substrate 51 has the residual porous Si removed and the surface flatness is unacceptably rough, the surface is flattened and then the first S single crystal substrate 51 is again formed.
It can be used as i single crystal 51.

[0095]

【Example】

Example 1 Specific resistance 0.01 having a thickness of 625 μm
Anodization was performed on a first 6-inch diameter (100) single-crystal Si substrate of Ω · cm in a HF solution.

The anodizing conditions were as follows.

Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (minutes) Porous Si thickness: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. CVD (Chemical Vapo) on porous Si
r Deposition) single crystal Si
m epitaxial growth. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 l / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer is thermally oxidized. To form a 100 nm SiO ₂ layer.

500n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 900 ° C. for 2 hours to perform bonding.

When a sufficient tensile force was applied uniformly in the direction perpendicular to the surface of the bonded wafer, the porous Si layer was broken, and the wafer was divided into two parts, exposing porous Si.
Specifically, a plate was bonded to both surfaces of the bonded wafer using an adhesive, and the plate was placed on a jig for moving the plate in a direction of separating the plates, and then separated into two pieces.

Thereafter, the porous Si layer is formed by adding 49% hydrofluoric acid and 30% hydrofluoric acid.
Selective etching was performed while stirring with a mixed solution (1: 5) with an aqueous solution of 1% hydrogen peroxide. The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as a material for an etch stop.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the selectivity with respect to the etching rate of the porous layer reaches more than the tenth power, and the etching amount (number) About 10 angstroms)
Is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 1 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Thus, the SO having a high quality semiconductor layer
An I substrate was obtained. Furthermore, the porous layer remaining on the other Si substrate separated by the porous Si layer was removed by the same etching, and the surface was polished. By repeating the above steps using the Si substrate thus obtained, a plurality of SOI substrates having high quality semiconductor layers were obtained.

Example 2 A P-type 4-inch first (1) having a thickness of 525 μm and a specific resistance of 0.01 Ω · cm was used.
00) A single crystal Si substrate was anodized in an HF solution.

The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (min) Thickness of porous Si: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 2 hours. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. MBE (Molecular Be) on porous Si
single-crystal Si by 0.5 μm by an Am Epitaxy method.
m epitaxial growth. The growth conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer is thermally oxidized to 100 nm SiO _2. A layer was formed.

The surface of the SiO ₂ layer and the surface of a separately prepared fused quartz substrate were overlapped and brought into contact with each other.
Heat treatment was performed for 2 hours, and bonding was performed.

When a sufficient pressure was applied uniformly in the direction perpendicular to the surface of the bonded wafers, the porous Si layer was broken, and the wafer was divided into two parts, exposing porous Si. Specifically, a plate is bonded to both surfaces of the bonded wafer using an adhesive, and the plate is placed on the jig described in Example 1, and then pressure is applied to the plate to apply Si to the wafer. The layer was destroyed.

Then, the porous Si layer is selectively etched while being stirred with a mixed solution (1: 5) of buffered hydrofluoric acid and 30% hydrogen peroxide solution. The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as a material for an etch stop.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the selectivity with respect to the etching rate of the porous layer reaches more than the tenth power, and the etching amount (number) About 10 angstroms)
Is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.5 μm was formed on the fused quartz substrate. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observing the cross section with a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

By repeating the above steps in the same manner as in Example 1, a plurality of SOI substrates having high quality semiconductor layers were obtained.

Example 3 A 6-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (minutes) Porous Si thickness: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. MOCVD (MetalOrganic) on porous Si
ic Chemical Vapor Deposit
Single-crystal GaAs was epitaxially grown to a thickness of 1 μm by the (ion) method. The growth conditions are as follows.

Source gas: TMG / AsH ₃ / H ₂ Gas pressure: 80 Torr Temperature: 700 ° C. After the GaAs layer surface and the surface of the separately prepared second Si substrate are overlapped and brought into contact, 900 ° C.-1 Heat treatment was performed for a long time, and bonding was performed. By this heat treatment, both substrates were firmly bonded.

When pressure was applied to the bonded wafer in the same manner as in Example 2, the porous Si layer was broken, and the wafer was divided into two parts, exposing porous Si.

Then, after removing the oxide film on the inner wall of the porous Si layer with hydrofluoric acid, the porous Si was treated with ethylenediamine + pyrocatechol + water (ratio of 17 ml: 3 g: 8 ml) 11.
Etching was performed at 0 ° C. The single-crystal GaAs remained without being etched, and the porous Si was selectively etched using the single-crystal GaAs as an etch stop material, and completely removed.

The etching rate of the single crystal GaAs with respect to the etching solution is extremely low, and the film thickness can be practically ignored.

That is, a single-crystal GaAs layer having a thickness of 1 μm was formed on the Si substrate. There was no change in the single crystal GaAs layer even by selective etching of porous Si.

As a result of observing the cross section with a transmission electron microscope, G
No new crystal defects were introduced in the aAs layer, and it was confirmed that good crystallinity was maintained.

In the same manner as in Example 2, the above steps were repeated to obtain a plurality of semiconductor substrates provided with a high-quality GaAs layer.

By using a Si substrate with an oxide film as a supporting substrate, GaAs on an insulating film could be produced in a similar manner.

Example 4 A 5-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 10 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 24 (min) Thickness of porous Si: 20 (μm) Porosity: 17 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 2 hours. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. MBE (Molecular Be) on porous Si
A single-crystal AlGaAs was epitaxially grown to a thickness of 0.5 μm by an Am Epitaxy method.

After the surface of the AlGaAs layer and the surface of the separately prepared low melting glass substrate were overlapped and brought into contact,
Heat treatment was performed at 00 ° C. for 2 hours, and bonding was performed. By this heat treatment, both substrates were firmly bonded.

When pressure was applied in the same manner as in Example 2, the porous Si layer was broken, and the wafer was divided into two parts, exposing porous Si.

After that, the porous Si was etched with a hydrofluoric acid solution. The single-crystal AlGaAs remained without being etched, and the porous Si was selectively etched using the single-crystal AlGaAs as a material for the etch stop, and completely removed.

The etching rate of the single crystal AlGaAs with respect to the etching solution is extremely low, and the film thickness can be practically ignored.

In other words, a single-crystal AlGaAs layer having a thickness of 0.5 μm was formed on the glass substrate. The single crystal AlGaAs layer did not change at all even by the selective etching of the porous Si.

As a result of observing the cross section with a transmission electron microscope, A
No new crystal defects have been introduced into the lGaAs layer,
It was confirmed that good crystallinity was maintained. By repeating the above steps in the same manner as in Example 2, a plurality of substrates having high-quality semiconductor layers were obtained.

Example 5 A P-type or N-type double-side polished 6-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a resistance of 0.01 Ω · cm was placed on an HF.
Anodization was performed on both surfaces in the solution.

Anodizing conditions were as follows.

Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 × 2 (min) Thickness of porous Si: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. CVD (Chemi) on porous Si formed on both sides
Single-crystal Si was epitaxially grown to 1 μm each by a cal vapor deposition (cal vapor deposition) method.
The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 l / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of this epitaxial Si layer is thermally oxidized. To form a 100 nm SiO ₂ layer.

500 n prepared separately from the surface of the SiO ₂ layer
The surfaces of the two Si substrates on which the m ₂ SiO ₂ layer was formed were overlapped and brought into contact with each other, and then heat-treated at 600 ° C. for 2 hours to perform bonding.

When a sufficient tensile force was applied in the vertical direction to the surface of the wafers bonded by using the method of Example 1, both the porous Si layers were broken, and the wafer was divided into three parts. Appeared.

Thereafter, the porous Si layer was formed by adding 49% hydrofluoric acid and 30%
Selective etching is performed while stirring with a mixed solution (1: 5) with an aqueous solution of 1% hydrogen peroxide. The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as a material for an etch stop.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the selectivity with respect to the etching rate of the porous layer reaches more than ten-fiveth power. About 10 angstroms)
Is a practically negligible decrease in film thickness.

That is, two single-crystal Si layers having a thickness of 1 μm were simultaneously formed on the Si oxide film. Porous S
There was no change in the single crystal Si layer even by the selective etching of i.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained. The above steps were repeated in the same manner as in Example 1 to obtain a plurality of substrates having high-quality semiconductor layers.

Example 6 A 5-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm and having a diameter of 5 inches was anodized in an HF solution. Was done.

Anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 4 (min) Thickness of porous Si: 3 (μm) Porosity: 15 (%) Further current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3:
2 hours: 3 (minutes) Thickness of porous Si: 10 (μm) Porosity: 45 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer is formed on the surface of the epitaxial Si layer by thermal oxidation. Formed.

500 n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 700 ° C. for 2 hours to perform bonding.

Using the method of Example 1, when a sufficient tensile force was applied in the vertical direction to the surface of the bonded wafers, the porous Si layer was broken, and the wafer was divided into two parts. Issued.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.3 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained. The above steps were repeated in the same manner as in Example 1 to obtain a plurality of substrates having high-quality semiconductor layers.

(Example 7) A 6-inch diameter first P-type or N-type (100) single-crystal Si substrate having a thickness of 625 µm and a resistivity of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (minutes) Porous Si thickness: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. CVD (Chemical Vapo) on porous Si
r Deposition) single crystal Si
m epitaxial growth. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 l / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer is thermally oxidized. To form a 100 nm SiO ₂ layer.

500 n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 900 ° C. for 2 hours to perform bonding.

Using the technique of Example 1, when a sufficient tensile force was applied in the vertical direction to the surface of the bonded wafers, the porous Si layer was broken, and the wafer was divided into two parts. Issued.

Thereafter, the porous Si layer was selectively polished using single crystal Si as a stopper. Porous Si selective polishing,
It has been completely removed.

That is, a single-crystal Si layer having a thickness of 1 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained. The above steps were repeated in the same manner as in Example 1 to obtain a plurality of substrates having high-quality semiconductor layers.

Example 8 A P-type or N-type first (100) single crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm and a diameter of 6 inches was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (minutes) Porous Si thickness: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. CVD (Chemical Vapo) on porous Si
r Deposition) single crystal Si
m epitaxial growth. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 l / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer is thermally oxidized. To form a 100 nm SiO ₂ layer.

500n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 900 ° C. for 2 hours to perform bonding. Next, the bonded substrate was placed in a tank provided with an ultrasonic vibrator, and when ultrasonic energy was applied, the porous Si layer was broken, and the wafer was divided into two parts, exposing porous Si.

Thereafter, the porous Si layer was formed by adding 49% hydrofluoric acid and 30%
Selective etching is performed while stirring with a mixed solution (1: 5) with an aqueous hydrogen peroxide solution (1: 5). The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the selectivity with respect to the etching rate of the porous layer reaches more than the tenth power, and the etching amount (number) (About 10 angstroms) is a film thickness reduction that can be ignored in practical use.

That is, a single-crystal Si layer having a thickness of 1 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The first Si single crystal substrate was used again as the first Si single crystal substrate after removing residual porous Si.

EXAMPLE 9 A P-type or N-type 4-inch diameter first (100) single-crystal Si substrate having a thickness of 525 μm and a specific resistance of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 (min) Thickness of porous Si: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 2 hours. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. MBE (Molecular Be) on porous Si
single-crystal Si by 0.5 μm by an Am Epitaxy method.
m epitaxial growth. The growth conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer was thermally oxidized to 100 nm SiO _2. A layer was formed.

After the surface of the SiO ₂ layer and the surface of the separately prepared fused quartz substrate were brought into contact with each other,
Heat treatment was performed for 2 hours, and bonding was performed.

A porous layer was exposed on the end face of the wafer, the porous Si was etched to some extent, and a sharp plate was inserted into it like a razor blade. When the porous Si layer was broken, the wafer was divided into two parts. Porous Si appeared.

Thereafter, the porous Si layer is selectively etched while being stirred with a mixed solution (1: 5) of buffered hydrofluoric acid and 30% hydrogen peroxide solution. The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the selectivity with respect to the etching rate of the porous layer reaches more than ten-fiveth power. (About 10 angstroms) is a film thickness reduction that can be ignored in practical use.

That is, a single-crystal Si layer having a thickness of 0.5 μm was formed on the fused quartz substrate. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer.

The first Si single crystal substrate was used as a first Si single crystal substrate after removing residual porous Si, polishing the surface to a mirror surface, and then again.

Example 10 A P-type or N-type double-side polished 6-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a resistivity of 0.01 Ω · cm was placed on an H-type substrate.
Both surfaces were anodized in the F solution.

The anodizing conditions were as follows.

Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 12 × 2 (min) Thickness of porous Si: 10 (μm) Porosity: 15 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. CVD (Chemi) on porous Si formed on both sides
Single-crystal Si was epitaxially grown to 1 μm by a cal vapor deposition (cal vapor deposition) method. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 l / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.3 μm / min Further, the surface of the epitaxial Si layer is thermally oxidized. To form a 100 nm SiO ₂ layer.

500 n prepared separately from the surface of the SiO ₂ layer
The surfaces of the two Si substrates on which the m ₂ SiO ₂ layer was formed were overlapped and brought into contact with each other, and then heat-treated at 600 ° C. for 2 hours to perform bonding.

After the porous layer was exposed on the end face of the wafer, and a liquid such as water was impregnated into the porous layer Si, the whole bonded wafer was heated or cooled. The wafer is divided into two parts and the porous S
i appeared.

Thereafter, the porous Si layer was formed by adding 49% hydrofluoric acid and 30% hydrofluoric acid.
Selective etching is performed while stirring with a mixed solution (1: 5) with an aqueous hydrogen peroxide solution (1: 5). The single-crystal Si remained without being etched, and the porous Si was selectively etched and completely removed using the single-crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the selectivity with respect to the etching rate of the porous layer reaches more than ten-fiveth power. About 10 angstroms)
Is a practically negligible decrease in film thickness.

That is, two single-crystal Si layers having a thickness of 1 μm were simultaneously formed on the Si oxide film. Porous S
There was no change in the single crystal Si layer even by the selective etching of i.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer.

After removing the residual porous Si from the first Si single-crystal substrate and flattening the surface by hydrogen treatment, the first
Was used as a Si single crystal substrate.

Example 11 A P-type or N-type 5-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 4 (min) Thickness of porous Si: 3 (μm) Porosity: 15 (%) Further current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3:
2 hours: 3 (minutes) Thickness of porous Si: 10 (μm) Porosity: 45 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer is formed on the surface of the epitaxial Si layer by thermal oxidation. Formed.

500 n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 700 ° C. for 2 hours to perform bonding.

The second (first) (or second) substrate is
When a force was applied to the (or first) substrate in the horizontal direction, the porous Si layer could not withstand the shear stress and was broken, and the wafer was divided into two parts, and porous Si was exposed.

After that, the porous Si layer was formed with HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.3 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer.

The first Si single crystal substrate was used again as the first Si single crystal substrate after removing residual porous Si.

Example 12 A P-type or N-type 5-inch diameter first (100) single-crystal Si substrate having a thickness of 625 μm and a specific resistance of 0.01 Ω · cm was anodized in an HF solution. Was done.

The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1:
1 hour: 4 (min) Thickness of porous Si: 3 (μm) Porosity: 15 (%) Further current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3:
2 hours: 3 (minutes) Thickness of porous Si: 10 (μm) Porosity: 45 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer is formed on the surface of the epitaxial Si layer by thermal oxidation. Formed.

500 n prepared separately from the surface of the SiO ₂ layer
After superimposing and contacting the surface of the Si substrate on which the m ₂ SiO ₂ layer was formed, heat treatment was performed at 700 ° C. for 2 hours to perform bonding.

When the porous layer was exposed on the end face of the wafer and the porous Si layer was etched from the end face with a porous Si selective etching solution, the wafer was divided into two parts.

Thereafter, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 1 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer.

The first Si single crystal substrate was used again as a first Si single crystal substrate after removing residual porous Si.

[0224]

As described above, according to the present invention,
By separating the bonded substrate by a porous layer and removing the porous layer on the second substrate on which the non-porous single-crystal semiconductor layer is disposed, a high-quality non-porous single-crystal semiconductor is removed. A semiconductor substrate having the layers disposed thereon can be formed.

[0225] In addition, the substrate formed by bonding is separated by a porous layer, and the porous layer constituting the first substrate is removed. Since it can be reused for manufacturing a semiconductor substrate, the productivity of the semiconductor substrate can be further improved and the cost can be further reduced.

Further, according to the present invention, a single crystal layer of Si or the like or a compound semiconductor single crystal layer having crystallinity as excellent as a single crystal wafer is obtained on a substrate such as a transparent substrate (light transmitting substrate). In addition, it is possible to propose a method for manufacturing a semiconductor substrate which is excellent in productivity, uniformity, controllability, and cost.

According to the present invention, even when a large-scale integrated circuit having an SOI structure is manufactured, an expensive SOS or SIM is required.
It is possible to propose a method for manufacturing a semiconductor substrate which can be substituted for OX.

Further, according to the present invention, the substrate can be separated into two or more via the porous layer, and one of the separated substrates can be used as a semiconductor substrate after removing the residual porous material. After removing the remaining porous material, the other substrate can be used again for manufacturing a semiconductor substrate.

Further, according to the present invention, a porous layer and a non-porous single crystal layer are formed on both sides of a substrate, and two other substrates are bonded together so as to sandwich the single crystal layer. By separating the substrate with the porous layer, two semiconductor substrates can be manufactured at the same time.

That is, according to the present invention, a semiconductor layer or compound semiconductor active layer formed on the surface using a single crystal substrate which is excellent in economical efficiency, is uniform and flat over a large area, and has extremely excellent crystallinity. It is possible to provide a method for manufacturing a semiconductor substrate in which a layer is left and one surface thereof is removed to the active layer to obtain a single crystal layer or a compound semiconductor crystal layer with extremely few defects on an insulator.

Further, in obtaining a Si or compound semiconductor single crystal layer having a crystallinity superior to that of a single crystal wafer on a transparent substrate (light transmitting substrate), the productivity, uniformity, controllability, and cost are reduced. An excellent method for manufacturing a semiconductor substrate can be obtained.

Further, even when a large-scale integrated circuit having an SOI structure is manufactured, a method for manufacturing a semiconductor substrate which can be used in place of expensive SOS or SIMOX can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining one example of the method of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining an example of the method of the present invention.

FIG. 3 is a schematic sectional view for explaining one example of the method of the present invention.

FIG. 4 is a schematic sectional view for explaining an example of the method of the present invention.

FIG. 5 is a schematic cross-sectional view for explaining an example of the method of the present invention.

[Explanation of symbols]

 Reference Signs List 11 Si single crystal substrate 12 Porous Si layer 13 Nonporous single crystal Si layer 14 Si support substrate 15 Insulating layer

Claims (102)

[Claims] A step of preparing a first substrate having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate; and A bonding step of bonding the non-porous single-crystal semiconductor layer so that the non-porous single-crystal semiconductor layer is located on the inner side, wherein a method of manufacturing a semiconductor substrate having the non-porous single-crystal semiconductor layer on the second substrate is provided. A separating step of separating the combined first and second substrates in the porous semiconductor layer, and preparing at least a part of the first substrate obtained by the separating step again to prepare the first substrate. A method for manufacturing a semiconductor substrate, which is used for: 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein said bonding step includes a step of bonding said non-porous single crystal semiconductor layer and said second base via an insulating layer. 3. The method according to claim 2, wherein the insulating layer is formed on at least one of the non-porous single-crystal semiconductor layer and a surface of the second base. 4. The non-porous single crystal semiconductor layer according to claim 2, wherein the insulating layer is formed by oxidizing a surface of the non-porous single crystal semiconductor layer.
A method for manufacturing a semiconductor substrate as described above. 5. The insulating layer is made of an insulating thin plate,
The first base and the second base are sandwiched between the thin plates.
3. The method for manufacturing a semiconductor substrate according to claim 2, wherein the semiconductor substrates are laminated and laminated. 6. The method according to claim 1, wherein the porous semiconductor layer is made of porous silicon. 7. The method for manufacturing a semiconductor substrate according to claim 1, wherein a thermal oxide film is formed on the inner wall of the hole of the porous semiconductor layer. 8. The porous semiconductor layer according to claim 1, wherein the porous semiconductor layer has lower mechanical strength than the non-porous substrate.
A method for manufacturing a semiconductor substrate as described above. 9. The method according to claim 1, wherein the porous semiconductor layer is formed by using anodization. 10. The porosity of the porous semiconductor layer is 10
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the range is from about 80% to about 80%. 11. The method according to claim 7, wherein the anodization is performed using an aqueous solution containing hydrofluoric acid. 12. The method according to claim 7, wherein the anodization is performed by changing a current density. 13. The method of manufacturing a semiconductor substrate according to claim 7, wherein the anodization is performed by changing a ratio of constituent components of the anodizing solution. 14. The method according to claim 1, wherein the non-porous single-crystal semiconductor layer is a silicon layer. 15. The non-porous single-crystal semiconductor layer is formed by epitaxial growth.
A method for manufacturing a semiconductor substrate as described above. 16. The non-porous single crystal semiconductor layer is formed by a molecular beam epitaxy method, a plasma CVD method, or a low pressure CVD method.
3. The method of manufacturing a semiconductor substrate according to claim 1, wherein the semiconductor substrate is formed by a method selected from the group consisting of a method, a photo CVD method, a bias sputtering method, and a liquid phase growth method. 17. The method according to claim 1, wherein the first base is obtained by forming a porous semiconductor layer by making a part of a silicon substrate porous. 18. The method according to claim 18, wherein the first substrate forms a porous semiconductor layer by making a part of a silicon substrate porous, and a non-porous single crystal semiconductor layer is epitaxially grown on the porous semiconductor layer. Claim 1 formed by
A method for manufacturing a semiconductor substrate as described above. 19. The method for manufacturing a semiconductor substrate according to claim 1, wherein said second base is made of silicon. 20. The method according to claim 1, wherein the second substrate is a light-transmitting substrate. 21. The method for manufacturing a semiconductor substrate according to claim 1, wherein the second base is made of a quartz substrate or a glass substrate. 22. The method of manufacturing a semiconductor substrate according to claim 1, wherein the bonding step includes a step performed by a method selected from anodic bonding, pressure, heat treatment, or a combination thereof. 23. The method of manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of applying pressure in a direction perpendicular to a bonding surface of the bonded first and second substrates. 24. The method for manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of pulling in a direction perpendicular to a bonding surface of the bonded first and second substrates. 25. The method of manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of applying a shearing force acting in a direction parallel to a bonding surface of the bonded first and second substrates. . 26. The method of manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of applying wave energy to the bonded first and second substrates. 27. The method according to claim 22, wherein the wave energy is an ultrasonic wave. 28. The method for manufacturing a semiconductor substrate according to claim 1, wherein said separating step includes a step of inserting a sharp plate into said porous semiconductor layer. 29. The method for manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of infiltrating a substance into the porous semiconductor layer and then expanding the substance. 30. The method of manufacturing a semiconductor substrate according to claim 1, wherein the separating step includes a step of selectively etching a porous semiconductor layer from end faces of the bonded first and second substrates. 31. A substrate obtained by the bonding step, comprising: a first substrate having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on both surfaces of the non-porous substrate; The method for manufacturing a semiconductor substrate according to claim 1, wherein the substrate is a substrate formed by sandwiching and bonding two second substrates. 32. A step of preparing a first substrate having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate, and the step of: A bonding step of bonding the non-porous single-crystal semiconductor layer so that the non-porous single-crystal semiconductor layer is located on the inner side, wherein a method of manufacturing a semiconductor substrate having the non-porous single-crystal semiconductor layer on the second substrate is provided. Applying an external force to the combined first and second substrates,
A method for manufacturing a semiconductor substrate, comprising: a separation step of separating at the porous semiconductor layer. 33. The method for manufacturing a semiconductor substrate according to claim 32, wherein the bonding step includes a step of bonding the non-porous single crystal semiconductor layer and the second base via an insulating layer. 34. The method according to claim 33, wherein the insulating layer is formed on at least one of the non-porous single-crystal semiconductor layer and a surface of the second base. 35. The method for manufacturing a semiconductor substrate according to claim 33, wherein the insulating layer is formed by oxidizing a surface of the non-porous single crystal semiconductor layer. 36. The method of manufacturing a semiconductor substrate according to claim 33, wherein the insulating layer is formed of an insulating thin plate, and the first base and the second base are laminated with the thin plate sandwiched therebetween. 37. The method according to claim 32, wherein the porous semiconductor layer is porous silicon. 38. The method of manufacturing a semiconductor substrate according to claim 36, wherein a thermal oxide film is formed on an inner wall of the hole of the porous semiconductor layer. 39. The method according to claim 36, wherein the porous semiconductor layer is a layer having lower mechanical strength than the non-porous substrate and the non-porous single-crystal semiconductor layer. 40. The method according to claim 32, wherein the porous semiconductor layer is formed by using anodization. 41. The porosity of the porous semiconductor layer is 10
33. The method for manufacturing a semiconductor substrate according to claim 32, which is in a range of about 80%. 42. The method according to claim 40, wherein the anodization is performed using an aqueous solution containing hydrofluoric acid. 43. The method according to claim 40, wherein the anodization is performed by changing a current density. 44. The method of manufacturing a semiconductor substrate according to claim 40, wherein the anodization is performed by changing a ratio of a component of an anodizing solution. 45. The method according to claim 32, wherein the non-porous single-crystal semiconductor layer is a silicon layer. 46. The method according to claim 36, wherein the non-porous single-crystal semiconductor layer is formed by epitaxial growth. 47. The non-porous single crystal semiconductor layer is formed by a molecular beam epitaxy method, a plasma CVD method, or a low pressure CVD method.
38. The method of manufacturing a semiconductor substrate according to claim 36, wherein the semiconductor substrate is formed by a method selected from the group consisting of a method, a photo CVD method, a bias sputtering method, and a liquid phase growth method. 48. The method according to claim 32, wherein the first base is obtained by forming a porous semiconductor layer by making a part of a silicon substrate porous. 49. A method according to claim 49, wherein the first substrate forms a porous semiconductor layer by making a part of the silicon substrate porous, and epitaxially grows a non-porous single crystal semiconductor layer on the porous semiconductor layer. 4. The method according to claim 3, wherein
3. The method for manufacturing a semiconductor substrate according to item 2. 50. The method for manufacturing a semiconductor substrate according to claim 32, wherein the second base is made of silicon. 51. The method according to claim 32, wherein the second substrate is a light-transmitting substrate. 52. The method for manufacturing a semiconductor substrate according to claim 32, wherein said second base is made of a quartz substrate or a glass substrate. 53. The method for manufacturing a semiconductor substrate according to claim 32, wherein the bonding step includes a step performed by a method selected from anodic bonding, pressure, heat treatment, or a combination thereof. 54. The external force is applied to the first
33. The method of manufacturing a semiconductor substrate according to claim 32, wherein the force is a force for pressing in a direction perpendicular to a bonding surface of the second base. 55. The external force is applied to the first
33. The method for manufacturing a semiconductor substrate according to claim 32, wherein the force is a force pulling in a direction perpendicular to a bonding surface of the second substrate. 56. The external force is applied to the first
33. The method for manufacturing a semiconductor substrate according to claim 32, wherein the shear force acts in a direction parallel to a bonding surface of the second substrate. 57. The external force is applied to the first
And a wave energy applied to the second substrate.
3. The method for manufacturing a semiconductor substrate according to item 2. 58. The method according to claim 57, wherein the wave energy is an ultrasonic wave. 59. The method for manufacturing a semiconductor substrate according to claim 32, wherein the external force is a force acting by inserting a sharp plate into the porous semiconductor layer. 60. The external force is a force generated by causing a liquid to enter the porous semiconductor layer and causing the liquid to enter the porous semiconductor layer.
3. The method for manufacturing a semiconductor substrate according to item 2. 61. The force generated by the liquid is a force generated by expansion of the liquid by heating or cooling the bonded first and second substrates containing the liquid. Of manufacturing a semiconductor substrate. 62. The separating step is such that a part of the porous semiconductor layer remains on the first base, and further includes a step of removing the porous semiconductor layer left on the first base. The method for manufacturing a semiconductor substrate according to claim 32, comprising: 63. The method for manufacturing a semiconductor substrate according to claim 62, wherein the step of removing the porous semiconductor layer left on the first base includes the step of polishing the porous semiconductor layer. 64. The method according to claim 62, wherein the step of removing the porous semiconductor layer left on the first base includes the step of etching the porous semiconductor layer. 65. The removal of the porous semiconductor layer is performed by using hydrofluoric acid,
38. The method of manufacturing a semiconductor substrate according to claim 36, wherein the semiconductor substrate is removed by chemical etching using a mixed solution obtained by adding at least one of an alcohol and a hydrogen peroxide solution to hydrofluoric acid. 66. The porous semiconductor layer is removed by chemical etching using buffered hydrofluoric acid or a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to buffered hydrofluoric acid. 37. The method for manufacturing a semiconductor substrate according to 37. 67. The step of removing the porous semiconductor layer left on the first base includes a step of flattening the surface of the first base from which the porous semiconductor layer has been removed. Of manufacturing a semiconductor substrate. 68. The method according to claim 67, wherein the step of flattening the surface of the first base includes a hydrogen treatment step. 69. A substrate obtained by the bonding step, comprising: a first substrate having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on both surfaces of the non-porous substrate; 33. The method for manufacturing a semiconductor substrate according to claim 32, wherein the substrate is a substrate formed by being sandwiched between two second substrates. 70. A step of preparing a first base having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on a non-porous substrate, and the step of: A bonding step of bonding the non-porous single-crystal semiconductor layer so that the non-porous single-crystal semiconductor layer is located on the inner side; A method of manufacturing a semiconductor substrate, comprising: a step of selectively etching and separating the porous semiconductor layer from end faces of the combined first and second substrates. 71. The method for manufacturing a semiconductor substrate according to claim 70, wherein said bonding step includes a step of bonding said non-porous single crystal semiconductor layer and said second base via an insulating layer. 72. The method of manufacturing a semiconductor substrate according to claim 71, wherein the insulating layer is formed on at least one of the non-porous single crystal semiconductor layer and a surface of the second base. 73. The method according to claim 71, wherein the insulating layer is formed by oxidizing a surface of the non-porous single crystal semiconductor layer. 74. The method of manufacturing a semiconductor substrate according to claim 71, wherein said insulating layer is made of an insulating thin plate, and said first base and said second base are laminated with said thin plate sandwiched therebetween. 75. The method according to claim 70, wherein the porous semiconductor layer is porous silicon. 76. The method of manufacturing a semiconductor substrate according to claim 70, wherein a thermal oxide film is formed on the inner wall of the hole of the porous semiconductor layer. 77. The method of manufacturing a semiconductor substrate according to claim 70, wherein the porous semiconductor layer is a layer having lower mechanical strength than the non-porous substrate and the non-porous single-crystal semiconductor layer. 78. The method according to claim 70, wherein the porous semiconductor layer is formed by using anodization. 79. The porosity of the porous semiconductor layer is 10
71. The method for manufacturing a semiconductor substrate according to claim 70, wherein the range is from about 80% to 80%. 80. The method for manufacturing a semiconductor substrate according to claim 78, wherein the anodization is performed with an aqueous solution containing hydrofluoric acid. 81. The method of manufacturing a semiconductor substrate according to claim 78, wherein the anodization is performed by changing a current density. 82. The method of manufacturing a semiconductor substrate according to claim 78, wherein the anodization is performed by changing a ratio of a component of an anodizing solution. 83. The method according to claim 70, wherein the non-porous single crystal semiconductor layer is a silicon layer. 84. The method according to claim 68, wherein the non-porous single-crystal semiconductor layer is formed by epitaxial growth. 85. The non-porous single crystal semiconductor layer is formed by a molecular beam epitaxy method, a plasma CVD method, or a low pressure CVD method.
70. The method of manufacturing a semiconductor substrate according to claim 68, wherein the semiconductor substrate is formed by a method selected from a group consisting of a method selected from the group consisting of a CVD method, a photo CVD method, a bias sputtering method, and a liquid phase growth method. 86. The method of manufacturing a semiconductor substrate according to claim 70, wherein the first base is obtained by forming a porous semiconductor layer by making a part of a silicon substrate porous. 87. The first base, wherein a porous semiconductor layer is formed by making a part of a silicon substrate porous, and a non-porous single crystal semiconductor layer is epitaxially grown on the porous semiconductor layer. 8. The method of claim 7, wherein
0. A method for manufacturing a semiconductor substrate according to item 0. 88. The method for manufacturing a semiconductor substrate according to claim 70, wherein said second base is made of silicon. 89. The method for manufacturing a semiconductor substrate according to claim 70, wherein the second base is a light-transmitting base. 90. The method for manufacturing a semiconductor substrate according to claim 70, wherein said second base is made of a quartz substrate or a glass substrate. 91. The method for manufacturing a semiconductor substrate according to claim 70, wherein said bonding step includes a step performed by a method selected from anodic bonding, pressing, heat treatment, or a combination thereof. 92. The separating step is such that a part of the porous semiconductor layer is left on the first base, and a step of removing the porous semiconductor layer left on the first base is further included. 71. The method for manufacturing a semiconductor substrate according to claim 70, comprising: 93. The method for manufacturing a semiconductor substrate according to claim 92, wherein the step of removing the porous semiconductor layer left on the first base includes the step of polishing the porous semiconductor layer. 94. The method for manufacturing a semiconductor substrate according to claim 92, wherein the step of removing the porous semiconductor layer left on the first base includes the step of etching the porous semiconductor layer. 95. The removal of the porous semiconductor layer is performed by using hydrofluoric acid,
70. The method for manufacturing a semiconductor substrate according to claim 68 or 69, wherein the semiconductor substrate is removed by chemical etching using a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide water to hydrofluoric acid. 96. The porous semiconductor layer is removed by chemical etching using buffered hydrofluoric acid or a mixture of buffered hydrofluoric acid and at least one of alcohol and hydrogen peroxide. 69. The method for manufacturing a semiconductor substrate according to 69. 97. The method according to claim 92, wherein the step of removing the porous semiconductor layer left on the first base includes the step of flattening the surface of the first base from which the porous semiconductor layer has been removed. Of manufacturing a semiconductor substrate. 98. The method for manufacturing a semiconductor substrate according to claim 97, wherein the step of flattening the surface of the first base includes a hydrogen treatment step. 99. A substrate obtained by the bonding step, comprising: a first substrate having a non-porous single-crystal semiconductor layer on a porous semiconductor layer on both surfaces of the non-porous substrate; and a first substrate. 71. The method for manufacturing a semiconductor substrate according to claim 70, wherein the substrate is a substrate formed by being sandwiched between two second substrates. 100. A non-porous single-crystal semiconductor layer is formed on a substrate via a porous layer, and then mechanically destructed inside the porous layer to remove the non-porous single-crystal semiconductor from the substrate. A method for separating a semiconductor layer from a substrate, wherein the semiconductor layer is separated. 101. A porous silicon layer is formed by anodizing a surface layer of a single crystal silicon substrate, and a single crystal silicon semiconductor layer is epitaxially grown on the porous silicon layer. A method of separating a semiconductor layer from a substrate, wherein the single crystal silicon semiconductor layer is separated from the single crystal silicon substrate by causing mechanical destruction in the single crystal silicon substrate. A semiconductor substrate manufactured by the method according to any one of claims 1 to 101.