JPH11121736A - Data preparing device for semiconductor device simulation - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data preparing device for a semiconductor device simulation, which automatically prepares data for a finite difference method. SOLUTION: A device recognizing device 4 recognizes the kind of device from the impurity distribution of a semiconductor device. A mesh-section dividing device 5 devides the entire region into small sections. A minimum mesh- interval setting device 6 sets the minimum mesh width. A small-section mesh- number setting device 7 sets the mesh number. A mesh-interval setting device 8 sets the mesh interval. A mesh-interval judging device 9 judges that the ratio of the mesh intervals is in a limit. An electrode-position setting device 10 sets the position of the electrode. An electrode judging device judges whether the electrode is to be attached to the floating layer in the semiconductor substrate or not. Thus, the input data for the device simulation are automatically prepared.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for preparing input data for simulating a semiconductor device for a finite difference method.

[0002]

2. Description of the Related Art In recent years, as semiconductor devices have become more complicated and diversified, it has become increasingly important to analyze the characteristics of the devices using a semiconductor device simulation apparatus.
In order to use the device simulation device, the impurity distribution and external shape in the analysis area are represented on a discrete mesh, and the input data for the finite difference method semiconductor device simulation with the external material shape and electrode information added. Must be created. The device simulation results are also calculated on the mesh. Generally, the orthogonal mesh for the finite difference method is designated so that the mesh interval forms an arithmetic progression or an arithmetic progression over the entire region as shown in FIG.

A method of creating input data for a semiconductor device simulation for a finite difference method by a conventional data creating apparatus will be described with reference to FIG. FIG. 9 shows an example of the mesh designation data.

First, small section left end coordinates, small section right end coordinates, small section mesh interval initial values as geometric progression conditions in each small section, and small section internal geometric sequence calculation method as conditions for small section division. The operator specifies the number of meshes in a small section based on empirical judgment in consideration of the impurity distribution inside the semiconductor element. Based on these designations, the conventional device simulation input data generating apparatus divides the whole into small sections, such as a first small section and a second small section, from the small section left end coordinates and the small section right end coordinates, and further splits each small section. The first term of the geometric progression in the section is set as the initial value of the mesh interval in the small section, and the geometric series in which the number of terms is the number of meshes in the small section is calculated. Here, whether the geometric series is a monotonically increasing series or a monotonically decreasing series is determined by “UP”, “DOW” in the item of the geometric series in the small section.
The above processing is performed for all sections, and a mesh of the entire analysis area is generated.

Further, an impurity concentration distribution and a material shape obtained as a result of the process simulation are assigned to the mesh points, and finally input data for a semiconductor device simulation for the finite difference method is created.

[0006]

However, in the above-mentioned conventional technique, the operator must perform all mesh designations such as segmentation conditions and geometric progression conditions in each segment. Without such skill, input data for device simulation cannot be created, and as a result, analysis using a device simulation apparatus cannot be performed. Furthermore, even a skilled person needs a great deal of time to consider the area division from the impurity distribution of the element and to set the conditions of the geometric progression in each division section, and time loss cannot be avoided.

According to the present invention, even a beginner can easily perform analysis using a device simulation apparatus by automatically creating input data for finite difference semiconductor device simulation for analyzing a semiconductor element having an arbitrary shape. Provided is an input data generation device for finite difference method semiconductor device simulation that can eliminate time loss due to mesh designation.

[0008]

SUMMARY OF THE INVENTION According to the present invention, there is provided an input data generating apparatus for simulating a semiconductor device, comprising: a device recognizing device for recognizing what the device is from a result of an impurity distribution and an external shape calculated by a semiconductor process simulator. An apparatus, a mesh section dividing apparatus for calculating an impurity concentration gradient, a pn junction surface, and the like from the impurity distribution to divide the entire area into small sections, and a minimum mesh interval setting for determining a minimum mesh interval in each small section. Equipment and
A small section mesh number setting device for determining the number of meshes in each section, a mesh space setting device for determining the difference or ratio of mesh spaces, a mesh space determination device for determining whether the mesh space is appropriate, and a process simulation An electrode position setting device for setting the electrode position from the external shape of the device, and a data output device.

It is preferable that the input data generating device for semiconductor device simulation of the present invention has an electrode determining device for determining whether or not an electrode is added to the floating layer.

According to the present invention, input data for device simulation can be easily created even by a non-expert, and high-precision analysis can be performed as a result in analysis using an actual device simulation apparatus. it can.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a semiconductor device simulation data generating apparatus according to a first embodiment of the present invention. Hereinafter, a procedure for generating a two-dimensional analysis mesh used for device simulation using the semiconductor device simulation data creation apparatus will be described. 2
In the case of the dimension, a mesh in two axial directions of x and y is generated, but in the three-dimensional case, the essential principle does not change only by increasing the z-axis direction.

First, an impurity distribution and an external material shape of a semiconductor device to be analyzed are calculated using the process simulation apparatus 1. The calculation result is input to the device simulation input data generating device 3 via the external recording device 2 and the device recognition device 4 determines whether the device to be analyzed is a MOSFET, a bipolar transistor, a CCD, or any other device based on its external shape. Recognize whether the device is a device. As means for achieving this, the typical impurity concentration distribution and the external material shape of the device to be analyzed are respectively recorded in the external recording device 2, and the comparison is made with the external recording device 2.

Next, the inside of the analysis area is divided into small sections in both the x and y directions by the mesh section dividing device 5. First, the gradient of the impurity concentration is calculated in each of the x and y directions. Since the value of the impurity concentration is read at the same time, the pn junction surface can be calculated. If the absolute value of the density gradient is larger than a set value DN at a certain location, section division is performed here to minimize the mesh interval at that position. In one section, mesh intervals are equal intervals or geometric progression, but the common ratio in the case of geometric progression is fixed to a certain value. In other words, the mesh interval in one small section uses a certain value as a common ratio, and if the common ratio is smaller than 1, it decreases monotonically, if it is larger than 1, it increases monotonically, and if it is 1, the mesh becomes an evenly spaced mesh. As described above, the concentration gradient is D
When the area is divided beyond N, the mesh interval monotonically decreases in the section on the negative side with respect to the x and y axes and increases monotonically in the section on the positive direction with respect to the x and y axes as shown in FIG. As described above, DN in each of the x and y directions
The section is divided beyond.

The section dividing method based on the impurity concentration gradient inside the semiconductor has been described above. The section dividing is also performed from the external shape. A mesh is always placed at the position where the section is to be divided, but since a mesh is generated in a geometric progression inside the section, where the mesh is placed cannot be determined at this stage without further processing. However, in device simulation, there is a position where accurate analysis cannot be performed unless a mesh is always placed there. For example, M
Unless a mesh is placed at both ends of the polysilicon serving as the gate electrode of the OSFET, an accurate gate length is not reflected in device simulation. Similarly, the thickness of the oxide film under the gate electrode has a large effect on the electrical characteristics. Can not be accurately reflected on. At such a position, section division must be performed. Unless the common ratio is 1, the mesh interval in this case will be monotonically increasing or decreasing within that section,
Since a large difference may occur between the mesh width of the adjacent section and that of the other section, as shown in FIG. Ratio 1 / r
As monotonically decreasing, monotonically increasing or vice versa, respectively.
Make two sections continuous. Alternatively, there is also a method in which the common ratio is set to 1 in one section without equally dividing so as to form an equally-spaced mesh.

Next, the minimum mesh interval setting device 6 sets the mesh interval at the place where the section is divided. Since the common ratio has only one value in one section, the mesh interval is monotonically increasing or decreasing in the positive direction of the axis. Here, the minimum mesh width is set. In the case of monotonic increase, the first term is applicable, and in the case of monotonic decrease, the last term is applicable. In the mesh section dividing device 5, the section is divided when the absolute value of the impurity concentration gradient exceeds DN. Here, the absolute value of the impurity concentration gradient is set to a preset value DN ₁ , DN ₂ ,. DN _n (DN ₁ <DN
₂ <... <DN _n )
Set the minimum mesh interval width. There in detail to the hundredth of analysis object size the minimum mesh width if smaller than DN _1, DN ₁ or if smaller is than DN ₂ five hundred parts of the analysis target size 1, DN _n or For example, 1/1000.

Next, the small section mesh number setting device 7 sets the number of meshes in the small section. The method of determination is such that the product of the meshes in the x and y directions is about 1/2 of the number of meshes that can be handled by this apparatus. For example, if the device can handle 100,000 meshes, the size is 50,000 meshes. Although it is not particularly necessary to reduce the number to 配 慮, this is for the purpose of preventing the actual number of meshes from exceeding the maximum number that can be handled by the present apparatus as a result of exceeding the set number at this point in later processing. By determining which device is to be analyzed by the device recognizing device 4, the maximum number corresponding to the device can be empirically determined. In general, analysis of a CCD device requires more meshes than MOSFETs.

After setting the maximum number of meshes as described above, the number of meshes in each of the x and y directions is determined.
Ratio ys / x of size xs in x direction and size ys in y direction
s is a default value. The method of determination is such that the number of meshes ym in the y direction is xmys /
If xs is set, the total number of meshes becomes M = xm ² ys / xs, and xm and ym can be determined from this. However, if the size is large and the impurity concentration gradient is not large, it is not necessary to increase the number of meshes. Therefore, the values of xm and ym are adjusted by comparing the average impurity concentration gradients in the x and y directions. That is, if the average impurity concentration gradient in the x direction is larger than that in the y direction, xm is made slightly larger and ym is made slightly smaller or unchanged.

Next, the mesh interval setting device 8 determines a common ratio for determining the mesh interval in each small section. Section width K, the mesh number N, the minimum mesh width A ₀ is been determined in each sub-interval. If the required common ratio is r, the geometrical series E of the first term A ₀ , the common ratio r, and the number N is A ₀
(1-r ^N) is / (1-r). This value is compared with K. If E is larger than K, r is made smaller.
Is increased and r can be determined by repeatedly calculating until the error between E and K is within a certain set range. Further, the range of the value of r obtained here is restricted. The reason for setting the mesh width in the geometric progression is to prevent the ratio with the next mesh width from becoming extremely large, so that the common ratio r obtained here is extremely small or large. It adversely affects the analysis results using the device simulation device. Therefore, the allowable range of r is set to, for example, 0.5 to 2. If the obtained r is not within the range, the number of meshes is adjusted by the previous small section mesh number setting device 7. When r is smaller than 0.5, the number of meshes is reduced, and when r is larger than 2, the number of meshes is increased. Then, the calculation of the common ratio r is performed again, and the calculation is repeated until the value falls within the range.

Next, the mesh interval determining device 9 calculates a mesh interval ratio between the maximum mesh widths of adjacent sections.
The position where the mesh section is divided as shown in FIG. 4 is set so as to be the minimum mesh width, and should have been determined so as to have the same mesh interval. It is the maximum mesh width. Since the ratio of the mesh widths must be extremely large or small, the same criterion as the criterion in the mesh interval setting device 8 is used. In this example, it is in the range of 0.5 to 2. Here, if it is not within the setting, the number of meshes in one of the sections is changed. Either section may be used, but for example, the section having the larger mesh width is used.
Then, the processing is returned to the small section mesh number setting device 7, the number of meshes is increased, and the following processing is performed. This is repeated so that the ratio of the mesh interval between the maximum mesh widths of the adjacent sections is within the set range.

With the above processing, an orthogonal mesh for the finite difference method for device simulation can be automatically created in consideration of the impurity concentration distribution and the external shape. In order to perform an actual device simulation, electrode information must be added to this. For a material that can be an electrode that has been registered in advance in the device recognition device 4, a region included in a mesh point created on the electrode position setting device 10 is defined as an electrode. As shown in FIG. 5, the mesh created above is superimposed on the impurity distribution and the external shape obtained as a result of the process simulation, and points including the mesh points are used as electrodes. Further, when the mesh section dividing device 5 divides the section from the external shape as a result of the process simulation, the edge of the material that can become an electrode is in the form of a mesh as shown in FIG. This mesh point is also used as an electrode.

As described above, according to the present embodiment, the device simulation input data for the finite difference method can be automatically created from the impurity distribution and the external shape of the semiconductor element calculated using the process simulation apparatus 1. Regardless of the structure of the semiconductor element or the skill of the operator, the semiconductor device can be output by the mesh output device 11 and the analysis of the semiconductor element using the device simulation device 12 can be performed. Input data for device simulation that can prevent loss and provide a normal simulation result can be created.

Next, FIG. 7 shows a semiconductor device simulation data generating apparatus according to a second embodiment of the present invention. This has an electrode determination device 13 in the device simulation input data creation device 3 of the semiconductor device simulation data creation device of the first embodiment. In the first embodiment, which device is determined by the device recognition device 4, and the electrode position setting device 10 adds an electrode. However, there is a case where a calculation cannot be performed well in a later device simulation stage only by adding an electrode to a material that can be a registered electrode. For example, if no electrode is attached to the n-layer or the p-layer in the semiconductor substrate, accurate calculation (called a floating layer) cannot be performed, and in the worst case, the calculation is abnormally terminated and the result cannot be obtained. Therefore, an electrode must be added to any one or more meshes of the n-layer or the p-layer to eliminate the floating layer. Second
In this embodiment, a function of eliminating the floating layer is added to the electrode position setting device 10. Since the pn junction surface is calculated by the mesh section dividing device 5, where n
It is recognized whether there is a layer or a p-layer. Therefore, the electrode position setting device 1 of the first invention for each layer
At 0, it is determined whether or not an electrode is added, and an electrode is added where there is no electrode. However, a very narrow range (for example, 0.
In the case of (1 micron square) and very low concentration (for example, 1/10 ³ ) with respect to the concentration of the surrounding layer, no electrode is added because there is no problem in device simulation. Also, if there is a wide floating layer in a region deep in the depth direction from the substrate surface, which is considered to have little direct effect on the actual electrical characteristics in the analysis of the MOSFET, etc., the device simulation may also end abnormally. The impurity concentration distribution is observed in the depth direction, and an analysis region deeper than the floating layer is deleted immediately before the floating layer appears. The actual processing is determined by the electrode determination device 13, and if it is determined that the analysis region is to be deleted, the process returns to the mesh section division device 5 to redefine the region and redo the division.

[0024]

The data creation apparatus for semiconductor device simulation of the present invention calculates the impurity distribution gradient, the pn junction surface, and the like from the calculation results of the process simulation for calculating the impurity distribution of the element and the external material shape, thereby reducing the entire area. It is divided into small sections, the minimum mesh interval corresponding to the maximum impurity concentration distribution gradient in each small section is determined, the number of meshes in each section is determined, and the difference between the minimum mesh interval and the mesh number from the mesh number is determined. Alternatively, a ratio is determined, it is determined whether or not the mesh interval is appropriate, and then a mesh is generated for the entire region. An electrode position for applying a voltage is set on the mesh, and it is determined whether to attach an electrode to the floating layer or delete a region. As described above, it becomes possible to automatically generate input data for device simulation for the finite difference method in an impurity concentration distribution of an arbitrary shape regardless of the element structure.
As a result, irrespective of the structure of the semiconductor element and the skill of the operator in the simulation, the input data for the device simulation is automatically generated, so that the time loss for mesh designation can be eliminated.

[Brief description of the drawings]

FIG. 1 is a diagram showing a device simulation data creation device according to a first embodiment of the present invention;

FIG. 2 is a diagram showing an example of a section division position and mesh intervals in sections before and after the section division position.

FIG. 3 is a diagram showing an example of setting a new section and determining a common ratio of the two sections.

FIG. 4 is a diagram showing an example of a mesh interval between two adjacent sections.

FIG. 5 is a diagram showing an example of a case where electrode positions are assigned to mesh points;

FIG. 6 is a diagram showing an example of a case where electrode positions are assigned to mesh points;

FIG. 7 is a diagram showing a device simulation data creation device according to a second embodiment of the present invention.

FIG. 8 is a diagram showing an example of an orthogonal mesh for a finite difference method for device simulation.

FIG. 9 shows the designation of creation of mesh data in the prior art.
Figure showing an example

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Process simulation device 2 External recording device 3 Device simulation input data creation device 4 Device recognition device 5 Mesh interval division device 6 Minimum mesh interval setting device 7 Small interval mesh number setting device 8 Mesh interval setting device 9 Mesh interval determination device 10 Electrode Position setting device 11 Mesh output device 12 Device simulation device 13 Electrode determination device

Claims (2)

[Claims] 1. A device recognizing device for recognizing what a device is from a result of an impurity distribution and an external shape calculated by a semiconductor process simulator, and calculating an impurity concentration gradient, a pn junction surface, and the like from the impurity distribution. A mesh section dividing apparatus for dividing the entire area into small sections, a minimum mesh interval setting apparatus for determining a minimum mesh interval among the small sections, and a small section for determining the number of meshes of each of the small sections. A mesh number setting device, a mesh interval setting device for determining a difference or a ratio of mesh intervals, a mesh interval determining device for determining whether a mesh interval is appropriate, and an electrode for setting an electrode position from an external shape of a process simulation Semiconductor device simulation data creation device having position setting device and data output device . 2. The data creation device for semiconductor device simulation according to claim 1, further comprising an electrode determination device for determining whether to add an electrode to the floating layer.