JPH11120081A - Microcomputer system and its security control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the security function by operating a microprocessor after reading in the contents of a specific address in a memory when the system is initialized. SOLUTION: When the system is initialized, a security control circuit 4 is supplied with a reset signal through a line 41 and a DMA controller acquires an address control bus 11 and a data bus 12 and transfers a key word of 64-bit constitution of the lowest-order address of a flash memory 2 from the flash memory 2 to the security control circuit 4. After this data transfer, CPU resetting is reset and normal operation state is entered. Thus, the CPU 1 is operated after the data (1st key word) of the specific address of the program area of the flash memory are read out at the time of the initialization of the system, and the data (2nd key word) for security resetting is obtained through the subsequent operation of the CPU 1 to allow the rewriting of the flash memory.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a microcomputer system and a security control method thereof.

[0002]

2. Description of the Related Art A flash memory is frequently used as a rewritable ROM. A relatively small-capacity ROM is used for storing keywords for realizing security, and a relatively large-capacity ROM is referred to as a BIOS ( Basic I
It has been used for storing (Output) or as a film for digital cameras.

[0003] Two examples of techniques for achieving security in a microcomputer system equipped with a ROM such as the flash memory described above are listed below.

(1) A method of incorporating a fixed keyword permitting erasing, writing, and reading as a logic circuit and generating the keyword by software to make the logic valid, and (2) providing a cell dedicated to the keyword to a user. It is located in an address space separate from the program area and has a security function.

[0005]

The method (1) described above can be applied only to a custom LSI in order to keep a keyword from being notified to a third party. In the method (2), it is necessary to add a cell for a keyword and a control circuit to a hard macro of a flash memory, so that it takes time to develop a microcomputer system. In addition, since the load of the read circuit changes, redesign of the sense amplifier and the like is required, which adversely affects the development period.

The present invention has been made in view of the above circumstances, and in a microcomputer system having a ROM such as a flash memory, the contents written in the ROM can be decrypted by a third party or used for unauthorized use. It is an object of the present invention to provide a microcomputer system and a security control method thereof, which are general-purpose and can shorten the development period so as not to be modified.

[0007]

SUMMARY OF THE INVENTION A microcomputer system according to the present invention includes a rewritable memory, a microprocessor for executing a program written in the memory, and writing of data at a specific address in the memory. A security control circuit for disposing a keyword for releasing security, and prohibiting writing of data to the memory until the keyword is written, and reading a content of a specific address in the memory when the system is initialized. The microprocessor is operated later.

According to a security control method for a microcomputer system of the present invention, in a microcomputer system having a built-in rewritable memory, at the time of system initialization, the system is operated after reading the contents of a specific address of a memory area. It is characterized in that data writing is prohibited until a keyword for permitting data writing to the memory is given to a specific address.

As a result, the present invention can be applied to a general-purpose microcomputer system other than a custom LSI, and contributes to shortening the development period.

[0010]

FIG. 1 is a block diagram showing an embodiment of a microcomputer system according to the present invention. The microcomputer system of the present invention includes a microprocessor (CPU) 1 composed of one silicon substrate or a plurality of silicon substrates, a nonvolatile flash memory 2,
It comprises a DMA controller 3 and a security control circuit 4, which are integrated and mounted in one package, for example, an MCM module package sealed with a plastic resin or the like.

FIG. 2 is a block diagram showing a detailed configuration of the periphery including the flash memory 2. In the figure, blocks with the same numbers as those in FIG. 1 are the same as those in FIG. The flash memory 2 includes a memory cell 21 and a memory control circuit 22 that performs erase and read / write control on the memory cell 21. Note that a keyword area 211 for security release is assigned to the lowest address of the memory cell 21. A keyword (not shown) is stored in the keyword area 211 at an appropriate timing.
The data is written by an SIO (serial input / output), an address control bus 11 and a data bus 12 by a writer. The CPU 1 and the flash memory 2 are connected via an address control bus 11 and a data bus 12.

The operation of the embodiment of the present invention will be described below. When the system is initialized, the security control circuit 4 receives a reset signal via a line 41 and
Supplies a CPU reset signal (line 42) to
The flash memory 2 and the DMA controller 3 are started. The DMA controller 3 acquires the address control bus 11 and the data bus 12, and
Transfers a 64-bit keyword of the lowest address of the flash memory 2 to the security control circuit 4 via the line 44. After this data transfer is completed, C
The PU reset is released, and a normal operation state is set.

Here, when the flash memory 2 is in the erasing mode, the data including the transferred keyword is all in the "H" state, so that a write enable signal is supplied to the line 43. Therefore, writing of data to the flash memory 2 is not prohibited and rewriting can be performed freely. On the other hand, when some data (first keyword) is written as a keyword and the system is initialized, the security control circuit 4 is kept in the flash memory 2 until the second keyword for releasing security is notified. Erasing and rewriting are prohibited. Here, the second keyword is data that matches the first keyword.
Because of the bit configuration, it cannot be easily guessed by a third party. Further, even if a third party tries to read the first keyword, it is usually impossible to observe the data bus connecting the CPU and the flash memory, so that the security function is enhanced.

In a microcomputer system having a ROM 2 such as a flash memory, it is necessary to prevent the contents of the ROM 2 from being read by a third party or from being altered for the purpose of unauthorized modification. In the system of the present invention, a keyword for releasing security is set in a partial area 2 of the user program area of the flash memory 2.
Before writing to the CPU 11 and resetting, the keyword is transferred to the security control circuit 4 before the CPU operates, thereby erasing and writing operations to the flash memory 2 are prohibited.

[0015]

As described above, according to the present invention, after reading data (first keyword) at a specific address in the program area of the flash memory at the time of system
U is operated, and rewriting of the flash memory is permitted by obtaining data (second keyword) for security release from the subsequent operation of the CPU. The first keyword indicates that the flash memory has been erased. In the case shown, the rewriting of the flash memory is permitted even if the second keyword is not given.

Since the first keyword is assigned to a normally readable area of the flash memory, it can be changed as appropriate when programming the keyword. Therefore, the present invention can be applied not only to a custom LSI but also to a general-purpose LSI. Further, since the hard macro of the flash memory can be used as it is, the development period is shortened. Furthermore, since it is troublesome to always provide the second keyword, if the first keyword is clearly erased, writing is permitted until the second keyword arrives.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing details of a periphery including a flash memory in FIG. 1;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Microprocessor (CPU), 2 ... Flash memory, 3 ... DMA controller, 4 ... Security control circuit, 21 ... Memory cell, 22 ... Memory control circuit, 21
1. Keyword storage area.

Claims (4)

[Claims] 1. A rewritable memory, a microprocessor for executing a program written in the memory, and a keyword for releasing security for permitting data writing at a specific address in the memory are arranged. A security control circuit for prohibiting data writing to the memory until data is written, and operating a microprocessor after reading the contents of a specific address in the memory during system initialization. Computer system. 2. The microcomputer system according to claim 1, further comprising a DMA controller for reading data for security release from said memory and supplying the data to a security control circuit. 3. A microcomputer system incorporating a writable memory, at system initialization, operating the system after reading the contents of a specific address in the memory area, and writing data to the memory at the specific address. A security control method for a microcomputer system, wherein writing of data is prohibited until a permitted keyword is given. 4. The method according to claim 3, wherein when the content of the data writable memory is erased, rewriting of the memory is permitted without requiring a keyword for permitting data writing to the memory. The security control method of the microcomputer system described in the above.