JPH11109851A - Computer program product - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an encoding method and a decoding method of four-bytes- based processing for a 32-bit microcomputer. SOLUTION: This device comprises a recording medium, which can be used in computer the recording medium has a program coding means in which is integral with the medium and readable by a computer for cipher-converting n-bit length data M1 and M2 into n-bit length data C1 and C2 through an arithmetic and logic unit by using n-bit length key data K1-k4; and the program coding means has a means which generates a combination of data (C1, C2) by executing the processing containing an arithmetic operation specified by a composite function π4 .ρ3 .π2 .

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention comprises a computer readable recording medium having a recording medium integrally formed therein for providing computer readable program code means for encrypting or decrypting. Computer program product.

[0002]

2. Description of the Related Art Conventional typical encryption algorithms include DES (Data Encryption Standard) and FEAL.
(Fast Encryption Standard) is known and DES
For example, (1) Koyama et al., "Modern Cryptography",
IEICE, pp. 41-49, September 1986, and regarding FEAL, (2) Shimizu et al., "High-speed Data Encryption Algorithm FEAL", IEICE Transactions D, Vol. J70-D. NO. 7, pp. 1413
-1423, July 1987, respectively.

First, a non-linear calculation part in the DES process, that is, a process called an S box will be described (see (1) p. 45, FIGS. 3-2 and p 46, FIG.
3). The 32-bit R is first replaced by the extended transposition table shown in Table 1, and some bits are duplicated and expanded to 48 bits.

[0004]

[Table 1]

[0005] The thus obtained 48-bit R
Forms eight sets of 6-bit blocks, each of which is obtained by adding the following two bits for every four bits from the beginning.

R31 r1 r2 r3 r4 r5, r4 r5 r6 r7 r8 r9, r8 r9 r10 r11 r12 r13, r12 r13..., R28 r29, r28 r29 r30 r31 r32 r31 Similarly, an exclusive OR operation with the 48-bit key K is performed, and the result is divided into eight sets of 6 bits each and input to eight S boxes from S1 to S8.
S1 to S8 are called selection functions. These S boxes are
Input 6 bits and output 4 bits.

As an example, Table 2 shows a substitution table for one S box S1.

Table 2 Enlarged transposition table E 32 1 2 3 4 5 4 5 6 7 8 9 8 9 10 11 12 13 12 13 14 15 16 17 16 17 18 19 20 21 20 21 22 23 24 25 24 25 26 27 28 29 28 29 30 31 32 1 One S box has four types (line numbers 0, 1, 2,
3) is prepared, and the substitution table is selected by using the first and last bits of the input 6 bits to determine which of the four types of substitution table is used. Then, the central 4 bits of the 6 bits input according to the selected substitution table are substituted. As a specific example, the binary input pattern is 01 for S1.
If it is 1011, 01 represented by the first 0 and the last 1, that is, row 1 (binary 01 is decimal 1
) Is selected. Next, a column 1 represented by a central 4-bit pattern 1101 (decimal 13)
3 is output, and as a result, the value 5 specified in the row 1 and the column 13, that is, 0101 is output to form a 4-bit substitution pattern. In the DES, a single-stage process is configured using such a process f (R, K), and this is repeated 16 stages.

As can be seen from the above processing example, DES is based on 1-bit unit processing.

Next, a non-linear calculation part in the FEAL process, that is, a part including the function S will be described (see p. 1416 of (2) above, FIGS. 4 and 5).
The non-linear part of FEAL is easier to describe mathematically than the non-linear part of DES. The 32-bit data α is divided into 8-bit data α ⁰ , α ¹ , α ² , α ³ and then divided into 8 bits.
As a bit unit, the key data and the exclusive OR are calculated. After that, processing by a predetermined function S is performed.

Function S: S (x1 + x2 + δ) = Rot2 (w) where w = (x1 + x2 + δ) mod 256 δ = 0 or 1 (constant) Using this process f (α, β), a one-stage process is configured. Repeated eight steps. As seen in the above process,
FEAL is based on 8-bit processing.

[0012]

With the spread and widespread use of computer networks due to advances in information processing and communication technology, data and computers on transmission lines are required to secure information security against unauthorized use or capture of data. It is considered that encrypting the data stored in the server is an effective countermeasure.

DES, established in 1982 by the United States Department of Commerce as a standard for encryption algorithms, is one means of encrypting data.

However, since DES has a large number of processing in bit units, it takes a long time to implement it with microcomputer software based on byte processing, and a practical speed cannot be obtained. .

In order to solve this problem, the FEAL is based on processing in units of 1 byte (8 bits). Therefore, when the FEAL is realized by an 8-bit microcomputer, it is possible to achieve several times higher speed than DES. did it. It is considered that FEAL has made it possible to obtain a practical speed to some extent using software of an 8-bit microcomputer.

However, due to recent advances in microelectronics technology, 16-bit microcomputers have been replaced by 8-bit microcomputers, and 16-bit microcomputers.
32-bit microcomputers have been used rather than bit microcomputers. It is anticipated that the use of 32-bit microcomputers will increase significantly in the near future. In the era of 32-bit microcomputers, higher-speed encryption processing is expected to be required. However, since a 32-bit microcomputer performs processing based on 4-byte data, an F designed for an 8-bit microcomputer based on 1-byte data is used.
Attempting to implement the EAL with a 32-bit microcomputer was inefficient.

Therefore, there has been a demand for an encryption algorithm for a 32-bit microcomputer that performs a 4-byte key processing.

An object of the present invention is to provide an encryption method and a decryption method for processing a 4-byte key for a 32-bit microcomputer.

[0019]

To solve the above problems, the following means are used.

A recording medium usable by a computer is provided. The recording medium is integrally formed in the recording medium. Data M1 and M2 having an n-bit length are respectively converted using key data K1 to K4 each having an n-bit length. Computer readable program code means for cryptographically converting the data into n-bit length data C1 and C2 by an arithmetic unit, the program code means adding π2 (A, B) to B and key data K1; A function for performing a process including a cyclic shift with the first number of bits, and further outputting a set of the data obtained by performing an addition operation with A and B, and π3 (A, B) is represented by A
An addition operation of A with the key data K2, a cyclic shift with a second bit number different from the first, an addition operation with the key data K3, a third bit different from each of the first and second bits Π4 is a function that performs a process including a cyclic shift with a number and outputs a set of data obtained by performing an addition operation with B.
(A, B) is subjected to a process including an addition operation of B and key data K4, and data obtained by performing an addition operation with A,
B as a function to output a set, and the data set (M1,
M2) is provided with means for generating the data set (C1, C2) by executing a process including an operation defined by a combination function π4 · π3 · π2 by the computing unit.

As a result, since the 32-bit data is replaced or transposed by one basic instruction using the 32-bit microcomputer, the cryptographic conversion can be performed at high speed.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION

 (1) First Embodiment FIG. 1 shows an embodiment of the present invention.

In FIG. 1, a 64-bit plaintext 101 and a 64-bit × 4 = 256-bit key data 100 are 32 bits.
Input to the 32-bit microcomputer 102, and thereafter, are cryptographically converted by the 32-bit microcomputer 102 in the order of the instructions in the program 103.
The 4-bit ciphertext 104 is output.

FIG. 2 shows a flow of a cryptographic conversion process executed by the 32-bit microcomputer 102 and the program 103 in FIG.

201: The input data M is divided into upper 32 bits M1 and lower 32 bits M2.

202: An exclusive OR operation corresponding to the bits of M1 and M2 is performed.

WORK2 ← M1 (+) M2 Hereinafter, (+) indicates the same processing. In the figure, the exclusive OR is indicated by a symbol obtained by superimposing ○ and +.

203: Modulo addition of WORK2 and key data K1 is performed.

X ← WORK2 + K1 Here, x + K1 indicates a modulo addition modulo 2 ^{32 in} which the remainder of the sum of x and K1 is divided by 2 ³² .

Hereinafter, + indicates the same processing.

204: After x is cyclically shifted left by 2 bits, modulo addition of the data and x and 1 is performed.

X ← Rot2 (x) + x + 1 Hereinafter, Rot2 indicates the same processing.

105: After x is cyclically shifted left by 4 bits, exclusive OR of the data and x is obtained.

X ← Rot4 (x) (+) x Hereinafter, Rot4 indicates the same processing.

206: WORK1 ← x (+) M1 207: x ← x + K2 209: x ← Rot3 (x) (+) x Here, Rot3 (x) indicates that x is cyclically shifted left by 8 bits.

210: x ← x + K3 211: x ← Rot2 (x) + x + 1 212: x ← Rot16 (x) + (x∧y) where Rot16 (x) shifts x to the left by 16 bits. Show. In addition, x∧y indicates that a logical AND of x and y corresponding to bits is taken.

213: WORK2 ← x (+) WORK2 214: x ← WORK2 + K4 215: x ← Rot2 (x) + x 216: WORK1 ← WORK1 (+) x 217: WORK2 ← WORK2 (+) WORK1 218: Output data of WORK1 Upper 32 bits of W
ORK2 is output as the lower 32 bits of the output data.

As described above, when the functions π1 to π4 are defined as shown in FIG. 2, the present embodiment can be expressed by a composite function as follows: C = π1, π4, π3, π2, π1 (M).

The functions πi · πi (i = 1 to 4) all have the property of repeating the same function conversion twice and returning as πi · πi (x) = x.

Therefore, if M = π1, π2, π3, π4, π1 (C) is used as the decryption function, the ciphertext C can be returned to the original plaintext M.

(2) Modification 1 of the embodiment A process obtained by repeating the process corresponding to the conversion functions π1 to π4 twice in the above embodiment may be used as the cryptographic conversion. That is, the cryptographic conversion is performed by C = π1 · π4・ Π3 ・ π2 ・ π1 ・ π4 ・ π3 ・ π2
-It may be set to π1 (M).

At this time, the equation of the decoding conversion is M = π1, π2, π3, π4, π1, π2, π3, π4.
Π1 (C)

Similarly, in general, the present embodiment may be repeated n times and used as the cryptographic conversion.

(3) Second Modification of Embodiment FIG. 4 shows another embodiment of the present invention.

401: Input data M is divided into upper 16 bits M1 and lower 16 bits M2.

402: Exclusive OR corresponding to the bits of M1 and M2 is calculated.

WORK2 ← M1 + M2 Hereinafter, + indicates the same processing.

403: Modulo subtraction of x and key data K1 is performed.

X ← x−K1 Here, x−K1 indicates a modulo subtraction modulo 2 ^16, that is, the remainder obtained by dividing the difference between x and K1 by 2 ¹⁶ .

Hereinafter, "-" indicates the same processing.

404: After cyclically shifting x by 2 bits to the left, modulo subtraction of the data and 1 is performed.

X ← Rot (x) −x−1 Hereinafter, Rot2 indicates the same processing.

405: After x is cyclically shifted left by 4 bits, exclusive OR of the data and x is obtained.

X ← Rot4 (x) (+) x Hereinafter, Rot4 indicates the same processing.

406: WORK1 ← x (+) M1 408: x ← Rot2 (x) −x−1 409: Rot8 (x) − (x∧y) Here, Rot8 (x) indicates that x is cyclically shifted left by 8 bits. In addition, x∧y indicates that a logical AND of x and y corresponding to bits is taken.

410: WORK2 ← x (+) WORK2 411: x ← WORK2-K3 412: x ← Rot2 (x) −x−1 413: WORK1 ← WORK1 (+) x 414: WORK2 ← WORK2 (+) WORK1 415 : WORK1 as upper 16 bits of output data, W
ORK2 is output as the lower 16 bits of the output data.

(4) Third Modification of Embodiment FIG. 5 shows another embodiment of the present invention.

501: Input data M is divided into upper 8 bits M1 and lower 8 bits M2.

502: Exclusive OR of the bits corresponding to M1 and M2 is performed.

WORK2 ← M1 (+) M2 Hereinafter, + indicates the same processing.

503: Modulo addition of x and key data K1 is performed.

X ← WORK2 + K1 y ← x Here, x + K1 indicates a modulo addition modulo 2 ^8, that is, a remainder obtained by dividing the difference between x and K1 by 2 ⁸ .

Hereinafter, + indicates the same processing.

504: After cyclically shifting x by 2 bits to the left, modulo addition of the data and x and 1 is performed.

X ← Rot2 (x) + x + 1 Hereinafter, Rot2 indicates the same processing.

505: x ← Rot4 (x) + (x∧y) Here, Rot4 (x) indicates that x is cyclically shifted to the left by 4 bits. In addition, x∧y indicates that a logical AND of x and y corresponding to bits is taken.

506: WORK1 ← WORK1 (+) x 507: x ← WORK1 + K2 508: x ← Rot4 (x) + x + 1 509: WORK2 ← WORK2 (+) x 510: WORK1 ← WORK1 (+) WORK2 511: Output WORK1 Upper 8 bits of WO
RK2 is output as the lower 8 bits of the output data.

(5) Fourth Modification of Embodiment FIG. 6 shows another embodiment of the present invention.

(1) Using a message 62 for performing authentication as key data, an arbitrary initial value 61 is encrypted using an algorithm 63 according to the present invention.

(2) The encryption result 64 is encrypted again with the subsequent data of the message used in (1), and this operation is repeated until the end of the message.

(3) The final encryption result is output as the message authentication code 65.

(6) Modification 5 of Embodiment FIG. 7 shows another embodiment of the present invention. This IC card generates an authentication code of the message.

(1) An initial value 76 necessary for message authentication is transmitted to the microcomputer 72 in the IC card 71 through the I / O 74.

(2) A message 77 for performing authentication is sent to (1)
The microcomputer 72 generates the authentication code 78 using the encryption software 75 stored in the memory 73 in the same manner as described above.

[0075]

In the present embodiment, substitution and transposition as shown in FIG. 3 are repeated.

That is, in the embodiment shown in FIG.
04), (207, 208), (210, 211),
The processing of (214, 215) has the form of x ← x + Kix ← Rot2 (x) + (x) +1, which is obtained by dividing 32-bit data into blocks each having 4 bits. Substitution processing for each block is performed by the above two data conversions.
It can be seen that they are going all at once for the block.

Here, 4-bit block data A = (a1, a2, a3, a4), where ai = 1
or 0 (i = 1 to 4) is B = (b1, b2, b3,
b4) However, the substitution conversion to bi = 1 or 0 (i = 1 to 4) means that the Boolean algebra operation f1,
b2 = f1 (a1, a2, a3, a4) b2 = f2 (a1, a2, a3, a4) b3 = f3 (a1, a2, a3, a4) b4 = f4 ( a1, a2, a3, a4).

Further, 205, 209, and 212 in FIG. 2 respectively represent (1) x ← Rot4 (x) (+) x (2) x ← Rot8 (x) (+) x (3) x ← Rot16 (x ) + (X∧y), which are (1) transposed to perform a 4-bit left circular shift and then further substituted, (2) 8-bit left circular The figure shows a process of performing a transposition after performing a transposition of performing a shift, and a process of performing (3) a 16-bit left circular shift.

As is apparent from FIG. 3, any bit change in the first 32 bits of data is the last 32 bits.
It can be seen that all bits of data are affected.

As a result, it is understood that the present embodiment has an effect of efficiently performing encryption conversion having a high degree of randomness.

[Brief description of the drawings]

FIG. 1 shows an embodiment of a cryptographic conversion device for implementing the present invention.

FIG. 2 is a flowchart showing details of encryption conversion in FIG. 1;

FIG. 3 is an explanatory diagram showing that the embodiment of the present invention efficiently repeats substitution conversion and transposition conversion.

FIG. 4 is a flowchart showing details of cryptographic conversion when a 16-bit microcomputer is used.

FIG. 5 is a flowchart showing details of encryption conversion when an 8-bit microcomputer is used.

FIG. 6 is a flowchart illustrating a method for generating a message authentication code using a cryptographic algorithm according to the present invention.

FIG. 7 is a configuration diagram of an IC card that generates a message authentication code using an encryption algorithm according to the present invention.

[Explanation of symbols]

100: key data, 101: plaintext, 102: 32-bit microcomputer, 103: program, 104:
Ciphertext.

Claims (7)

[Claims] A recording medium usable in a computer is provided, wherein said recording medium is integrally formed therein, and stores n-bit length data M1 and M2 each as n-bit length key data K1 to K4. And computer-readable program code means for performing cryptographic conversion by an arithmetic unit into n-bit length data C1 and C2, the program code means using π2 (A, B) as an addition operation between B and key data K1 And a cyclic shift with the first number of bits, and a function that outputs a set of data obtained by performing an addition operation with A and B, and π3 (A, B) is A, A and an addition operation of the key data K2, a cyclic shift with a second bit number different from the first, an addition operation with the key data K3, and a third bit number different from each of the first and second. Including the cyclic shift of Π4 (A, B) is subjected to a process including an addition operation of B and key data K4, and is further added to A. A function that outputs a set of the calculated data and B is a function that outputs a combination function π4 ·
By executing a process including an operation defined by π3 · π2 by the arithmetic unit, the data set (C1, C2)
Computer program product comprising means for generating 2. A recording medium usable in a computer, wherein the recording medium is integrally formed therein and stores n-bit length data C1 and C2 each of which has n-bit length key data K1 to K4. Computer-readable program code means for decoding and converting the data into n-bit length data M1 and M2 by an arithmetic unit, the program code means using π2 (A, B) as an addition operation between B and key data K1 And a cyclic shift with the first number of bits, and a function that outputs a set of data obtained by performing an addition operation with A and B, and π3 (A, B) is A, A and an addition operation of the key data K2, a cyclic shift with a second bit number different from the first, an addition operation with the key data K3, and a third bit number different from each of the first and second. Including the cyclic shift of Π4 (A, B) is subjected to a process including an addition operation of B and key data K4, and is further added to A. A function that outputs a set of the data on which the operation has been performed and B is provided, and a combination function π2 ·
By executing a process including an operation defined by π3 · π4 by the arithmetic unit, the data set (M1, M2)
Computer program product comprising means for generating 3. A recording medium usable by a computer, wherein the recording medium is integrally formed therein and stores n-bit length data M1 and M2 each as n-bit length key data K1 to K4. And cryptographically convert the data C1 and C2 into n-bit length data C1 and C2, and decrypt and convert the data C1 and C2 into the data M1 and M2 by the computing unit or another computing unit using the key data K1 to K4. Computer readable program code means for performing a process including an addition operation of π2 (A, B) with B and key data K1, and a cyclic shift by a first number of bits. And a function that outputs a combination of data obtained by performing an addition operation with A and B, and π3 (A, B) is different from the first operation by adding A to A and adding data of A and key data K2. A process including a cyclic shift with the second bit number, an addition operation with the key data K3, and a cyclic shift with a third bit number different from each of the first and second bits is performed. A function that outputs a set of data obtained by performing an operation, π4 (A, B) is subjected to a process including an addition operation of B and key data K4, and data obtained by performing an addition operation of A, and B Are output as a function, and a combination function π4 · is obtained for the data set (M1, M2).
By executing a process including an operation defined by π3 · π2 by the arithmetic unit, the data set (C1, C2)
And a combination function π2 · for the data set (C1, C2).
means for generating the data set (M1, M2) by executing a process including an operation defined by π3 · π4 by the operation unit or the other operation unit. Program product. 4. A recording medium usable in a computer, wherein the recording medium is integrally formed therein and stores n-bit length data M1 and M2 each as n-bit length key data K2, K3. Computer-readable program code means for performing cryptographic conversion by an arithmetic unit into n-bit length data C2, the program code means comprising: adding π3 (A, B) to A, and adding A to key data K2. A process including an operation, a cyclic shift with the first number of bits, an additive operation with the key data K3, and a cyclic shift with the second number of bits different from the first is performed. When a function that outputs a set with the performed data is used as a function, an operation including an operation defined by a function π3 using the key data K2 and K3 is performed on the data set (M1, M2). Real Computer program product, characterized in that it comprises means for generating a set of data (M1, C2) by. 5. A computer-usable recording medium, wherein the recording medium is integrally formed therein and includes a π3
(A, B) is an addition operation of A, A and key data K2,
Data obtained by performing a process including a cyclic shift with a first number of bits, an addition operation with key data K3, and a cyclic shift with a second number of bits different from the first, and further performing an addition with B And performs a process including an operation defined by a function π3 on an n-bit data set (M1, M2) using n-bit key data K2 and K3, respectively. Data set (M
1, C2) by computer using the key data K2, K3, and computer readable program code means, the program code means comprising: addition operation of π3 (A, B) with 'B 'Is called a predetermined operation, and π4 (A, B) is A, an addition operation of A and key data K2, a cyclic shift by the first number of bits, and a key data K3. , And a process of outputting a set of data obtained by performing the predetermined operation with B, as a function of performing a process including a cyclic operation with a second number of bits different from the first. (M1, C2), the key data K2
Computer program product comprising means for generating the data set (M1, M2) by executing, by the arithmetic unit, a process including an operation defined by a function π4 by using the function and K3. . 6. The computer program according to claim 5, wherein said predetermined operation is an additive operation.
product. 7. The computer program product according to claim 6, wherein the addition operation as the predetermined operation is an exclusive OR.