JPH1098699A - Separator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To unnecessitate an exclusive wiring to transfer a time data stream indicating decoding time of an individual data stream to a decoder for the individual data stream by locating the time data stream indicating the decoding time of the individual stream in the individual data stream by a distributor. SOLUTION: A separator 20 is provided to separate the individual stream of plural materials contained in a multiplexed stream of an MPEG system into the individual data stream classified by materials. The separator 20 is provided with the distributor 12 to distribute the individual data stream and the time data stream indicating the decoding time of the individual data stream so that the time data stream indicating the decoding time of the individual data stream contained in an added information stream in a multiplexed stream is inserted into a free detectable position in the individual data stream. Consequently, the exclusive wiring to transfer the data stream of the decoding time of the individual stream is unnecessitated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to MPEG (Movin).
The present invention relates to a demultiplexer that separates individual streams of a plurality of materials, such as video and audio, included in a multiplexed stream of a g Picture Experts Group system into individual data streams for each material.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram showing a part of a receiving side of a conventional MPEG system. In FIG. 5, 1 is MPE
Video PE which is an individual stream included in the multiplex stream of the G1 system or the MPEG2-PS system
This is a separator that separates S (Packetized Elementary Stream) and audio PES into video ES (Elementary Stream) and audio ES.

[0003] Reference numeral 2 denotes an SCR (System C) serving as a time reference output every time the separator 1 detects a pack header.
lock Reference) value and set STC (System
This is an STC counter that outputs (Time Clock).

[0004] Reference numeral 3 denotes a PTS (Presentation Time Stamp) output together with the video ES from the separator 1;
Compare the STC output from the STC counter 2 with
This video decoder outputs a decoded video reproduction signal when the value of TS matches the value of STC.

[0005] Further, 4 compares the PTS output together with the audio ES from the separator 1 and the STC output from the STC counter 2 and, when the PTS value matches the STC value, decodes the decoded audio. An audio decoder that outputs a reproduction signal.

Here, for example, a packet constituting a multiplexed stream of the MPEG1 system and the MPEG2-PS system includes a 4-byte packet start code consisting of a fixed value of packet start code (24 bits) + stream ID (8 bits). There is a packet header at the head, and the packet header includes packet length data indicating the position of the next packet header.

Therefore, when a packet header is detected, packet length data included in the packet header is detected, and as shown in FIG. 6, the packet length is counted and the position of the next packet header is counted. Operate to detect.

In this case, if there is an error in the packet length data or the fixed value of the next packet start code + stream ID, the packet header cannot be detected. In this case, an error signal is output and the packet header is output. The detection of the position of the packet header based on the count of the length is stopped, and the operation shifts to the operation of detecting the packet header by searching for the next fixed value of packet start code + stream ID.

[0009]

The conventional separator 1 shown in FIG. 5 includes a PT in parallel with a video ES and an audio ES.
S is output, so wiring for PTS is required, but video PES and audio P
Since the frequency of including PTS in the ES is low, there is a problem that the wiring use efficiency is low.

Further, as described above, when there is an error in the packet length data, the separator 1 outputs an error signal and stops detecting the position of the packet header by counting the packet length. Then, the operation shifts to the operation of detecting the packet header by searching for the packet start code fixed value + stream ID. For example, as shown in FIG. 7, the length to the next packet header indicated by the packet length data is If the length is longer than the actual length and the next packet header cannot be detected, an error is first noticed at this time, and there is a problem that a valid packet is regarded as an error.

The present invention has been made in view of the foregoing, and it is a first object of the present invention to provide a separator capable of improving wiring use efficiency.
And the length to the next packet header indicated by the packet length data is different from the actual length,
A second object is to provide a separator capable of preventing a valid packet from being an error.

[0012]

In the present invention, a first invention (separator according to claim 1) is to convert individual streams of a plurality of materials included in a multiplexed stream of an MPEG system into individual data and individual data for each material. In the separator that separates the streams, a time data stream indicating the decoding time of the individual data stream included in the additional information stream in the multiplexed stream is inserted at any detectable position in the individual data stream. Individual data
There is provided distribution means for distributing a time data stream indicating the time of decoding of the stream and the individual data stream.

According to the first aspect, the time data stream indicating the decoding time of the individual data stream can be located in the individual data stream by the distribution means. The dedicated wiring for transferring the time data stream indicating the decoding time to the decoder for the individual data stream can be eliminated.

According to a second aspect of the present invention, in the first aspect of the present invention, in the first aspect, the distribution means is provided in the first aspect provided in correspondence with the individual data stream and the time data stream. , Second... N-th (where n is an integer greater than or equal to 2) registers and input control of the individual data stream and the time data stream to the first, second... And a register control unit for performing a stream obtained by parallelizing the streams stored in the first, second,..., Nth registers.

According to a third aspect of the present invention, in the first aspect of the present invention, in the first aspect, the distributing means includes a first means provided corresponding to the individual data stream and the time data stream. , A second ... n-th register (where n is an integer of 2 or more), an (n + 1) -th register provided corresponding to the individual data stream, an individual data stream and a time data stream. First and second
.. A register control unit for performing input control on the n-th register and input control on the (n + 1) -th register of the individual data stream, wherein the stream stored in the first, second,. It is configured to obtain a parallelized stream.

According to a fourth aspect of the present invention, there is provided a separator for separating individual streams of a plurality of materials included in a multiplexed stream of an MPEG system into individual data streams for each material. A packet header detector for detecting a packet header by searching for predetermined data located at the beginning of the packet header included in the multiplexed stream, and a next header included in the packet header. Either a counter that counts the length to the next packet header based on the packet length data indicating the length to the packet header, or the packet header detection unit by the packet header detection unit and the count value of the counter And a setting unit for setting whether or not to give priority to the counter value. While printer counts the length of the next packet header based on the packet length data,
If the packet header detection unit detects the packet header, the packet header detection is treated as an error, and if the packet header detection by the packet header detection unit is prioritized, the counter is added to the packet length data. If the packet header detection unit detects the packet header while counting the length to the next packet header based on this, the counter is stopped.

According to the fourth aspect, when priority is given to the detection of the packet header by the packet header detector, the length to the next packet header indicated by the packet length data is different from the actual length. Even in this case, a valid packet can be prevented from being an error.

[0018]

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention. In FIG. 1, reference numeral 10 denotes multiplexing of a 1-bit stream of an MPEG1 system or an MPEG2-PS system in which a video PES, an audio PES, and a private PES, which are individual streams, are time-division-multiplexed into a 1-byte string (8-bit string). An aligner that aligns to a stream.

Reference numeral 11 denotes a multiplexed stream output from the aligner 10 for one byte per clock,
Detection of fixed value of packet start code, detection of stream ID, detection of packet length data, detection of PTS, detection of ES such as video, audio, private, etc., and ES, PTS of stream ID, video, audio, private, etc. And a stream detector that outputs a PTS detection signal and the like. In this example, the PTS is 5 bytes with a marker bit.

Reference numeral 11A denotes a packet header detector for detecting a packet header by searching for a packet start code and a stream ID.

Reference numeral 12 denotes distribution means for distributing an individual stream and a PTS such that the PTS output from the stream detector 11 is located in an individual stream such as a video ES, an audio ES, or a private ES.

FIG. 2 is a block diagram showing the structure of the distribution means 12. In FIG. 2, 14 to 17 are stream detectors 11.
Is a 1-byte register provided corresponding to a video ES, an audio ES, a private ES, and a PTS with a marker bit, which are output from the PES.

Reference numeral 18 denotes a video ES, an audio ES, and a private E output from the stream detector 11.
1 byte register provided corresponding to S, 19 is 1
This is a register control circuit for controlling the input of the byte registers 14 to 18.

In FIG. 1, reference numeral 20 designates a stream ID determination result supplied from a stream ID determiner, which will be described later, as a separation control signal, and 1-byte registers 14 to 17
Stream of 4 bytes output from
, Audio ES, and private ES.

Reference numeral 21 denotes a video E for comparison with the stream ID detected by the stream detector 11.
Stream ID of S, Stream ID of audio ES
And a stream ID register for storing the stream ID of the private ES.

Reference numeral 22 compares the stream ID detected by the stream detector 11 with the stream ID stored in the stream ID register 21 to determine the type of the stream ID detected by the stream detector 11. It is a stream ID determiner.

Here, in the case of a stream ID judgment result not stored in the stream ID register 21, the stream detector 11 stops the operation until there is a judgment result of the stream ID stored in the stream ID register 21. . Note that the result of the stream ID determination is supplied to the selector 20 via the stream detector 11.

23 sets the value of the packet length indicated by the packet length data located next to the stream ID;
This is a 16-bit counter that counts the number of bytes of the multiplex stream and supplies the count result to the stream detector 11.

Reference numeral 24 denotes a packet / header detecting unit 11
A register for setting which of the detection of the packet header by A and the count value of the 16-bit counter 23 is given priority.

The embodiment of the present invention thus configured can be operated as shown in FIG. 3A is a clock CLK, FIG. 3B is a video, audio, and private ES output from the stream detector 11, FIG. 3C is the contents of the 1-byte register 14, FIG. 3 (D) shows the contents of the 1-byte register 15, FIG. 3 (E) shows the contents of the 1-byte register 16, FIG.
(F) shows the contents of the 1-byte register 17.

In this example, in the cycle C2, one byte of ES1 output from the stream detector 11 is output.
Is stored in the 1-byte register 14, and in cycle C3, one byte of ES2 output from the stream detector 11 is stored in the 1-byte register 15, and in cycle C4, the ES2 is output from the stream detector 11. One byte of ES3 is stored in the one-byte register 16, and in cycle C5, one byte of ES4 output from the stream detector 11 is stored in the one-byte register 17, and these one-byte registers 1
ES1, ES2, E stored in 4, 15, 16, 17
S3 and ES4 are output in parallel to the separator 20.

When a PTS with a marker bit is inserted between ES5 and ES6, the next cycle C6
In the above, ES5 for one byte output from the stream detector 11 is stored in the one-byte register 14,
Of the 5-byte PTS with marker bits output from the marker bit adder 13, three bytes X1, X3
2, X3 are 1 byte registers 15, 1
6, 17 and these one-byte registers 14,
The ES5 and the three bytes X1, X2, X3 of the PTS with marker bits stored in 15, 16, 17 are output in parallel to the separator 20.

In the next cycle C7, 5 bits with marker bits output from the marker bit adder 13 are output.
The remaining two bytes X4 and X5 of the byte PTS are:
One byte of ES6 output from the stream detector 11 is stored in the 1-byte register 16 while being stored in the 1-byte registers 14 and 15, respectively, and is output from the stream detector 11 in cycle C8. One byte of ES7 is stored in the 1-byte register 17, and these 1-byte registers 14, 15, 16, 1
The two bytes X4, X5 and ES6, ES7 of the PTS with marker bits stored in 7 are output to the separator 20 in parallel.

Then, in the cycle C9, one byte of ES8 output from the stream detector 11 is 1
One byte of ES9 stored in the byte register 14 and output from the stream detector 11 in the cycle C10 is stored in the 1-byte register 15, and 1 cycle output from the stream detector 11 in the cycle C11. ES10 of byte is 1 byte register 16
In the cycle C12, one byte of the ES11 output from the stream detector 11 is stored in the one-byte register 17, and the ES8, ES8, and the like stored in the one-byte registers 14, 15, 16, and 17 are stored. ES
9, ES10 and ES11 are output in parallel to the separator 20.

Further, one embodiment of the present invention can be operated as shown in FIG. 4 (A) shows the clock CLK, and FIG. 4 (B) shows the video, audio, private, etc. output from the stream detector 11.
S, FIG. 4C shows the contents of the 1-byte register 18, FIG.
4D shows the contents of the one-byte register 14, FIG. 4E shows the contents of the one-byte register 15, FIG. 4F shows the contents of the one-byte register 16, and FIG. 17 is shown.

In this example, in the cycle C2, one byte of ES1 output from the stream detector 11 is output.
Is stored in the 1-byte register 14, and in cycle C3, one byte of ES2 output from the stream detector 11 is stored in the 1-byte register 15, and in cycle C4, the ES2 is output from the stream detector 11. One byte of ES3 is stored in the one-byte register 16, and in cycle C5, one byte of ES4 output from the stream detector 11 is stored in the one-byte register 17, and these one-byte registers 1
ES1, ES2, E stored in 4, 15, 16, 17
S3 and ES4 are output in parallel to the separator 20.

When a PTS with a marker bit is inserted between ES4 and ES5, the next cycle C6
In the above, ES5 for one byte output from the stream detector 11 is stored in the one-byte register 18,
Of the 5-byte PTS with marker bits output from the marker bit adder 13, 4 bytes X1 and X1
2, X3 and X4 are 1-byte registers 1
4, X2, X3, X4 of the four bytes of the PTS with the marker bit stored in the one-byte registers 14, 15, 16, 17
Are output in parallel to the separator 20.

In the next cycle C7, 5 bits with marker bits output from the marker bit adder 13 are output.
Of the byte PTS, the remaining one byte X5 is stored in the one-byte register 14, the ES5 stored in the one-byte register 18 is stored in the one-byte register 15, and output from the stream detector 11. One byte of ES6 is stored in the one-byte register 16, and in cycle C8, one byte of ES7 output from the stream detector 11 is stored in the one-byte register 17, and these one-byte registers 14, 15, 16, 1
The one byte X5, ES5, ES6, and ES7 of the PTS with the marker bit stored in 7 are output to the separator 20 in parallel.

In the cycle C9, one byte of ES8 output from the stream detector 11 is set to one.
One byte of ES9 stored in the byte register 14 and output from the stream detector 11 in the cycle C10 is stored in the 1-byte register 15, and 1 cycle output from the stream detector 11 in the cycle C11. ES10 of byte is 1 byte register 16
In the cycle C12, one byte of the ES11 output from the stream detector 11 is stored in the one-byte register 17, and the ES8, ES8, and the like stored in the one-byte registers 14, 15, 16, and 17 are stored. ES
9, ES10 and ES11 are output in parallel to the separator 20.

In one embodiment of the present invention,
When the register 24 is set to give priority to the count value of the 16-bit counter 23, the stream detector 11 outputs the packet header while inputting the multiplexed stream by the number of bytes set in the 16-bit counter 23. When the detecting unit 11A detects the packet header by searching for the packet start code fixed value + the stream ID, it judges that the data of the stream is missing, outputs an error signal of the stream, and outputs a 16-bit counter 23.
Is stopped, and processing is performed from the detected packet header.

Immediately after inputting the multiplexed stream for the number of bytes set in the 16-bit counter 23,
When the packet header detector 11A detects the fixed value of the packet start code + the stream ID, the stream detector 11 performs processing from the packet header.

Immediately after the stream is input for the number of bytes set in the 16-bit counter 23, the packet header detector 11A sets the packet start code fixed value +
When the stream ID cannot be detected, it is determined that redundant error data is included, and the 16-bit counter 23
And outputs a stream error signal until the next packet start code fixed value + stream ID is detected.

In addition, the register 2 gives priority to the detection of the packet header by the packet header detector 11A.
When set to 4, the stream detector 11
During the input of the multiplexed stream for the number of bytes set in the 16-bit counter 23, the packet header detector 11A sets the packet start code fixed value + the stream ID
Is detected, it is determined that a packet length data error has occurred, the 16-bit counter 23 is stopped, and
The header detector 11A performs processing from the detected packet header.

If the packet header detector 11A cannot detect the next packet start code fixed value + stream ID immediately after counting the multiplexed stream by the number of bytes set in the 16-bit counter 23, , The stream detector 11 does not output the stream error signal, and continues the processing until the next packet start code fixed value + stream ID is detected.

The packet header detector 11A detects the packet header and the 16-bit counter 2
If none of the count values of 3 is prioritized, 16
If the packet header detection unit 11A detects the fixed packet start code value + stream ID while counting the multiplexed stream by the number of bytes set in the bit counter 23, the data of the stream is lost or the data of the packet length is detected. After the 16-bit counter 23 finishes counting, an error signal is output until the next packet start code fixed value + stream ID is detected.

If the packet header detector 11A cannot detect the next packet start code fixed value + stream ID immediately after inputting the stream for the number of bytes set in the 16-bit counter 23, the stream Is determined to be missing data or a packet length data error, the next packet start code fixed value + stream I
An error signal is output until D is detected.

As described above, according to the embodiment of the present invention, since the distribution means 12 is provided, the PTS output from the stream detector 11 can be used for the video ES and the audio E
Since it can be located in an individual stream such as S or private ES, and a PTS dedicated wiring for transferring the PTS to the decoder for the individual stream can be eliminated, the wiring efficiency can be improved.

The packet header detector 11A detects the packet header and the 16-bit counter 2
Since the register 24 for setting which of the three count values is prioritized is provided, when the packet header detection by the packet header detection unit 11A is prioritized, the next packet indicated by the packet length data is used. Even if the length to the header is different from the actual length, it is possible to prevent a valid packet from being an error.

[0049]

As described above, according to the first, second or third aspect of the present invention, the time data stream indicating the decoding time of the individual stream is placed at an arbitrary position in the individual stream by the distribution means. Since the data can be inserted, a dedicated line for transferring the time data stream indicating the decoding time of the individual stream to the decoder for the individual stream is not required, and the use efficiency of the line can be improved.

According to the fourth aspect of the present invention, when priority is given to the detection of the packet header by the packet header detector, the length to the next packet header indicated by the packet length data is equal to the actual length. Even in a different case, a valid packet can be prevented from being an error.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a distribution unit included in the embodiment of the present invention.

FIG. 3 is a timing chart showing an operation example of one embodiment of the present invention.

FIG. 4 is a timing chart showing an operation example of one embodiment of the present invention.

FIG. 5 is a block diagram showing a part of a receiving side of a conventional MPEG system.

FIG. 6 is a timing chart for explaining the operation of the conventional separator shown in FIG.

FIG. 7 is a timing chart for explaining problems of the conventional separator shown in FIG.

[Explanation of symbols]

 Reference Signs List 10 Aligner 11 Stream detector 12 Distribution means 20 Selector 21 Stream ID register 22 Stream ID determiner 23 16-bit counter 24 Register ES Elementary stream PTS Presentation time stamp

Claims (4)

[Claims] 1. A separator for separating individual streams of a plurality of materials included in a multiplexed stream of an MPEG system into individual data streams for each material, wherein the individual stream included in an additional information stream in the multiplexed stream is separated. Distributing the individual data stream and the time data stream such that a time data stream indicating the time of decoding of the data stream is inserted at any detectable position in the individual data stream. A separator comprising means. 2. The distributing means includes first, second,..., N-th (n is an integer of 2 or more) provided corresponding to the individual data stream and the time data stream. , And a register controller that controls the input of the individual data stream and the time data stream to the first, second,..., Nth registers. The separator according to claim 1, wherein the separator is configured to obtain a stream obtained by parallelizing the stream stored in the n-th register. 3. The first, second,..., N-th (where n is an integer of 2 or more) provided corresponding to the individual data stream and the time data stream. , A (n + 1) th register provided corresponding to the individual data stream, and input control of the individual data stream and the time data stream to the first, second,... And a register control unit for controlling the input of the individual data stream to the (n + 1) th register so as to obtain a stream obtained by parallelizing the streams stored in the first, second,..., Nth registers. The separator according to claim 1, wherein the separator is configured as follows. 4. A demultiplexer for separating individual streams of a plurality of materials included in a multiplex stream of an MPEG system into individual data streams for each material, wherein the demultiplexer is located at the beginning of a packet header included in the multiplex stream. A packet header detection unit that detects a packet header by searching for predetermined data to be processed, and a packet length data indicating a length to a next packet header included in the packet header. A counter for counting the length to the next packet header, and a setting unit for setting which of the detection of the packet header by the packet header detection unit and the count value of the counter is to be prioritized. When priority is given to the count value of the counter,
If the packet header detection unit detects the packet header while the counter counts the length to the next packet header based on the packet length data, the detection of the packet header is erroneous. In the case where the detection of the packet header by the packet header detection unit is prioritized, the packet header is counted while the counter counts the length to the next packet header based on the packet length data. The separator according to claim 1, wherein the counter is stopped when the detecting unit detects the packet header.