JPH1098443A - Transmitter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize the hardware change when a switching condition standard is changed and to reduce the path changeover time by reducing number of connection lines among a West side path terminating equipment(PTE), an East side PTE and a selector section physically independent of each other. SOLUTION: In the transmitter having independent printed circuit boards physically independent for a West side PTE 508, an East side PTE 509 and a selector section 511, a low speed digital frame signal is monitored in the inside of the West side PTE 508 and the East side PTE 509 and in the case of detection of a fault occurrence, an n-bit coded code is inserted to a transport overhead or an STS-1 path overhead(POH) of a drop path frame having already been terminated and getting idle in bits and bytes with respect to the fault, and the selector section 511 uses the hardware logic to compare codes of the drop path frame outputted from the West side PTE 508 and the East side PTE 509 to control a selector 602 so as to provide an output of data in a path with lower priority to a conversion section.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission device, and more particularly to a transmission device suitable for use in digital multiplex signal transmission in a communication device.

[0002]

2. Description of the Related Art An example of a conventional transmission apparatus is a SONET (Synchronous Optical Network) standardized in North America.
A description will be given of the transmission device used in the first embodiment.

FIG. 1 shows an STS-1 frame standardized by SONET. The STS-1 frame has 9 rows and 3 columns of transport overhead, which is section or line maintenance / operation information,
9 rows and 87 columns STS-1 SPE (Synchronous Payload Envelop
e). The STS-1 SPE is composed of an STS-1 POH (Path Over Head), which is maintenance operation information in 9 rows and 1 column, and 9 rows and 86 columns.
Consists of a row of STS-1 payloads.

[0004] The transport overhead corresponds to the ST according to the present invention.
It has an S payload pointer, and its configuration is shown in FIG. S
The TS payload pointer is composed of H1, H2 and H3 bytes, and the b5 and b6 bits of the H1 byte define the values of “0” and “0” of the digital signal. The other bits do not relate to the present invention, and thus the description is omitted.

FIG. 3 shows four transmission devices (501), (502) and (5).
03) and (504) are connected by an optical fiber transmission line in a ring shape to form a SONET (Synchronous Optical Network).
k) shows a ring network. Since the four transmission devices (501), (502), (503), and (504) have the same internal configuration, FIG.
Regarding (502) and (504), the internal block configuration is shown.

In FIG. 3, for example, a transmission device (504)
Is West Side STE / LTE (505) (STE: SectionTerminating Equi
pment, LTE: Line Terminating Equipment) and East ST
E / LTE (506), conversion unit (507), West side PTE (508) (PTE: P
ath Terminating Equipment), East-side PTE (509), demultiplexing unit (510) (Add Drop Multiplex), and selector unit (51
1).

[0007] The West side STE / LTE (505) is a terminator for terminating the Transport Overhead in the STS-n frame signal of the upper frame output from the transmission device (501) and standardized by SONET, Similarly, the East-side STE / LTE (506) is a terminator that terminates the transport overhead output from the transmission device (503). Further, the conversion unit (507) is a conversion unit that converts DS3, which is a low-speed signal, into an STS-1 frame or vice versa.

[0008] Further, the demultiplexing section (510) includes the conversion section.
The STS-1 frame output from (507) is multiplexed into an arbitrary time slot of the STS-n frame, and the West side STE / LTE (50
5) Or East side STE / LTE (506) connection function and West side ST
The STS-1 frame is separated from any time slot of the STS-n frame output from the E / LTE (505)
Connect to the EST side PTE (508), or, from any time slot of the STS-n frame output from the East side STE / LTE (506) to the inside of the device, separate the STS-1 frame, and 50
9) Function to connect to East STE / LTE (506) or West S
Any STS-1 frame of the STS-n frame output from the TE / LTE (505) to the inside of the device can be sent to the West side STE / LTE (505) or the East side S
A function of connecting to an arbitrary time slot of an STS-n frame input to the TE / LTE (506).

The selector section (511) is connected to the West PTE (508).
STS-1 frame (hereinafter referred to as West-side drop path) output from the STS-1 frame (hereinafter referred to as East-side drop path) output from the East-side PTE (509) is selected. . The same signal flows on both the West and East sides, providing a redundant configuration for the working system and the standby system. Whether the selector unit (511) selects the West side drop path or the East side drop path is determined by the failure of the drop path, and usually selects the drop path without failure,
When the failure of the West side drop path and the failure of the East side drop path conflict, the selector unit (511) compares the two failures,
Select a drop path with a less severe obstacle, and
Connect to 07).

[0010] The type of failure and the switching priority are determined by Bellcore's GR-1400-CORE ISSU, a North American standard-setting body.
It is standardized in Chapter 5, E1, March 1994. FIG.
Indicates the type and meaning of the fault, and an example of the priority is shown below.

1. AIS, UNEQ 2. Excessive STS PATH BER (hereinafter referred to as EBER) 3. SD In the above, each number indicates a priority, and indicates a more serious obstacle in order from a younger number. Bellcore
Has standardized the above-mentioned priorities for both low-speed digital frames called VT1.5 and STS-1, but since the operating principle of the present invention is the same for both, only the STS-1 frame will be described here.

First, the contents of each fault shown in FIG. 4 will be described. AIS is a notification from the upstream device that the drop path is faulty, and the H1, H2, and H3 bytes are all "1" (2
It is indicated by the value code H). UNEQ is a failure where all C2 bytes of the STS-1 POH are "0" in the digital signal, and EBER
Indicates that the error rate of the STS-1 SPE is 1/10 ³ or more.
The STS-1 SPE error rate was calculated using the STS-1 POH
However, since the calculation method is not related to the present invention, a detailed description is omitted. SD is EBER
Although the error rate is an obstacle that does not
According to the standard document, it is arbitrarily specified with a value between 1/10 ^{5 and} 1/10 ⁹ . UNEQ, EBER, and SD are detected by the receiving device from the state of the received signal, and are used as switching factors.

Here, as shown in FIG. 3, the transmission device (50
When the signal input to 2) is output from the transmission device (504) via the SONET ring network, the transmission device (50
When the optical fiber output from 1) and input to the transmission device (504) is cut as shown by the mark x in FIG.
4) West side STE / LTE (505) detects disconnection of the optical fiber and performs AIS for all paths connected to the demultiplexing unit (510).
Send The West PTE (508) detects the AIS and sends the failure information to the selector (511). Here, West PTE (50
The failure information of 8) is compared with the failure information of the East-side PTE (509). Since there is no fault information for East PTE (509), the selector
In (511), the east side drop path is selected, the standby system is selected as shown in FIG. 5, and the service can be continued.

FIG. 6 shows a conventional PTE (50 PTE).
8) and the configuration of the East side PTE (509) and the selector unit (511). Now, the selector (602) in the selector section (511) is
Assuming that the st-side drop path is selected, FIG.
When the optical fiber break indicated by the mark occurs, the West side STE /
The West side drop path separated from the LTE (505) to the West side PTE (508) is a line (605) connected from the demultiplexer (510) to the selector (602) via the West side PTE (508). ), But at that time, the West side PTE (508), H1, H2, H3, B3,
The C2 byte monitoring unit (601) monitors the H1, H2, H3, B3, and C2 bytes in the frame of the drop path.

The format of the West-side drop path before input to the H1, H2, H3, B3, C2 byte monitoring unit (601) is shown in FIG.
Shown in In FIG. 7, the transport overhead of the shaded portion is shown.
Has already been terminated at the West side STE / LTE (505), so an arbitrary value is inserted. Since the H1 and H2 bytes are AIS, all "1" s are inserted. H1, H2, H3, B3, C2
The byte monitoring unit (601) detects the AIS and, for each fault,
The failure information is transmitted to a corresponding line (here, AIS or UNEQ line) connected to the microprocessor (604) in the selector unit (511).

The West-side drop path after output from the H1, H2, H3, B3, C2 byte monitoring unit (601) is supplied to the selector unit (51
Input to the selector (602) of 1). FIG. 8 shows H1, H2, H3, B
3. Shows the format of the West-side drop path after output from the C2 byte monitoring unit (601). The STS payload pointer and the STS-1 POH are the H1, H2, H3, B3, C2 byte monitor (60
Since it is terminated at 1), an arbitrary value is inserted.

From the East side STE / LTE (506) to the East side PTE (50
The East side drop path separated to 9) is
From (510) through the line (606) connected to the selector (602) via the East-side PTE (509), at that time, the East-side PTE (509)
The H1, H2, H3, B3, and C2 byte monitoring unit (603) monitors the H1, H2, H3, B3, and C2 bytes of the drop path. The format of the East drop path is the same as the format of the West drop path, and will not be described here.

H1, H2, H3, B3, C2 of East side drop path
If the byte satisfies the above-described fault condition, a fault signal is transmitted to the corresponding line connected to the microprocessor (604) in the selector (511) for each fault.
Here, since no fault has occurred, a fault signal is transmitted to the "no fault" line.

The East-side drop path output from the H1, H2, H3, B3, C2 byte monitoring unit (603) is output to the selector unit (511).
To the selector (602). Microprocessor (604)
Compares the priority of AIS and UNEQ signals output from the East PTE (509) with the "no fault" signal output from the West PTE (508) and selects the East drop path with no fault To output the selection signal to the selector (602).
The selection signal is represented by a binary code. If it is "0", it is a West drop path, and if it is "1", it is an East drop path. Thus, as shown in FIG. 9, the operation of selecting the normal drop path (East drop path) is completed.

[0020]

The above prior art is disclosed in West.
The fault information of the drop path detected by the H1, H2, H3, B3, C2 byte monitoring units (601) and (603) of the side PTE (508) and the East side PTE (509) is transmitted through individually connected lines. Through, selector section
We input to the microprocessor (604) in (511).
st side PTE (508) and East side PTE (509), selector section (511)
The number of connection lines to the circuit increases, and the circuit scale increases. For example, when the drop path is at the VT1.5 level, a maximum of 28 lines can be accommodated in the STS-1 frame, so in the case of the STS-n frame configuration, 28 × n (n = 1, 3, 12, 48...) × the number of alarms In addition to the need for × 2 (working system and standby system), the hardware scale was increased due to the need for a corresponding microprocessor and peripheral circuits.

On the other hand, although it has already been described that the path failure priority is standardized in the Bellcore standard,
According to the GR-1400-CORE ISSUE1, March 1994, Chapter 5, apart from the above standard, the switching time of the drop path is within 50 ms as an absolute requirement and 25 m as an optional requirement.
Although it is standardized to be within s, it is difficult for the transmission device having the above-described circuit configuration to satisfy the demand for the high-speed switching time.

Also, since individual lines are used, the West side
In a transmission apparatus having a circuit board in which the PTE (508) and the East-side PTE (509) and the selector unit (511) are physically independent, when the switching condition standard is changed, the hardware system Depending on the configuration, it is necessary to change the back board in addition to changing the circuit board.

Therefore, according to the prior art shown in the above example, the first object of the present invention is to provide a West side PTE
(508) and a transmission device having an East-side PTE (509) and a selector unit (511), reducing the number of connection lines between the West-side PTE (508) and the East-side PTE (509) and the selector unit (511). By
The objective is to reduce the hardware scale, shorten the path switching time, and improve serviceability.

Further, according to the prior art shown in the above example, a second object of the present invention is that the West side PTE (508) and East side PTE (509) and the selector unit (511) are physically connected. In a transmission device with an independent circuit board, the West side PTE (50
8) and reduce the number of connection lines between the East-side PTE (509) and the selector unit (511) to reduce the hardware scale and minimize hardware changes when the switching condition standard is changed. To provide an economical system.

[0025]

According to the present invention, the first object is to provide a transmission apparatus having a West side PTE (508) and an East side PTE (509) and a selector section (511). PTE (50
8) and the PTE (509) side on the East side monitor the low-speed digital frame signal, and if a failure is detected, code the failure into n bits and terminate the code in the drop path frame. Vacant bits and bytes are inserted into the Transport Overhead or STS-1 POH, and the selector unit (511) side, West side PTE (508) and East side PTE (509)
This is achieved by comparing the code of the drop path frame output from the above with hardware logic, and controlling the selector (602) to output the path with the lower priority to the conversion unit.

According to the present invention, the second object is to
In the transmission device having a circuit board in which the side PTE (508) and the East side PTE (509) and the selector unit (511) are physically independent,
The low-speed digital frame signal is monitored on each of the West PTE (508) and East PTE (509) circuit boards, and if a failure is detected, the failure is coded into n bits and the code is passed to the drop path. Transport Overhead, which is already terminated in the frame and is a free bit or byte, or
A circuit to be inserted into STS-1 POH is provided, and the selector part (511) circuit board compares the code of the drop path frame output from the West side PTE (508) and the East side PTE (509) with hardware logic This is achieved by providing a circuit that controls the selector (602) so as to output the path with the lower priority to the conversion unit.

The general solution according to the present invention is as follows.

According to the present invention, one of a plurality of multiplexed high-speed digital transmission paths is selected, a high-speed digital frame signal is relayed and transmitted, and a time slot in the multiplexed high-speed digital frame signal is selected. A demultiplexing unit that forms a drop path that separates one or more low-speed digital frame signals into a low-speed digital signal transmission line belonging to itself; and a high-speed digital frame signal corresponding to the plurality of multiplexed high-speed digital transmission lines. In a transmission apparatus having a redundant path configuration of a working path and a protection path configured and having a working / standby path switching unit that performs a path switching operation when a path failure occurs, at least one of the working path and the protection path is provided. When a failure of the high-speed or low-speed digital frame signal is detected on one of the paths, For each system of use and standby, encoding the failure content according to the degree of failure, and inserted in the empty bits or bytes of the low speed digital frame signal,
In the transmission apparatus, the working / standby path switching unit includes means for comparing the bit or byte by hardware logic and switching a path to a path having a lower failure priority. .

According to the present invention, one of a plurality of multiplexed high-speed digital transmission paths is selected, a high-speed digital frame signal is relay-transmitted, and a time slot in the multiplexed high-speed digital frame signal is selected. A demultiplexing unit that forms a drop path that separates one or more low-speed digital frame signals into a low-speed digital signal transmission line belonging to itself; and a high-speed digital frame signal corresponding to the plurality of multiplexed high-speed digital transmission lines. A working / protection path switching unit that has a redundant path configuration of a working path and a protection path configured and that performs a path switching operation when a path failure occurs;
In a transmission device having a drop path termination unit interposed between the protection system switching unit and the protection system switching unit, when a failure of the high-speed digital frame signal is detected in at least one of the working system path and the protection system path, In the drop path termination unit, for each of the working system and the protection system,
The means for coding the content of the fault according to the degree of the fault and inserting it into an empty bit or byte of the low-speed digital frame signal is compared with the bit or byte by hardware logic in the active / standby path switching unit. And a means for switching a path to a path having a lower failure priority.

According to the present invention, there is provided the transmission apparatus as described above, wherein the drop path termination section and the working / standby path switching section are formed on separate circuit boards.

[0031]

FIG. 10 shows an embodiment of the switching device according to the present invention. One of the features of the present invention is as follows.
West side PTE (508) and East side PTE (509) and selector section (51
1) is connected only by the West side drop path line (605) and the East side drop path line (606).

As described above, when an optical fiber breakage as shown in FIG. 3 occurs, the West side drop path becomes AIS and is input to the West side PTE (508). It passes through the line (605) connected to the selector (602) via the PTE (508), at which time the H in the West side PTE (508) is
The H1, H2, H3, B3, and C2 bytes of the drop path are monitored by the 1, H2, H3, B3, and C2 byte monitoring unit (601). H1, H2, H3,
The format of the West-side drop path before input to the B3, C2 byte monitoring unit (601) is shown in FIG. 7, and H1, H2, H3, B
3. The format of the West-side drop path after outputting the C2 byte monitoring unit is shown in FIG. 8, respectively. However, since both figures have already been described, description thereof will be omitted here.

In the H1, H2, H3, B3, and C2 byte monitoring unit (601), when the H1, H2, H3, B3, and C2 bytes of the West-side drop path satisfy the above-described fault conditions, A fault signal is output to a corresponding line connected to the switching code converter (101). Here, AIS, UNE
A fault signal is transmitted to the Q line.

This failure signal is transmitted to the switching code converter (1
In 01), it is converted into a switching code and inserted into the H1 'byte. FIG. 11 shows an example of assigning a switching code to various failures. The reason why AIS and UNEQ have the same code is
This is for conforming to the Bellcore standard. In the case of AIS, according to FIG. 11, the b0 and b1 bits of the H1 byte are respectively converted to “1” and coded as (b0, b1) = (1, 1). (Hereinafter, referred to as AIS code). The AIS code is output to the switching code converter (101), and b0 is H1 'of the West side drop path.
The b5 bit of the byte and b1 are also inserted into the b6 bit. That is, the H1 byte is, as shown in FIG.
After passing through the H2, H3, B3, C2 byte monitoring unit (601), paying attention to empty bytes, in the present invention, b1 of the H1 'byte
5 bits and b6 bits are used.
FIG. 12 shows the format of the West-side drop path after the switching code has been inserted.

If the failure is UNEQ, H1 'of the STS-1 POH
The b5 and b6 bits of the byte are converted to digital signals `` 1 '' and `` 1 '', respectively, and if the fault is EBER, the `` 0 '' of the digital signal is converted to the b5 and b6 bits of the H1 byte. , "1". The reason that AIS and UNEQ have the same code is to conform to the Bellcore standard.

FIG. 13 shows the internal configuration of the West PTE (508). The switching code conversion unit (101) includes an encoder (701)
And a parallel / serial conversion circuit (703), H1, H2, H
In the 3, B3, C2 byte monitoring unit (601), when AIS is detected, among the faulty lines connected to the encoder (701), AIS, outputs `` 1 '' to the UNEQ line, "0" is output for other faulty lines. Encoder (701)
Now, encode four input signals and two outputs (b0,
In b1), an AIS code (1, 1) of “1” is generated and output to the parallel / direct conversion circuit (703). In the parallel / serial conversion circuit (703), the parallel AIS code is converted into a serial AIS code.

The switching code insertion section (102) is composed of a switching code insertion selector (702), and converts the serial AIS code into b5 bits, b5 bits of the H1 'byte of the West drop path.
At the timing of the 6-bit position, the switching code insertion selector (702) selects the side of the parallel / serial conversion circuit (703), and converts the serial AIS code output from the parallel / serial conversion circuit (703) into:
Insert into the b5 and b6 bits of the H1 'byte of the West side drop path.

As shown in FIG. 10, the West-side drop path output from the switching code insertion unit (102) passes through the H1 'bytes b5 and b6 monitoring units (103) in the selector unit (511), and the selector ( 602), and at this time, the H1 ′ byte (b5, b6) bit monitoring unit (103) outputs the H
The 1 'byte (b5, b6) bit is output to the priority processing / system selection unit (107).

Further, as shown in FIG.
The East-side drop path separated into the East-side PTE (509) by the E / LTE (506) is the East-side PTE (509) from the demultiplexing unit (510).
Through the line (606) connected to the selector unit via the H1, H2, H3, B3, C2 byte monitoring unit (603) in the East side PTE (509). , H2, H3, B3, C
Monitor 2 bytes. The format of the East-side drop path is the same as the format of the West-side drop path, and a description thereof will be omitted. In the H1, H2, H3, B3, C2 byte monitoring unit (603), the H1, H2,
When the H3, B3, and C2 bytes satisfy the above-described fault condition, a fault signal is output to the corresponding line connected to the switching code converter (104) for each fault. Here, a fault signal is transmitted to the "no fault" line.
In the switching code conversion unit (104), the “no failure” signal is obtained by changing the b0 bit and the b1 bit according to FIG.
Each is converted to "0". This is called "failure-free code".

The “failure-free code” converted by the switching code conversion unit (104) is transmitted to the switching code insertion unit (10).
5), and b0 is the H1 byte of the East-side drop path.
To the b5 bit, similarly, b1 is inserted to the b6 bit, respectively. Here, the format of the East-side drop path and the procedure up to the priority processing / system selection unit (107) are the same as those of the West side, and thus description thereof will be omitted. The East-side drop path output from the switching code insertion unit (105) is input to the selector (602) through the H1 'byte (b5, b6) bit monitoring unit (106) in the selector unit (511). The H1 'byte (b
The (5, b6) bit monitoring unit (106) outputs the information of the H1 'byte (b5, b6) bits of the East side drop path to the priority processing / system selection unit (107). In the priority processing / system selection unit (107),
The (AIS code) output from the West side H1 'byte (b5, b6) bit monitoring unit (103) and the East side H1' byte (b5, b
6) "No fault code" output from the bit monitoring unit (106)
Are compared with each other in accordance with the priority processing operation of the priority processing / system selection unit (107) in FIG. 14, and the selection signal “1” is sent to the selector (602) so as to select the East-side drop path.
Is output.

FIG. 15 shows the internal configuration of the selector section (511). The West-side drop path into which the [AIS code] is inserted is the latch circuit (8) of the H1 byte (b5, b6) bit monitoring unit (106).
01), (802), [AIS code] (1,1) is taken out,
This is transmitted to the latch circuit (806) in the priority processing / system selection unit (107). The latched [AIS code] (1, 1) and “no fault code” (0, 0) are compared by the comparison circuit by the comparison timing signal.
(807). Here, as described before, FIG.
4 according to the priority processing operation, and the selector (602)
In response, the selection signal “1” is output to select the East side drop path. Thus, switching to the East side drop path is performed as shown in FIG.

Since the above operations can be all realized by hardware logic, after detecting a failure, the H1 'byte
(b5, b6) bit switching code insertion at least 2
It is completed in the frame (250 μs), and (b5,
b6) Switching to a normal drop path by the selector (602) after taking out the bit is completed within 125 μs. Therefore, all switching is completed within 375 μs at the latest, so that the path switching time can be reduced.

As described above, there is a priority order for path failures. Even when a failure conflicts, it is possible to select a path having a lower priority order in the above time.

Further, by inserting the fault signal of the drop path into an empty bit of the drop path where the fault is detected, it is possible to reduce the number of lines for each fault connected between the PTE and the selector unit, and to reduce the hardware scale. In addition to the above, it is possible to reduce the amount of change because the change of the switching condition standard can be dealt with only by changing the circuit board.

[0045]

As described above, according to the present invention, all operations such as path failure detection and failure priority processing can be configured by hardware logic, so that the path switching time can be reduced.

Further, by inserting the fault signal of the drop path into an empty bit of the drop path in which the fault is detected, it is possible to reduce the number of lines for each fault connected between the PTE and the selector unit, thereby reducing the hardware scale. In addition, when the switching condition standard is changed, it can be realized by changing only the circuit board, so that the amount of change can be reduced.

[Brief description of the drawings]

FIG. 1 is an STS-1 frame diagram that is a SONET frame.

FIG. 2 is an STS payload pointer diagram of an STS-1 frame.

FIG. 3 is a configuration diagram of a SONET ring network configuration and a transmission device.

FIG. 4 is a table showing types and meanings of faults.

FIG. 5 is a configuration diagram of a SONET ring network and a transmission device after a failure has occurred.

FIG. 6 is a block diagram showing a drop path switching device according to the related art.

FIG. 7 is a format diagram of a drop path before input to West and East PTEs.

FIG. 8 is a format diagram of a drop path after output from a H1, H2, H3, B3, C2 byte monitoring unit.

FIG. 9 is a block diagram showing a state after a failure has occurred in a drop path switching device according to the related art.

FIG. 10 is a block diagram showing a drop path switching device of the present invention.

FIG. 11 is a table showing code assignment for each fault.

FIG. 12 is a format diagram of a drop path after output from a switching code insertion unit.

FIG. 13 is an internal block diagram of a PTE according to the present invention.

FIG. 14 is a chart showing the logic of a failure priority processing operation in the present invention.

FIG. 15 is an internal block configuration diagram of a selector unit according to the present invention.

FIG. 16 is a block diagram showing a state after a failure has occurred in the drop path switching device according to the present invention.

[Explanation of symbols]

101: switching code conversion unit, 102: switching code insertion unit, 103: H1 'byte b5, b6 monitoring unit, 104: switching code conversion unit, 105: switching code insertion unit
106: H1 byte b5, b6 monitoring unit, 501 to 504: transmission device, 505: West side STE / LTE, 506: East side STE / LT
E, 507: conversion unit, 508: West side PTE, 509: East
Side PTE, 510: Demultiplexer, 511: Selector, 6
01: West side drop path H1, H2, H3, B3, C2 byte monitoring unit, 602: selector, 603: East side drop path H
1, H2, H3, B3, C2 byte monitoring unit.

Continued on the front page (72) Inventor Takao Fukushima 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Yokohama

Claims (3)

[Claims] 1. A method for selecting one of a plurality of multiplexed high-speed digital transmission paths, relaying and transmitting a high-speed digital frame signal,
A demultiplexing section for forming a drop path for separating one or more low-speed digital frame signals from a time slot in the multiplexed high-speed digital frame signal to a low-speed digital signal transmission line belonging to the multiplexing high-speed digital frame signal; A working / protection path switching unit for a frame signal, which has a redundant path configuration of a working path and a protection path configured corresponding to the plurality of multiplexed high-speed digital transmission paths, and performs a path switching operation when a path failure occurs. When a failure of the high-speed or low-speed digital frame signal is detected in at least one of the working path and the protection path, a failure occurs in each of the working system and the protection system. The content of the fault is coded according to the degree of the vacant bit of the low-speed digital frame signal or Transmission means, wherein the active / standby path switching unit compares the bit or byte with hardware logic and switches the path to the one with a lower failure priority. apparatus. 2. One of a plurality of multiplexed high-speed digital transmission lines is selected, and a high-speed digital frame signal is relayed and transmitted.
A demultiplexing section for forming a drop path for separating one or more low-speed digital frame signals from a time slot in the multiplexed high-speed digital frame signal to a low-speed digital signal transmission line belonging to the multiplexing high-speed digital frame signal; A working / protection path switching unit for a frame signal, which has a redundant path configuration of a working path and a protection path configured corresponding to the plurality of multiplexed high-speed digital transmission paths, and performs a path switching operation when a path failure occurs. And a drop path terminating unit interposed between the demultiplexing unit and the working / standby switching unit, wherein the transmission path includes at least one of the working path and the protection path. When detecting a failure of the high-speed or low-speed digital frame signal, the drop path termination unit outputs the current signal. Means for coding the content of a fault according to the degree of fault for each of the system and the protection system, and inserting the fault into a vacant bit or byte of the low-speed digital frame signal; Or a means for comparing bytes by hardware logic and switching a path to a path having a lower failure priority. 3. The transmission apparatus according to claim 2, wherein the drop path termination section and the active / standby path switching section are formed on separate circuit boards.