JPH1093843A - Noise removal device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the scale of a noise removal device for removing noise such as the ringing of an extended picture signal and block distortion at the time of incarnation. SOLUTION: A noise detector 101 writes noise state data of one bit, which is obtained for the picture signal of one block, into a state memory 102 at the same write address as the write address at which a picture decoder 401 writes the picture signal into a first picture memory 405. The noise detector 101 reads the picture signal from the state memory 102 at the same read address as the read address at which the picture decoder 401 reads it from the first picture memory 405.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a noise removing apparatus for decompressing and decoding a compressed image signal and removing noise such as ringing and block distortion near a high-frequency image signal of the decompressed image signal.

[0002]

2. Description of the Related Art In recent years, MPEG (Moving Picture Exper
ts Group, international standard for media-integrated video compression), J
Standardization using various image compression techniques such as PEG (Joint Photographic Experts Group, an international standard for color still image compression) is underway. The image compression technology is
The purpose is to reduce the amount of information by removing redundant parts from an image signal that originally has an enormous amount of information, and to make it easier for all devices to handle the image signal.

[0003] The image compression technique is roughly divided into a lossless encoding method and an irreversible encoding method. The lossless encoding method is a method in which information can be stored in the process of compression and decompression and the original image can be completely reproduced, and the irreversible encoding method is an encoding method in which the original image cannot be completely reproduced. Since the irreversible compression method basically discards information, some problems appear when the compressed image signal is expanded and decoded. Generally speaking, the more discarded information, that is, the higher the compression ratio, the more adverse noise occurs. For example, ringing around a high-frequency image signal or block distortion in which a fast-moving portion looks like a block on an image reproduction monitor. A device that removes or reduces noise such as ringing and block distortion is a noise removal device.

[0004] A conventional noise elimination device will be described below. FIG. 4 is a block diagram showing a conventional noise removing apparatus. The input compressed image signal is decompressed and decoded by the image decoder 401. For example, in order to perform inter-frame motion compensation and decompress decoding of a compressed image signal that has been subjected to inter-frame motion prediction encoding using time correlation of an image, an image memory 405 having a capacity to store at least one frame of image signal is required. It is. If necessary, the image decoder 401 writes an image signal into the image memory 405 using a write enable and a write address, and reads an image signal using a read address. Noise of the decompressed expanded image signal is detected by the noise detector 402.

FIG. 5 shows, for example, MPEG1 (MPEG
SIF (Sou) used in one of the standard recommendations
rc Input Format (original image input format) of the NTSC system (30 frames / sec, 35
2 × 240 pixels / frame). The minimum image unit of this original image is 8 × 8 pixels (8 pixels in the horizontal direction and 8 pixels in the vertical direction, for a total of 64 pixels and one block).
Noise of an image signal obtained by decompressing and decoding a compressed image signal compressed as follows is generated in units of one block. In order to detect this noise, these pixels must be temporarily stored, and an image memory 406 having a storage capacity of 352 horizontal pixels × eight vertical pixels is required.

The noise detector 402 writes an image signal to the image memory 406 using a write enable and a write address as needed, and reads the image signal at a read address. For example, when ringing noise is detected, the noise detector 402 sets the noise detection signal to a high level if the image signal in a certain block includes an image signal of a predetermined frequency or higher, and to a low level if the image signal is not included. Is output. It takes a certain time to detect noise,
Since the timing of the noise detection signal output from the noise detector 402 and the timing of the expanded image signal output from the image decoder 401 are shifted, the expanded image signal is delayed by the delay unit 403 to match the timing with the noise detection signal.

Next, based on the noise detection signal output from the noise detector 402, the noise output from the delay
Remove with 4. For example, when the noise detection signal is at a high level, smoothing is performed with a two-dimensional filter to remove ringing,
At the low level, the input expanded image signal is delayed and output by the same time as the two-dimensional filter. If the two-dimensional filter is filtered by 3 pixels in the horizontal direction and 3 pixels in the vertical direction, it is necessary to delay the input expanded image signal by 2 pixels in the vertical direction. Image memory 407 is required. The noise remover 404 writes an image signal to the image memory 407 using a write enable and a write address as necessary, and reads the image signal using a read address. Thus, the noise remover 404 outputs an expanded image signal from which ringing noise has been removed.

[0008]

However, the above conventional configuration has the following two problems. 1
The third problem is that, for example, when the noise is detected in units of one block as described above, the noise detector 402
An image memory 40 having a storage capacity of 52 × 8 pixels in the vertical direction (22,528 bits when one pixel is 8-bit quantized)
6 requires a very large circuit scale. Similarly, the second problem is that the noise removal filter 404 is an image memory 4 having a storage capacity of 352 pixels in the horizontal direction × 2 pixels in the vertical direction (5632 bits when one pixel has 8 bits).
07, which is a very large circuit scale. In order to implement the conventional noise eliminator as described above, a large-scale image memory is required regardless of the first problem or the second problem, so that the circuit scale becomes very large. As a result, costs were increased.

An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a noise eliminator capable of reducing the circuit size by reducing the required capacity of an image memory and easily realizing it. I do.

[0010]

In order to achieve this object, the present invention relates to a method of reading noise state data obtained for each block of image signal when the image decoder reads and writes the image signal from and to an image memory. The noise detector performs writing and reading to and from the state memory at the same address as the write address and the read address to be used.

As a result, the required capacity of the image memory can be reduced, so that a small and simple noise elimination device can be provided.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A first aspect of the present invention is an image decoder for expanding and decoding an input compressed image signal, writing image data with a write enable and a write address output from the image decoder, and writing the image data with a read address. A first image memory for reading image data, a noise detector for detecting noise of image data to be written to the first image memory,
The memory includes a write enable output from the noise detector and a state memory for writing noise state data by a write address and reading the noise state data by a read address.

As a result, the following effects are obtained. As described above, for example, an image decoder that expands and decodes a compressed image signal obtained by compressing an original image with a minimum image unit of one block,
Finally, the image signal for one frame is written to the first image memory in units of one block, read out, and the expanded image signal is output. Therefore, at the time of writing to the first image memory, the pixels for one block are arranged at one time, and the noise is detected using this. As a result, the 1-bit noise state data obtained for one block of the image signal is written to the state memory by the image decoder at the same write address as the write address at which the image signal is written to the first image memory. If the noise detector reads the signal from the state memory at the same read address as the read address for reading the signal from the first image memory, the timing of the decompressed image signal output by the image decoder and the timing of the noise detection signal output by the noise detector match. The noise can be removed as it is with the noise remover, and the delay unit is not required. Further, the storage capacity of the state memory is one bit per block and one frame (352/8 = 44 blocks in the horizontal direction, 240/8 in the vertical direction).
= 30 blocks in total, ie, 1320 blocks), so that only a storage capacity of 1320 bits is sufficient.
The effect is that the memory size can be reduced to about 1/17 of that of 528 bits.

According to a second aspect of the present invention, there is provided an image decoder for expanding and decoding an input compressed image signal and outputting a write request to an image memory based on a write arbitration signal output from an image memory controller, and an image decoder for the image decoder. Arbitrates between the write request output by the image decoder and the write request output by the noise remover, and writes one of the write enable, write address, image data, image data, write enable, write address, and image data output by the image remover. An image memory controller that selectively outputs an enable, a write address, and image data, and outputs a write arbitration signal indicating which one to select; an image memory controller that writes image data by a write enable and a write address output by the image memory controller; The image memory that reads out image data and the image decoder Detector for detecting noise in image data to be output, a delay unit for delaying image data output from the image decoder for a predetermined time, and noise in an image signal output from the delay unit based on a noise detection signal output from the noise detector. And a noise remover for outputting a write request to the image memory based on a write arbitration signal output from the image memory controller.

As a result, the following effects are obtained. The image decoder writes an image signal for one frame to the first image memory in block units, reads out the image signal, and outputs an expanded image signal. If there is enough time between writing and reading the image signal by the image decoder, the noise detector detects the noise of the written block during that time, and if it is judged that there is noise, the image signal of the block is detected as noise. The delay is delayed by the delay unit for the time required to detect the noise by the detector, the noise is removed by the noise remover, and the image is again written to the image memory at the same write address. Therefore, the image signal on the image memory has been denoised, and the image decoder finally reads and outputs the image signal. The writing to the image memory is switched by arbitrating the writing requests of the image decoder and the noise eliminator by the image memory controller. Therefore, neither the noise detector nor the noise eliminator requires an image memory, and the increasing components are only the delay unit and the image memory controller, and their circuit scale is sufficiently small, so that the overall circuit scale is very small. It is the effect of becoming.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. (Embodiment 1) Hereinafter, Embodiment 1 of the present invention will be described as a noise elimination device according to the first invention with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a noise elimination device according to Embodiment 1 of the present invention. However, the same components as those of the conventional noise elimination device shown in FIG. 4 are denoted by the same reference numerals, and the description of the operation is omitted.

For example, an image decoder 40 for expanding and decoding a compressed image signal obtained by compressing an original image with a minimum image unit of one block.
1 finally writes an image signal for one frame into the first image memory 405 in block units, reads out the image signal, and outputs an expanded image signal. Therefore, the first image memory 40
Since the pixels for one block are arranged at a time at the time of writing to 5, the noise detector 101 detects noise for the pixels for the one block. As a result, the image decoder 401 writes the 1-bit noise state data obtained for one block of the image signal to the state memory 102 at the same write address as the write address at which the image signal is written to the first image memory 405, and performs image decoding. If the noise detector 101 reads from the state memory 102 at the same read address as the read address from which the image signal is read from the first image memory 405 by the decoder 401, the decompressed image signal output from the image decoder 401 and the noise detector 101 The timing of the noise detection signal to be output can be matched, and the noise can be removed as it is by the noise removal filter 404 as a noise remover.

The storage capacity of the state memory 102 is one bit per block and one frame (352/8 in the horizontal direction).
44 blocks and 240/8 = 30 blocks in the vertical direction, for a total of 1320 blocks), so that a storage capacity of 1320 bits is sufficient.

(Embodiment 2) Hereinafter, Embodiment 2 of the present invention will be described with reference to the drawings as a noise elimination device according to the second invention.

FIG. 2 is a block diagram showing a configuration of the noise elimination device according to the second embodiment of the present invention. However, the same components as those of the conventional noise elimination device shown in FIG. 4 are denoted by the same reference numerals, and the description of the operation is omitted.

For example, the image decoder 201 writes an image signal for one frame into the image memory 405 in block units, reads out the image signal, and outputs an expanded image signal. Image decoder 2
01 has a sufficient time from the writing of the image signal to the reading of the image signal, the noise detector 202 detects the noise of the written block during that time, and if it is judged that there is noise, the image signal of the block is detected by the noise detector. The signal is delayed by the delay unit 203 for the time required for detecting the noise at 202, the noise is removed by the noise removal filter 204 as a noise remover, and the image is rewritten into the image memory 405 at the same write address.

Accordingly, the image signal on the image memory 405 has been denoised, and the image signal is finally read out by the image decoder 201 and output. For writing to the image memory 405, the image memory controller 205 arbitrates and switches the respective write requests of the image decoder 201 and the noise removal filter 204.

The image decoder 201 first issues an image write request to the image memory controller 205, the noise removal filter 204 has not issued a write request, and the image signal must be read from the image memory 405 with the same read address. For example, a write request from the image decoder 201 is accepted, and an image signal is written to the image memory 405 by a write enable and a write address. Noise removal filter 204
The same applies to the write request. Image decoder 20
1 and the write request of the noise elimination filter 204 overlap, the write request of the image decoder 201 is prioritized, and then the image signal of the noise elimination filter 204 is written. However, if the image decoder 201 has already received the write request of the noise removal filter 204 and is writing when the image decoder 201 issues the write request, the write arbitration signal is output to the image decoder 201.
Receives and issues a write request again. Of course, such a write arbitration algorithm should be optimized by parameters such as the access speed of the image memory.

(Embodiment 3) Hereinafter, Embodiment 3 of the present invention will be described as a noise elimination device according to the second invention with reference to the drawings.

FIG. 3 is a block diagram showing a configuration of the noise elimination device according to the third embodiment of the present invention. However, the same components as those of the conventional noise elimination device shown in FIG. 4 and the noise elimination device according to the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and the description of the operation is omitted.

In this embodiment, the time from when the image decoder 301 writes an image signal of a certain block to the image memory 405 to when the next image signal is written is relatively short. The write request of the image decoder 301 and the write request of the noise elimination filter 302 as the noise eliminator have priority over that of the image decoder 301. However, if the image decoder 301 issues a write request one after another, the noise elimination filter 302 The image signal from which the noise has been removed is stored in an image memory 405.
In this case, a separate image memory for storing the image signal from which noise has been removed is required.

Therefore, a memory read request is issued to the image memory controller 303 during a period when the number of times the image decoder 301 writes the image signal is small, and if the image decoder 301 has not read the image signal, the noise detector 101 sets the state memory 1
An image signal is read from the image memory 405 at the same read address as the read address from which the noise state data is read out from 02. If the image decoder 301 is reading, the image memory controller 303 outputs a read arbitration signal, so that a memory read request is issued again. The noise of the read image signal is removed based on the output of the noise detector 101, a memory write request is issued, and the image write is written to the image memory 405. Thus, the image signal on the image memory 405 has been subjected to noise removal, and the image decoder 301 reads out the image signal and outputs it as an expanded image signal.

As compared with the second embodiment shown in FIG.
Although the state memory 102 increases and the circuit scale generally increases instead of eliminating 03, the time margin for writing the image signal to the image memory 405 increases, and the degree of freedom of the method of implementing the noise elimination device increases.

[0030]

As described above, according to the first invention, when the image decoder writes to the first image memory, the pixels for one block are temporarily aligned, so that the noise is detected using this. I do. As a result, the 1-bit noise state data obtained for one block of the image signal is written to the state memory by the image decoder at the same write address as the write address at which the image signal is written to the first image memory. If the noise detector reads the signal from the state memory at the same read address as the read address for reading the signal from the first image memory, the timing of the decompressed image signal output by the image decoder and the timing of the noise detection signal output by the noise detector match. The noise can be removed as it is by the noise remover, and the delay device is not required. Further, the storage capacity of the state memory is sufficiently small as compared with the second image memory.

According to a second aspect of the present invention, if there is a sufficient time from the writing of the image signal to the reading of the image signal by the image decoder,
During that time, the noise detector detects the noise of the block written, and if it is determined that there is noise, the image signal of that block is delayed by the delay unit for the time required for detecting the noise with the noise detector, and the noise remover Then, noise is removed and the image is written again to the image memory at the same write address. Therefore, the image signal on the image memory has been denoised, and the image decoder finally reads and outputs the image signal. Therefore, neither the noise detector nor the noise remover requires image memory,
The components to be increased are only the delay unit and the image memory controller, and their circuit scales are sufficiently small, so that the overall circuit scale is very small.

As described above, according to the first and second aspects of the present invention, the circuit scale when implementing the noise elimination device can be made very small, so that the cost can be greatly reduced and the industrial value is extremely large. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a noise elimination device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a noise elimination device according to the second embodiment;

FIG. 3 is a block diagram showing a configuration of a noise elimination device according to the third embodiment;

FIG. 4 is a block diagram showing a configuration of a conventional noise elimination device.

FIG. 5 is a diagram showing an example of an original image input format when compressing and encoding an image signal.

[Description of Code] 101, 202 Noise Detector 102 State Memory 201, 301, 401 Image Decoder 203 Delayer 205, 303 Image Memory Controller 204, 302, 404 Noise Removal Filter 405 Image Memory

Claims (3)

[Claims] 1. An image decoder for decompressing and decoding an input compressed image signal, a first image memory for writing image data by a write enable and a write address output from the image decoder, and reading image data by a read address. A noise detector for detecting noise of image data written to the first image memory; a state of writing noise state data by a write enable and a write address output by the noise detector; and a state of reading noise state data by a read address. A memory, a noise remover that removes noise of the decompressed image signal output from the image decoder based on a noise detection signal output from the noise detector, and a write enable and a write address output from the noise remover. And read the image data by the read address. Noise removal device that includes a memory. 2. An image decoder for expanding and decoding an input compressed image signal and outputting a write request to an image memory based on a write arbitration signal output from an image memory controller, and a write request output from the image decoder. And a write request output from the noise eliminator, and one of the write enable, write address, and image data output from the image decoder and the write enable, write address, and image data output from the noise eliminator are written. The image memory controller that selectively outputs an enable, a write address, and image data, and outputs a write arbitration signal indicating which one to select, the image data is output by the write enable and the write address output by the image memory controller. An image memory for reading image data by writing and reading addresses; A noise detector that detects noise of image data output by the image decoder; a delay unit that delays image data output by the image decoder for a predetermined time; and a noise detection signal output by the noise detector. A noise eliminator comprising: a noise eliminator for eliminating noise of an image signal output from the delay unit and outputting a write request to an image memory based on a write arbitration signal output from an image memory controller. 3. An image decoder that decompresses and decodes an input compressed image signal and outputs a write request and a read request to an image memory based on a write arbitration signal and a read arbitration signal output by an image memory controller. The write request output from the decoder and the write request output from the noise remover are arbitrated, and the write enable, write address and image data output from the image decoder and the write enable, write address and image output from the noise remover are arbitrated. From the data, one of the write enable, the write address and the image data is selectively output, a write arbitration signal indicating which one is selected is output, and the read request output from the image decoder and the noise remover are output. A read request is arbitrated and the read address output from the image decoder and the noise are read. The image memory controller that selectively outputs one of the read addresses from the read addresses output by the remover, and outputs a read arbitration signal indicating which one to select, a write enable and a write output by the image memory controller An image memory that writes image data by an address and reads image data by a read address; a noise detector that detects noise of the image data output by the image decoder; a write enable and a write address output by the noise detector A state memory for writing noise state data by reading a noise state data by a read address, and a noise detection signal output from the noise detector, removing noise of an image signal output from the image memory, Output arbitration signal and read arbitration signal Noise removal device that includes a noise remover for outputting a write request and a read request to the image memory.