JPH1093180A - Gate type optical switch control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a gate type optical switch control circuit, which enables prevention of missing of data without which cause deterioration in the S/N ratio. SOLUTION: An optical gate switch control signal generating circuit 11 is synchronized with a clock from a clock source 14 and outputs a control signal of an SOG 2 for performing transmission cut-off of a light signal. An expanding circuit 12 carries out pre-equalization by expanding the SOG control signal backward only by a time, corresponding to the rise delay time of the SOG 2. The opening operation of the SOG is expanded by the control signal, thus preventing constriction. Also, by coping with the delay of the light signal, missing of data at the leading portion is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor waveguide type gate optical switch (SOG) control circuit using a semiconductor optical amplifier.

[0002]

2. Description of the Related Art In recent years, studies have been made on optical switches used for switching optical signal paths in various places.
Above all, SOG is expected as a high-speed switching element because it can respond at a high speed of about 1 nsec. However, it is known that the SOG has a problem of a rise delay when the SOG is opened or a narrowing of a gate opening time due to an oscillation delay phenomenon of the element itself. For example, Kato et al., IEICE General Conference, 19
Spring 1996, National Conference Proceedings, B-1106, "2 × 2
High-speed and low crosstalk switching characteristics of gated optical switches ".

[0003] As a control circuit for controlling the SOG,
Conventionally, the circuit of FIG. 4 has been proposed. This control circuit 1
In A, a logic level signal is output from the SOG control signal generation circuit 11 based on a clock signal from a reference clock source 14 synchronized with the signal light incident from the optical signal path 3, and this signal is converted into a voltage current By converting the current by the conversion circuit 13 and inputting the converted signal to the SOG 2, the SOG can be opened and closed in synchronization with the incident signal light, and the passing signal light can be emitted from the SOG.

However, in this SOG control circuit 1A, as shown in the operation timing diagram of FIG.
When the SOG control signal 100 shown in FIG. 5A is input to the SOG from the control circuit 11, the open / close state 10 shown in FIG.
As in 2 ', there is a problem that the opening operation is delayed by τ in SOG2 and the opening time T1 is shorter by τ than the gate time T of the SOG control signal 100. This is because initially, when the optical gate of the SOG is closed, the injection current to the SOG is cut off, and electrons at the excited level inside the semiconductor are in a deficient state. When the current injection into the SOG is started, the optical gate transits to an open state after a delay by the time required for filling the excitation level with electrons, and the optical signal can pass. τ occurs. The actual value of this rise delay is
According to the literature, it is of the order of a few nsec. On the other hand, S
After the injection current to the OG is cut off, the electrons at the excitation level are consumed in the state where the optical signal is input, so that the optical gate quickly transitions to the closed state. Therefore, as a result of such a series of processes in SOG, rise delay and narrowing of the optical gate open time occur. Due to this rise delay and narrowing, when performing high-speed optical switching, FIG.
As in the case of the optical signal 105 in (c), a missing portion of a rising portion of data to be passed through the SOG occurs.

As a solution to such a data loss, a delay circuit with a delay τ is inserted on the SOG incident side of an optical signal to
By delaying the G incident signal by τ, the above-mentioned lack of the rising portion of the data can be prevented. However,
In this case, since only the entire optical signal is delayed, the optical signal 106 shown in FIG.
, The trailing end of the data is lost.

On the other hand, there has been proposed a technique in which a minute bias current is constantly applied in addition to a gate control current. FIG. 6 shows an SOG control circuit 1B for adding a steady-state bias current, and has a configuration in which a steady-state bias adjustment circuit 17 and an addition circuit 18 are added to the control circuit of FIG.
The bias current output from the steady-state bias adjustment circuit 17 is added to the SOG control signal from the SOG control signal generation circuit 11 in the addition circuit 18 and input to SOG2. In this case, the bias current to be added is set to a small current value at which SOG2 is approximately determined to be in the closed state.
By the addition of this steady bias current, electrons are always supplied to the excitation level inside the semiconductor, and the rise delay of the optical gate and the narrowing of the open time are prevented.

[0007]

However, in the measures to prevent the rise delay and the narrowing of the open time due to the steady bias current injection, the quenching characteristic when the SOG is closed is deteriorated by the supply of electrons inside the semiconductor. That means
There is a problem that S / N deterioration of the SOG passing optical signal is caused. Incidentally, when the steady-state bias adding circuit is used, the extinction characteristic may be degraded to about 20 dB, and such an extinction characteristic may cause a significant S / N degradation in an optical switch network requiring SOG. Have been reported. 199, IEICE 199
6 Spring National Convention Preprints B-1106. Further, since the added bias current adding circuit is required to maintain a high switching speed, the cost of the adding circuit is increased, and the bias current to be added is increased by the required extinction characteristic and stricture compensation accuracy. Since fine-tuning is required,
The adjustment work becomes complicated.

An object of the present invention is to provide a gate type optical switch control circuit which can prevent data loss without causing such S / N deterioration.

[0009]

The SOG control circuit of the present invention is characterized in that it comprises means for extending a control signal for opening and closing the SOG for a time corresponding to a rise delay generated in the SOG. That is, the SOG control circuit generates a SOG open / close control signal based on a reference signal synchronized with the optical signal, and sets a logical level corresponding to the open state of the SOG open / close control signal output from the logical circuit to a time. The circuit comprises a circuit for expanding the current, and a voltage-current conversion circuit for outputting a control signal from the expanding circuit as an SOG switching operation signal. In this case, the expansion circuit for the SOG control signal includes a unit that branches the input control signal into two, a delay unit that delays one of the branched control signals,
Means for calculating the logical sum of the delayed control signal and the other control signal which is not delayed. Also,
Here, the delay time of the delay means is set as a time corresponding to the oscillation delay time of the SOG. In constructing an optical switch circuit according to the present invention, a delay means for delaying an optical signal by a time corresponding to a delay occurring in the SOG is provided at a stage preceding the SOG of the optical signal path.

[0010]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of an embodiment of the present invention. This SGO control circuit 1
A G control signal generation circuit 11, a control signal expansion circuit 12,
A voltage / current conversion circuit 13 is provided, and the output of the voltage / current conversion circuit is input to SOG2 to control the opening and closing of SOG2. In the optical signal path 3 opened and closed by the SOG 2, a delay circuit 4 is provided on the incident side of the SOG 2, and an optical signal incident on the SOG 2 is converted into a delay time τ described later.
Only the delay.

The SOG control signal generation circuit 11 is a SOG
This is a circuit that outputs an SOG control signal corresponding to blocking of transmission of an optical signal at a logical level in synchronization with a clock output from a clock source 14 serving as a reference for the control. The control signal expansion circuit 12 responds to the SOG control signal output from the SOG control signal generation circuit 11 by a time corresponding to the rise delay time τ of SOG2 and a time behind the logic level holding time corresponding to the SOG open state. This circuit performs pre-equalization by decompression and outputs the result. For example, as shown in FIG. 2, the control signal expansion circuit 12 is configured to include a delay circuit 15 having a time constant τ and a two-input OR gate 16. Then, the input SOG control signal is branched into two paths, one of which is given a delay corresponding to the oscillation delay τ of the SOG by the delay circuit 15, and the logical sum of the other is obtained by the OR gate 16 with the other. The expansion of the SOG control signal is realized. Further, the voltage-current conversion circuit 13
Is a circuit that controls the injection of current into SOG2 in response to the SOG control signal input at a logical level. S
The OG 2 is composed of a semiconductor optical waveguide type optical amplifier element, and is opened and closed in accordance with ON / OFF of the injection current from the voltage-current conversion circuit 13, and controls the passage and cutoff of the passing signal light with respect to the incident signal light of the optical signal path 4. Do.

The operation of the SOG control circuit having the above configuration is shown in FIG.
This will be described with reference to the time chart of FIG. As shown in FIG. 3A, the control signal 100 output from the SOG control signal generation circuit 11 is input to the control signal expansion circuit 12 within the width of the original gate time T. In the control signal expansion circuit 12, the input SOG control signal 100 is branched into two, one of which is delayed by the delay time τ in the delay circuit 15 and the other is input to the OR gate 16 as it is.
As a result, as shown in FIG. 4B, the SOG control signal 101 is extended in a state where the level corresponding to the opening operation of the SOG is extended by the time τ corresponding to the rising delay in SOG2.
Is generated. Based on this SOG control signal 101,
An ON signal for causing the SOG 2 to open is input from the voltage-current conversion circuit 13.

In the SOG2, a rise delay τ occurs at the time of transition to the open state, as in the opening / closing operation state 102 in FIG. However, due to the above-described expansion of the SOG control signal 101,
The original gate time T is secured for the open time of the SOG, and thereafter the SOG is returned from the open state to the closed state by the OFF signal of the SOG control signal 101. This avoids narrowing of the signal transit time for the optical signal. On the other hand, the optical signal 103 shown in FIG.
As shown in FIG. 3E, the signal 104 is input to SOG2 as a signal 104 delayed by τ. Therefore, the rising portion of the optical signal is passed through the SOG even due to the delay of the closing operation of SOG2, and the data loss at the rising portion is prevented. Further, although the entire optical signal is delayed by τ, the timing of the closing operation of the SOG is also delayed by the above-described extension, and the gate time T is secured.
There is no loss of data at the end.

Incidentally, in the configuration of the SOG control circuit,
When the SOG is closed, the injection current to the SOG can be completely cut off, so that the extremely high quenching characteristic inherent to the SOG (for example, 50 dB or more) can be realized. Further, since the decompression circuit of the present invention can be realized by a simple circuit composed of, for example, several parts illustrated in FIG. 2, the increase in cost due to the addition of the decompression circuit can be suppressed very small. is there. At the same time, since an analog circuit is not used, it is possible to further reduce costs and simplify adjustment.

[0015]

As described above, the present invention is provided with the means for extending the control signal for opening and closing the SOG by the time corresponding to the rise delay generated in the SOG, so that the rise of the SOG is delayed. Even in this case, the narrowing of the optical signal can be prevented, and the loss of data at the rising portion and the terminal portion of the optical signal can be prevented. In addition, since a circuit for preventing the loss can be formed by an extremely simple circuit, cost reduction and easy adjustment can be realized. Further, since no steady-state bias current is applied, electrons in the excited state can be almost completely eliminated, and the extinction characteristics during the closing operation of the SOG can be improved.

[Brief description of the drawings]

FIG. 1 is a drawing showing a configuration of the present invention.

FIG. 2 is a diagram for explaining the operation of the present invention.

FIG. 3 is a diagram illustrating a configuration example of an SOG control signal expansion circuit.

FIG. 4 is a diagram showing a basic configuration of a conventional gate type optical switch control circuit.

FIG. 5 is a diagram showing a conventional configuration.

FIG. 6 is a diagram illustrating an operation according to a conventional basic configuration.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 optical gate switch (SOG) control circuit 2 SOG element 3 optical signal path 4 delay circuit 11 SOG control signal generation circuit 12 SOG control signal expansion circuit 13 voltage-current conversion circuit 14 reference clock source 15 delay circuit 16 OR gate 17 steady bias Adjustment circuit 18 Addition circuit 100 SOG control signal before decompression processing 101 SOG control signal after decompression processing 102 SOG open / close state 104 Optical signal 103 Optical signal input to SOG

Claims (5)

[Claims] 1. A semiconductor waveguide type optical gate switch (SOG) provided in an optical signal path for selectively emitting an optical signal incident by an opening / closing operation thereof, and an opening / closing control signal for opening / closing the SOG. And a SOG control circuit for generating the SOG control signal, wherein the SOG control circuit includes means for extending the opening / closing control signal for a time corresponding to a rise delay generated in the SOG. 2. An SOG control circuit, comprising: a logic circuit for generating an SOG opening / closing control signal based on a reference signal synchronized with an optical signal; and a logic corresponding to an open state of the SOG opening / closing control signal output from the logic circuit. 2. The gate type optical switch control circuit according to claim 1, comprising a circuit for extending the level with time, and a voltage / current conversion circuit for outputting a control signal from the extension circuit as an SOG switching operation signal. 3. The control signal decompression circuit includes: a means for branching an input control signal into two; a delay means for delaying one of the branched control signals; 3. The gate type optical switch control circuit according to claim 2, comprising means for taking a logical sum of the control signals which are not delayed. 4. The gate type optical switch control circuit according to claim 3, wherein the delay time in the expansion circuit is a time corresponding to the oscillation delay time of the SOG. 5. An SOG upstream of the SOG in the optical signal path.
5. The gate type optical switch control circuit according to claim 1, further comprising delay means for delaying the optical signal by a time corresponding to the delay occurring in the control.