JPH1092745A - Method and device for manufacturing crystal semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the generation of unevenness on the surface of a polycrystal silicon film, caused by the existence of a native oxide, and enable satisfactory formation of an element by removing a native oxide on the surface of an amorphous semiconductor film formed on a substrate, and at the same time, irradiating the surface of the semiconductor with an energy beam. SOLUTION: After a silicon oxide film as an undercoat layer 2 is formed on an insulating substrate 1, an amorphous silicon film 3 is formed on the silicon oxide film. Then, heat annealing is carried out on the amorphous silicon film, thus dehydrogenating the film. Thus, a native oxide 4 is formed on a polycrystal silicon film surface 31. Then, the natural oxide film 4 on the surface is removed by etching in a dry etching chamber, and the substrate on which etching is completed in a vacuum is transported into a laser annealing chamber, via a transfer chamber maintained in a vacuum. The amorphous silicon surface 31 is irradiated with a laser beam, thus forming a polycrystal silicon film 32 on the entire surface of the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method and an apparatus for manufacturing a crystalline semiconductor.

[0002]

2. Description of the Related Art In recent years, polycrystalline silicon thin film transistors (hereinafter polycrystalline silicon TFTs) have attracted attention as a technique for realizing high density, compactness, and low cost of input / output devices such as color liquid crystal displays. . When a liquid crystal display is formed using polycrystalline silicon TFTs, in addition to the TFTs for pixel switching, high-speed operation is possible, so that TFTs are also used for the driving circuit, and the driving circuit can be integrally formed, and the driving IC There is an advantage that the connection is unnecessary.

In application to a liquid crystal display, a technique for forming a polycrystalline silicon film by a low-temperature process that causes less substrate damage is required in order to form a polycrystalline silicon TFT on a substrate made of non-alkali glass or the like. Therefore, a method of forming a polycrystalline silicon film by crystallizing an amorphous silicon film by laser annealing is often used. TF using a polycrystalline silicon film formed by this method as a channel
It is known that T has a higher mobility than a TFT using a polycrystalline silicon film formed by a solid phase growth method or PECVD.

FIG. 5 shows a conventional method of manufacturing a polycrystalline silicon thin film. First, an undercoat film 2 is formed on a glass substrate 1.
Is formed, the amorphous silicon film 3 is formed at a low temperature of 300 ° C. or lower. Since this amorphous silicon film 3 contains a large amount of hydrogen, if laser annealing for crystallization is performed, a film ablation occurs with the release of a large amount of hydrogen (FIG. 5A).

[0005] Next, before laser annealing for crystallization, thermal annealing for hydrogen desorption is performed. When thermal annealing 450C and 1h are performed, 10
A native oxide film 4 of about A is formed. Here, reference numeral 31 denotes an amorphous silicon film which has been dehydrogenated and has a hydrogen concentration of 5.times.10@20 / cm @ 3 (FIG. 5B).

Next, the amorphous silicon film is laser-annealed to instantaneously melt and crystallize Si (FIG. 5 (c)).
Finally, the native oxide film 4 is removed by etching to complete the polycrystalline silicon film formed on the glass substrate (FIG. 5D).
).

As described above, when the amorphous silicon film is exposed to the air after being formed or subjected to thermal annealing, a natural oxide film (having a maximum thickness of 15 nm) is formed on the surface of the amorphous silicon film.
A) is formed. Conventionally, since the surface natural oxide film has not been removed before laser annealing, oxygen atoms and impurity atoms are partially aggregated when solidifying after Si is melted, and the resulting polycrystalline silicon film surface Then, irregularities of 10 to 30 nm or more were generated with respect to the polycrystalline silicon film thickness of 50 nm. RM obtained by measuring this surface roughness using AFM
FIG. 3 shows S values (mean square roughness). In the case of manufacturing a TFT using an active layer of a polycrystalline silicon film having irregularities generated by the influence of such a surface natural oxide film, especially when manufacturing a TFT having a structure in which the surface side of the polycrystalline silicon film serves as a channel, a gate is formed. SiOx / poly
Due to the 10-30 nm protrusion present at the Si interface,
There is a problem that the gate withstand voltage of the TFT is deteriorated.

[0008]

In a conventional manufacturing method, when an amorphous silicon film is crystallized by laser annealing, if an amorphous silicon film having a natural oxide film on the surface of the film is used, oxygen atoms are removed. RMS value of AFM measurement value is 10 on the surface of polycrystalline silicon film obtained by aggregation of impurities on the surface and
Since irregularities of about 30 nm are generated, inconvenience occurs in the formation of the element.
Forming T causes a problem that the dielectric breakdown characteristics are deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it is possible to eliminate the occurrence of irregularities on the surface of a polycrystalline silicon film caused by the presence of a natural oxide film and to form a favorable device. It is an object of the present invention to provide a manufacturing method and a manufacturing apparatus for a high-quality crystalline semiconductor to be manufactured.

[0010]

To achieve the above object, according to the present invention, there is provided a method for forming an amorphous semiconductor film on a substrate and removing a natural oxide film on the surface of the amorphous semiconductor film. And irradiating the semiconductor surface with an energy beam in a state where the natural oxide film is removed from the surface of the semiconductor film. Here, the substrate may be a semiconductor substrate such as silicon in addition to an insulating substrate such as glass or ceramics, or a substrate such as a silicon oxide film or a silicon nitride film formed on this semiconductor substrate. It may be. Further, a substrate in which an insulating film of silicon oxide, silicon nitride, or the like is formed over a metal substrate may be used. Further, the semiconductor is not limited to silicon, and may be another group IV semiconductor such as Ge, C, or the like.
A compound semiconductor such as GaAs or SiGe may be used. Further, the energy beam may be an electron beam other than the laser beam.

According to a second aspect of the present invention, there is provided a first method for accommodating a substrate to be processed and forming an amorphous semiconductor film on the substrate to be processed.
A chamber, dry etching means for removing a native oxide film on the surface of the amorphous semiconductor, means for irradiating the surface of the amorphous semiconductor film with an energy beam, and A second chamber capable of irradiating the surface of the semiconductor film with the energy beam;
And a vacuum system for connecting the second chamber to the second chamber.

Further, the invention of claim 3 is the invention according to claim 2, wherein the degree of vacuum of the first chamber, the second chamber, and the vacuum system is 1 × 10 −2 Pa or less. An object of the present invention is to provide a crystal semiconductor manufacturing apparatus characterized by the following.

In particular, in the first aspect, the amorphous silicon film has a substrate temperature of 270 ° C. by a plasma CVD method.
And a hydrogen concentration of 2 at. % Or more,
By performing heat treatment before laser annealing, even if the laser energy density during crystallization is increased, film ablation does not occur, and the crystal grain size of polycrystalline silicon can be increased. Mobility can be improved.

Particularly, in the first aspect of the present invention, by using anhydrous HF / CH 3 OH vapor cleaning for the dry etching mechanism, residual impurities such as particles, carbon and oxygen on the surface can be reduced. The mobility and S-factor of the polycrystalline silicon TFT can be improved without mixing them in the crystalline silicon film.

More particularly, in the first aspect of the present invention, since the silicon surface can be terminated with hydrogen by using the natural oxide film removing function by the ultraviolet light excited F2 gas for the dry etching mechanism, the surface contamination is reduced. The characteristics can be improved.

[0016]

DETAILED DESCRIPTION OF THE INVENTION In the present invention, after removing a natural oxide film on the surface of an amorphous semiconductor film, preferably by dry etching, the semiconductor film is not exposed to the air during removal and irradiation with an energy beam, preferably laser annealing. And forming an amorphous semiconductor film having no surface oxide film under vacuum, preferably 1 × 10 -2 P
The main point is to provide a manufacturing method and a manufacturing apparatus characterized in that energy beam animating is performed in a vacuum of a or less to grow a crystalline semiconductor such as a polycrystalline semiconductor or a microcrystalline semiconductor. The performance of active elements such as TFTs and diodes formed by such a manufacturing method or manufacturing apparatus can be improved.

In the following, a preferred embodiment will be described. In the manufacturing method of the present invention, a natural oxide film is removed before laser annealing, and is not exposed to the air from the oxide film removing step to the annealing step. The polycrystalline silicon film can be crystallized by laser annealing while maintaining the state.
As a result, a polycrystalline silicon film in which surface irregularities due to agglomeration of oxygen atoms and surface impurities (carbon, boron, and the like) are suppressed to 10 nm or less can be obtained. High) high mobility polycrystalline silicon TFTs can be provided.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments. (Embodiment 1) FIG. 1 shows a manufacturing apparatus of the present invention. As shown in FIG. 1, a loading chamber 100, a dry etching chamber 101 for an oxide film, a transfer chamber 102, and a laser annealing chamber 103 for crystallizing an amorphous silicon film are provided.
It has a structure in which a vacuum pump is connected to each chamber. The vacuum pump is connected to a turbo pump 104 and a rotary oil pump 105 for drawing back pressure. This allows each chamber to be 1 × 10-2
The vacuum is maintained at Pa or less. If the degree of vacuum is higher than 1 × 10 −2 Pa, it takes up to 30 minutes to complete the laser annealing after removing the natural oxide film, so that a natural oxide film of several A is formed during that time.

In the dry etching method, anhydrous HF / CH
A 3OH vapor cleaning method can be used.
This supplies 106 nitrogen gas as a carrier,
By flowing a mixed vapor of HF and CH3 OH as an etching gas and a CH3 OH vapor into the etching chamber, a natural oxide film (SiO
x film). Activated species H in chamber
F2- is produced and reacts with SiOx to form SiF4 as S
iOx can be etched. By the etching reaction,
Although H2 O is generated, H2 O has a good affinity for alcohol, so that it can be exhausted together with excess alcohol vapor. Furthermore, the amount of carbon contamination remaining on the amorphous silicon surface after the etching process can be reduced. The flow rate of the nitrogen gas is controlled using the mass flow controller 107. HF / CH3 OH and CH3 OH gas
CH3OH108 and CH3OH109 solutions are used. The concentration ratio of the vapor is equal to the concentration ratio of the solution,
38.5 wt% of HF and 61.5 wt% of CH3 OH are used, respectively. The etching rate is determined by the nitrogen flow rate and CH
Controlled by 3OH concentration. If the flow rate of nitrogen is increased, the HF concentration is increased, so that the etching rate is increased. As the optimum conditions for etching the natural oxide film, the nitrogen flow rate is 1 SLM on the HF / CH3 OH side and CH3 O
H side 9 SLM was set. The etching rate of silicon oxide on the surface of the amorphous silicon was 1.5 nm / min.

As described above, in the HF / CH 3 OH vapor etching, SiOx can be etched by a dry process, including a surface cleaning effect. The degree of vacuum in the laser annealing chamber 103 is set to 1 × 10 −2 Pa or less.
The degree of vacuum is set to 1 × 10 −2 Pa or less in order to prevent impurities (for example, carbon and oxygen) from being mixed at the time of laser annealing melting due to formation of a natural oxide film before laser annealing. As the laser 110, a laser beam such as XeCl or ArF is used. The laser beam is projected on the amorphous silicon surface via a beam homogenizer 111 called a fly-eye lens and a condenser lens 112. The substrate can be moved using the XY stage 113, and the entire surface of the substrate can be irradiated with laser light.

By using the manufacturing apparatus of the present invention, the surface of the amorphous silicon film is not exposed to the atmosphere until it is crystallized by laser annealing in the oxide film removing step and the next step. Therefore, there is an advantage that the amorphous silicon film can be laser-crystallized with the natural oxide film removed.

FIG. 2 shows a manufacturing method of the present invention when the manufacturing apparatus of FIG. 1 is used. First, after a silicon oxide film is formed as an undercoat film 2 on an insulating substrate 1 made of non-alkali glass, quartz, or the like, an amorphous silicon film 3 is formed on the silicon oxide film. The silicon oxide film and the amorphous silicon film 3 are deposited by a CVD method such as plasma CVD and low pressure CVD. The amorphous silicon film 3 is made of S
A film was formed at a substrate temperature of 270 C using iH4 and H2 gases. The film thickness is set in the range of 50 to 100 nm. When the film is formed at such a low temperature, a glass substrate can be used as a substrate, which leads to cost reduction. However, as described above, the amorphous silicon film formed at a low temperature has several at. % Or more, hydrogen ablation occurs if laser annealing is performed as it is, so that a polycrystalline silicon film having good crystallinity cannot be obtained (FIG. 2A).

Then, after the formation of the amorphous silicon film, 450
It is desirable to perform thermal annealing of C and 1h to desorb hydrogen in the film. Due to this thermal annealing, a natural oxide film 4 of about 5 to 15 A is formed on the surface 31 of the polycrystalline silicon film. It is not necessary to perform this thermal annealing.
By exposing the amorphous silicon film 3 to the atmosphere after D, a native oxide film 4 is similarly formed (FIG. 2B).

Next, after the completion of the CVD or the thermal annealing, the substrate 1 is charged into the loading chamber 100 shown in FIG. In the device shown in FIG.
The loading chamber 100 can be charged with a maximum of 10 substrates, and can process substrates in a single-wafer manner. When the pressure becomes 1 × 10 −2 Pa or less, the substrate is transferred to the next dry etching chamber 101. Then, the N2 flow rate is adjusted, and when desired conditions are reached, etching is started. In the dry etching chamber 101, the natural oxide film 4 on the surface is removed under the above-described method and conditions. Amorphous silicon film surface 31
Since the thickness of the native oxide film 4 formed at this time is 1.5 nm at the maximum, the etching time is 2 minutes and the over-etching is performed. After the etching is completed, the flow of the N2 gas is stopped, and the residual gas is sufficiently removed by drawing a vacuum again (FIG. 2C).

Next, the substrate that has been subjected to the etching process in a vacuum is transferred to a laser annealing chamber 103 via a transfer chamber 102 maintained in a vacuum (1 × 10 −2 Pa) to perform a laser annealing process. For example, the moving speed of the substrate is determined so that a 2 mm square beam can be irradiated at a pitch of 200 μm. Laser frequency is 100
The energy is set at 200 Hz to 200 Hz, the energy at the amorphous silicon surface 31 is set at 200 to 400 mJ / cm 2, and a laser beam is irradiated (FIG. 2D).

The amorphous silicon film 31 on the entire surface of the substrate is crystallized by the above-described laser irradiation, and a polycrystalline silicon film 32 is obtained. It is desirable that the grain size of the polycrystalline silicon film 32 is 400 to 1 μm. If the thickness is less than 400 nm, the mobility is reduced because the size is small. On the other hand, when the thickness exceeds 1 μm, a large number of defects (crystal layer defects) are formed in the polycrystalline silicon crystal grains, which serve as traps for carriers, so that TFT characteristics such as ON current (mobility) and S factor are deteriorated (see FIG. 2 (e)).

FIG. 3 shows the result of surface observation of the polycrystalline silicon film obtained by using the present invention. Surface irregularities are
It measured using AFM. The polycrystalline silicon film used for the measurement was obtained by laser annealing a 50 nm-thick amorphous silicon film. Laser irradiation energy is 350mJ /
cm2. Its grain size is 600 nm. FIG. 3 shows the RMS (mean square roughness) measured by AFM.
And the relationship between laser annealing pre-treatments. As a comparison, as described above, a polycrystalline silicon film obtained by laser annealing without performing a process for removing a natural oxide film was measured.
The RMS of the surface of a polycrystalline silicon film crystallized by performing laser annealing on an amorphous silicon film surface in an untreated state is 1
It was found that the RMS of the surface of the polycrystalline silicon film obtained by using the present invention was smaller than 10 nm, while the range was 0 nm to 20 nm.

Further, the effect of irregularities on the surface of the polycrystalline silicon film on the TFT characteristics was examined by preparing a TFT using this polycrystalline silicon film. Therefore, a coplanar p-ch TFT was manufactured using a polycrystalline silicon film that had been subjected to laser annealing crystallization in an untreated state and a polycrystalline silicon film obtained by using the present invention. This TFT is
A gate oxide film is formed on the polycrystalline silicon film by ECR-CV
The film was formed by Method D. The thickness is 75 nm. Further, Mo-Ta was formed on the gate electrode by a sputtering method.
The thickness is 250 nm. Next, B- was ion-doped using the gate electrode as a mask to form source and drain regions. As the ion doping condition, B2H6 gas was used. Next, an SiOx film was formed as an interlayer insulating film by a plasma CVD method. Finally, contact holes were formed in the interlayer insulating film and the gate insulating film to form source / drain electrodes. Al-Si was used for the source / drain electrodes. The channel length and width of the TFT used for the measurement are 10 μm.

In order to examine the gate breakdown voltage, the gate voltage was varied while the source and drain terminals were connected to the ground, and the voltage at which the TFT was destroyed was examined. Table 1 shows the measurement results.
Shown in

[0030]

[Table 1] The measurement result is an average value of 20 TFTs. The laser energy was 350 mJ / cm @ 2 when laser annealing was performed at a laser oscillation frequency of 100 Hz and 200 Hz. Under these conditions, the mobility is 100 to 120 cm 2
/ Vs. It can be seen that, at either frequency, the removal of the native oxide film prior to laser annealing improved the gate withstand voltage by about 10 V compared to the case without removal. It was also confirmed that the removal of the natural oxide film reduced the leak current.

As described above, by removing the natural oxide film before laser annealing crystallization using the manufacturing method and manufacturing apparatus of the present invention, the surface of the polycrystalline silicon film obtained by the laser annealing method is flattened. In addition, a TFT having a low leakage current and a high gate withstand voltage can be manufactured.

As described above, since the natural oxide film is removed before the laser annealing and the film is not exposed to the air from the oxide film removing step to the annealing step, the amorphous oxide film is maintained without the oxide film on the film surface. The silicon film can be crystallized by a laser annealing method. As a result, a polycrystalline silicon film in which surface irregularities due to agglomeration of oxygen atoms and surface impurities is suppressed to 10 nm or less can be obtained, and a high leakage current with a high dielectric breakdown characteristic (high gate breakdown voltage) can be obtained. A crystalline silicon TFT can be provided.

The TFT is used, for example, as a pixel switching element and a peripheral driving circuit element of a thin film transistor type liquid crystal display device. Using the above-described method, an n-ch TFT is formed as a pixel switching element on a glass substrate, and at the same time, an n-ch and a p-ch TFT for a driving circuit having a CMOS structure are formed around the substrate. Each pixel T
An auxiliary capacitance Cs electrode is also formed on the FT at the time of formation. TF
After T is formed, a passivation film is formed thereon with SiNx or the like, and finally, a substrate with a counter electrode is attached thereto, and liquid crystal is injected. In the pixel switching element,
Although an n-ch TFT is used, an LDD structure may be used to further reduce leakage current. If the leak current in the pixel portion is high, the TFT does not turn off sufficiently, causing flicker and image unevenness. For that purpose, the leak current needs to be 1 pA or less. The TFT characteristics of the pixel section are
The mobility may be 30 cm2 / Vs or more. It is desirable that the threshold voltage is as low as about 2 to 5 V and the variation is small. If the threshold voltage of the pixel portion TFT is too high, the driving voltage increases, so that the gate breakdown voltage of the TFT must be high. Usually, if the threshold voltage is 2 to 4 V, the driving voltage is about 30 V. Characteristics are important.
On the other hand, if the threshold voltage is too low, the gate voltage becomes 0 V
In this case, the current is not sufficiently turned off and current flows.
On the other hand, a method of increasing the drive speed by forming a circuit configuration with a CMOS structure is usually used for the drive circuit element. Therefore, the driving circuit portion is required to have higher mobility than the pixel portion. As the mobility becomes higher, the scanning speed can be increased, and the invention can be applied to a large liquid crystal display device. With a screen display of about 12 inches, the mobility is 80c
m2 / Vs or more is required.

As described above, when applied to a liquid crystal display, a pixel driving voltage of about 30 V is required. Therefore, it is necessary to ensure that the gate breakdown voltage of the polycrystalline silicon TFT used is 35 V or more. By using the manufacturing method and apparatus of the present invention, a polycrystalline silicon TFT having high mobility and high gate withstand voltage can be easily obtained, so that a high-definition driving circuit integrated liquid crystal display with few pixel defects can be realized. . Here, a TFT is used for the liquid crystal display. (Embodiment 2) FIG. 4 shows a manufacturing apparatus of the present invention using another dry etching method. Since the structure other than the dry etching chamber and the manufacturing method are the same as those of the apparatus shown in FIG. 1 described in the first embodiment, the same parts are denoted by the same reference numerals and the details are omitted.

In the dry etching method, ultraviolet light excitation F2
A natural oxide film removal method using gas is used. Inside the chamber 2
In step 01, an F2 gas 202 is introduced into the chamber at a flow rate of 5 to 10 slm, and irradiated with ultraviolet rays 203 to generate F radicals. The etching F radical reacts with the silicon oxide silicon to remove the natural oxide film. As the ultraviolet light 203, a laser capable of continuous oscillation such as an Ar laser is used. When the ultraviolet rays 203 are irradiated on the surface of the amorphous silicon, they absorb light and are crystallized. Crystallization is performed without removing the natural oxide film, so that the surface becomes uneven. Therefore, the light irradiation direction must be parallel to the substrate surface so that ultraviolet light is not irradiated on the amorphous silicon surface (FIG. 4B).

Using an Ar laser, F2 gas 10 slm
Since the etching rate is about 20 A / min, the etching time of the natural oxide film on the surface of the amorphous silicon is set to 1 minute. If the flow rate of the F2 gas is increased, the etching rate can be increased.

As described above, by removing the natural oxide film of the amorphous silicon film before laser annealing as in the first embodiment, the irregularities on the surface of the polycrystalline silicon film can be reduced. The gate withstand voltage of the crystalline silicon TFT can be improved. Also in this case, the first embodiment
A TFT was formed in the same manner as described above, and a liquid crystal display device using the TFT was formed.

[0038]

According to the present invention, there is provided a method and an apparatus for manufacturing a crystalline semiconductor suitable for forming an element by eliminating the occurrence of irregularities on the surface of a polycrystalline silicon film caused by the presence of a natural oxide film. can do.

[Brief description of the drawings]

FIG. 1 is a diagram showing an apparatus for manufacturing a polycrystalline semiconductor according to a first embodiment of the present invention.

FIG. 2 is a process cross-sectional view of the method for forming a polycrystalline semiconductor according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating a relationship between an RMS value obtained by AFM measurement and a laser annealing pretreatment.

FIG. 4 is a diagram showing an apparatus for manufacturing a polycrystalline semiconductor according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a conventional polycrystalline semiconductor manufacturing method in the order of steps.

[Explanation of symbols]

Reference Signs List 1 Insulating substrate 2 Undercoat film 3 Amorphous silicon film 31 Dehydrogenated amorphous silicon film 4 Natural oxide film 32 Polycrystalline silicon film with flat surface (<10 nm) 33 Polycrystalline silicon film with rough surface (> 10 nm) 100 Loading chamber 101 dry etching chamber (anhydrous HF / CH3
(OH vapor cleaning) 102 Transfer chamber 103 Laser annealing chamber 104 Turbo pump 105 Rotary pump 106 N2 cylinder 107 Mass flow controller 108 HF / CH3 OH solution 109 CH3 OH solution 110 Laser 111 Beam homogenizer 112 Condenser lens 113 Substrate XY stage 114 Extraction chamber 201 Dry etching chamber (using ultraviolet light excited F2 gas) 202F2 cylinder 203 UV light source

Claims (3)

[Claims] A step of forming an amorphous semiconductor film on a substrate; a step of removing a natural oxide film on the surface of the amorphous semiconductor film; and a state in which the natural oxide film is removed on the surface of the semiconductor film. Irradiating the semiconductor surface with an energy beam. A first chamber for accommodating a substrate to be processed and forming an amorphous semiconductor film on the substrate to be processed; dry etching means for removing a native oxide film on the surface of the amorphous semiconductor; Means for irradiating the surface of the amorphous semiconductor film with an energy beam, and a second chamber for accommodating the substrate to be processed and capable of irradiating the surface of the amorphous semiconductor film with the energy beam; An apparatus for manufacturing a crystal semiconductor, comprising: a vacuum system connecting a chamber and the second chamber. 3. The crystal semiconductor according to claim 2, wherein the degree of vacuum of the first chamber, the second chamber, and the vacuum system is a final degree of vacuum of 1 × 10 −2 Pa or less. Manufacturing equipment.