JPH1069439A - Interface signal operating device - Google Patents

Interface signal operating device

Info

Publication number
JPH1069439A
JPH1069439A JP8226410A JP22641096A JPH1069439A JP H1069439 A JPH1069439 A JP H1069439A JP 8226410 A JP8226410 A JP 8226410A JP 22641096 A JP22641096 A JP 22641096A JP H1069439 A JPH1069439 A JP H1069439A
Authority
JP
Japan
Prior art keywords
signal
data
potential
state
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8226410A
Other languages
Japanese (ja)
Inventor
Akinori Terachi
昭典 寺地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP8226410A priority Critical patent/JPH1069439A/en
Publication of JPH1069439A publication Critical patent/JPH1069439A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide an interface signal operating device which can test a function that detects a failure asynchronous with the transfer of data performed via an interface. SOLUTION: When a switch 4-1 is set at a position (1), the power definition signal 7 sent from a data transmission part 1 of a channel device is separated and the potential of the signal 7 received at a data reception part 3 is set at a high level. When the switch 4-1 is set at a position (2), the signal 7 is transmitted between both parts 1 and 3. When the switch 4-1 is set at a position (3), the signal 7 sent from the part 1 is separated and the potential of the signal 7 received at the part 3 is set at a low level.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はインタフェース信号
操作装置に関し、特にデータ通信装置のインタフェース
信号操作装置に関する。
The present invention relates to an interface signal operating device, and more particularly to an interface signal operating device of a data communication device.

【0002】[0002]

【従来の技術】汎用コンピュータのチャネル装置は、ソ
フトウエアの管理下において、処理対象となる入出力装
置に応じた動作の手続き、転送データ量、主記憶装置の
データエリア等のアドレスなどが、主記憶装置上に格納
されているチャネルプログラムの記述に従い、入出力装
置と主記憶装置との間でデータ転送を行う。
2. Description of the Related Art Under control of software, a channel device of a general-purpose computer mainly includes an operation procedure according to an input / output device to be processed, a transfer data amount, an address of a data area of a main storage device, and the like. Data transfer is performed between the input / output device and the main storage device according to the description of the channel program stored in the storage device.

【0003】従来は、図2に示すように、チャネル装置
のデータ送出部1とチャネル装置のデータ受信部3と
を、データ転送用ケーブル2で接続する。
Conventionally, as shown in FIG. 2, a data transmission unit 1 of a channel device and a data reception unit 3 of the channel device are connected by a data transfer cable 2.

【0004】次に、試験プログラムにより、チャネル装
置のデータ送出部1からチャネル装置のデータ受信部3
へ、データ折り返し転送を開始させ、チャネル装置間で
各種データ転送を行うことにより、チャネル装置の機能
試験を行う。
[0004] Next, according to a test program, the data transmission unit 1 of the channel device to the data reception unit 3 of the channel device.
Then, a data loop-back transfer is started, and various data transfer is performed between the channel devices, thereby performing a function test of the channel device.

【0005】従来、チャネル装置のデータ転送試験は、
チャネル装置のデータ送信側と受信側を折り返しデータ
転送用ケーブルで接続し、試験プログラムにより、チャ
ネル装置のデータ転送試験や、擬障(疑似障害)試験等
の各種試験を行っていた。
Conventionally, a data transfer test of a channel device is performed by
A data transmission side and a reception side of the channel device are connected by a loopback data transfer cable, and various tests such as a data transfer test and a false failure test of the channel device are performed by a test program.

【0006】[0006]

【発明が解決しようとする課題】パリティエラーのよう
なデータ転送と同期して発生する障害は、意図的に不正
なデータを埋め込み、パリティエラーの状態を作り出せ
るような仕組みが組み込まれていて、試験プログラムで
このような障害の検出機能を評価することができる。
A failure that occurs in synchronization with data transfer such as a parity error has a built-in mechanism for intentionally embedding invalid data and creating a parity error state. A program can evaluate such a failure detection function.

【0007】しかし、電源確定信号(チャネル装置に電
源が投入されてから、そのチャネル装置の内部のロジッ
ク回路等の不安定状態が解消するまでの期間出力される
信号)のように、相手装置の電源の状態が変化しない限
り、その信号の状態が変化しないデータ転送と同期しな
い信号の試験を行うためには、その信号経路上に信号の
状態を変化させるためのハードウエアを設ける必要があ
る。
However, as in the case of a power supply determination signal (a signal output during a period from when power is supplied to a channel device to when an unstable state of a logic circuit or the like in the channel device is eliminated), a signal of a partner device is output. In order to test a signal that is not synchronized with data transfer whose signal state does not change unless the state of the power supply changes, it is necessary to provide hardware for changing the state of the signal on the signal path.

【0008】このため、チャネル装置に組み込まれてい
るアクションに直接起因しない、インタフェース上のデ
ータ転送に同期しない障害を検出する機能を、評価する
方法がなかった。
For this reason, there is no method for evaluating a function of detecting a failure that is not directly caused by an action incorporated in the channel device and that is not synchronized with data transfer on the interface.

【0009】本発明の目的は、インタフェース上のデー
タ転送に同期しない障害を検出する機能を試験できるイ
ンタフェース信号操作装置を提供することである。
An object of the present invention is to provide an interface signal operation device capable of testing a function of detecting a failure not synchronized with data transfer on an interface.

【0010】[0010]

【課題を解決するための手段】本発明によれば、データ
送出部とデータ受信部とを接続する信号線に挿入される
インタフェース信号操作装置であって、前記データ送出
部からの信号線を断として前記データ受信部へ所定レベ
ルの電位を強制的に付与する電位付与手段を含むことを
特徴とするインタフェース信号操作装置が得られる。
According to the present invention, there is provided an interface signal operating device inserted into a signal line connecting a data transmitting unit and a data receiving unit, wherein the signal line from the data transmitting unit is disconnected. The present invention provides an interface signal operating device including a potential applying unit for forcibly applying a predetermined level of potential to the data receiving unit.

【0011】そして、前記電位付与手段は、前記データ
受信部からの信号線を前記データ送信部へ接続する状態
から前記所定レベルの電位へ接続する状態に切替え自在
なスイッチ素子を有することを特徴とする。
The potential applying means has a switch element which can be switched from a state in which a signal line from the data receiving section is connected to the data transmitting section to a state in which the signal line is connected to the predetermined level of potential. I do.

【0012】また、前記信号線は前記データ送信部の電
源状態が確定したことを示す電源確定信号線であり、前
記所定レベルの電位は前記電源状態の非確定を示す電位
であることを特徴とする。
Further, the signal line is a power supply determination signal line indicating that the power supply state of the data transmission section has been determined, and the potential of the predetermined level is a potential indicating the indefiniteness of the power supply state. I do.

【0013】本発明の作用は次の通りである。従来使用
していた折り返しデータ転送用ケーブルの経路中に、制
御信号の状態を意図的に論理“1”あるいは論理“0”
の状態に、操作することができるインタフェース信号操
作装置を設け、折り返しデータ転送用ケーブル内の制御
信号の論理状態を任意に操作できるようにすることによ
り、チャネル装置のデータ転送中に非同期(データ転送
に同期しない疑似障害)事象を意図的に発生させ、非同
期事象試験を行う。
The operation of the present invention is as follows. The state of the control signal is intentionally changed to logic “1” or logic “0” in the path of the loopback data transfer cable used conventionally.
In this state, an interface signal operation device that can be operated is provided so that the logic state of the control signal in the loopback data transfer cable can be arbitrarily operated, thereby enabling asynchronous operation (data transfer) during data transfer of the channel device. Pseudo-failure that does not synchronize with an event) An event is intentionally generated and an asynchronous event test is performed.

【0014】[0014]

【発明の実施の形態】以下に、本発明の実施例について
図面を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0015】図1は本発明によるインタフェース信号操
作装置の実施例の構成を示すブロック図であり、図2と
同等部分は同一符号にて示している。なお、重複する説
明は省略する。
FIG. 1 is a block diagram showing the configuration of an embodiment of an interface signal operating device according to the present invention, and the same parts as those in FIG. 2 are denoted by the same reference numerals. In addition, overlapping description is omitted.

【0016】図1において、チャネル装置のデータ送出
部1とチャネル装置のデータ受信部3は、データ転送用
ケーブル2−1、コネクタ5、インタフェース信号操作
装置4、コネクタ6、データ転送ケーブル2−2を介し
て接続されている。
In FIG. 1, a data transmission unit 1 of the channel device and a data reception unit 3 of the channel device are composed of a data transfer cable 2-1, a connector 5, an interface signal operation device 4, a connector 6, and a data transfer cable 2-2. Connected through.

【0017】インタフェース信号操作装置4内部では、
データ転送用ケーブル2−1,2の信号線の内、電源確
定信号7のみがスイッチ4−1を介して接続される。
In the interface signal operation device 4,
Of the signal lines of the data transfer cables 2-1 and 2-2, only the power supply determination signal 7 is connected via the switch 4-1.

【0018】スイッチ4−1をの位置にセットする
と、チャネル装置のデータ送出部1からの電源確定信号
7は切り離され、データ受信部3で受信する電源確定信
号7の電位はプルアップ抵抗R1によりハイ(レベル)
となる。
When the switch 4-1 is set to the position, the power supply determination signal 7 from the data transmission unit 1 of the channel device is cut off, and the potential of the power supply determination signal 7 received by the data reception unit 3 is adjusted by the pull-up resistor R1. high level)
Becomes

【0019】スイッチ4−1をの位置にセットする
と、電源確定信号7はデータ送出部1とデータ受信部3
間で接続される。スイッチ4−1をの位置にセットす
ると、チャネル装置のデータ送出部1からの電源確定信
号7は切り離され、データ受信部3で受信する電源確定
信号7の電位はプルダウン抵抗R2によりロー(レベ
ル)となる。
When the switch 4-1 is set to the position, the power supply determination signal 7 is transmitted to the data transmitting section 1 and the data receiving section 3.
Connected between When the switch 4-1 is set to the position, the power determination signal 7 from the data transmission unit 1 of the channel device is disconnected, and the potential of the power determination signal 7 received by the data reception unit 3 is low (level) by the pull-down resistor R2. Becomes

【0020】電源確定信号7がハイレベルとなったとき
にこの信号7が有効(電源確定状態)である場合、イン
タフェース信号操作装置4内のスイッチ4−1は予め
の位置とし、導通状態(接続状態)としておく。次に、
試験プログラムによりチャネル装置のデータ送出部1、
データ受信部3間のデータ折り返し試験を開始させ、デ
ータ転送中に、インタフェース信号操作装置4内のスイ
ッチ4−1をの位置に移動させ、電源確定信号7を有
効(ハイ)の状態から無効(ロー:電源非確定状態)の
状態へ移行させる。
If the signal 7 is valid (power-confirmed state) when the power-confirmation signal 7 becomes high level, the switch 4-1 in the interface signal operating device 4 is set to a predetermined position and the switch is turned on (connected). State). next,
According to the test program, the data transmission unit 1 of the channel device,
A data loopback test between the data receiving units 3 is started. During the data transfer, the switch 4-1 in the interface signal operation device 4 is moved to the position of, and the power determination signal 7 is changed from the valid (high) state to invalid (high). (Low: power supply indeterminate state).

【0021】これにより、チャネル装置のデータ受信部
3で電源確定信号7の状態変化を検出し、ファームウエ
アへ通知し、ファームウエアはOSへ報告し、OSは障
害処理を行い、非同期事象試験を終了する。
As a result, the data receiving unit 3 of the channel device detects a change in the state of the power determination signal 7 and notifies the firmware of the change. The firmware reports the change to the OS, the OS performs a fault process, and performs an asynchronous event test. finish.

【0022】電源確定信号7がローレベルとなったとき
にこの信号7が有効の場合、インタフェース信号操作装
置4内のスイッチ4−1は予めの位置とし、導通状態
(接続状態)としておく。次に、試験プログラムにより
チャネル装置のデータ送出部1、データ受信部3間のデ
ータ折り返し試験を開始させ、データ転送中に、インタ
フェース信号操作装置4内のスイッチ4−1をの位置
に移動させ、電源確定信号7を有効(ロー)の状態から
無効(ハイ:電源非確定状態)の状態へ移行させる。
If the signal 7 is valid when the power supply determination signal 7 becomes low level, the switch 4-1 in the interface signal operation device 4 is set to a predetermined position and is in a conductive state (connected state). Next, a data return test between the data transmission unit 1 and the data reception unit 3 of the channel device is started by the test program, and the switch 4-1 in the interface signal operation device 4 is moved to the position during data transfer. The power determination signal 7 is shifted from a valid (low) state to an invalid (high: power non-determination state) state.

【0023】これにより、チャネル装置のデータ受信部
3で電源確定信号7の状態変化を検出し、ファームウエ
アへ通知し、ファームウエアはOSへ報告し、OSは障
害処理を行い、非同期事象試験を終了する。
As a result, the data receiving unit 3 of the channel device detects a change in the state of the power supply determination signal 7, notifies the firmware, reports the firmware to the OS, the OS performs a fault process, and performs an asynchronous event test. finish.

【0024】[0024]

【発明の効果】以上説明したように本発明は、チャネル
装置のデータ送出部とデータ受信部の間の接続(データ
転送用ケーブル)系に、スイッチを挿入することによ
り、非同期事象試験が行える効果がある。
As described above, according to the present invention, an asynchronous event test can be performed by inserting a switch into a connection (data transfer cable) system between a data transmission unit and a data reception unit of a channel device. There is.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例のブロック図である。FIG. 1 is a block diagram of an embodiment of the present invention.

【図2】従来のチャネル装置の接続ブロック図である。FIG. 2 is a connection block diagram of a conventional channel device.

【符号の説明】[Explanation of symbols]

1 チャネル装置のデータ送出部 2−1,2 データ転送用ケーブル 3 チャネル装置のデータ受信部 4 インタフェース信号操作装置 4−1 スイッチ 5,6 コネクタ 7 電源確定信号 R1 プルアップ抵抗 R2 プルダウン抵抗 Reference Signs List 1 Data transmission unit of channel device 2-1 Cable for data transfer 3 Data reception unit of channel device 4 Interface signal operation device 4-1 Switch 5, 6 Connector 7 Power supply determination signal R1 Pull-up resistor R2 Pull-down resistor

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 チャネル装置のデータ送出部とデータ受
信部とを接続する信号線に挿入されるインタフェース信
号操作装置であって、前記データ送出部からの信号線を
断として前記データ受信部へ所定レベルの電位を強制的
に付与する電位付与手段を含むことを特徴とするインタ
フェース信号操作装置。
1. An interface signal operation device inserted into a signal line connecting a data transmission unit and a data reception unit of a channel device, wherein the signal line from the data transmission unit is disconnected and a predetermined signal is transmitted to the data reception unit. An interface signal operating device comprising a potential applying means for forcibly applying a level potential.
【請求項2】 前記電位付与手段は、前記データ受信部
からの信号線を前記データ送信部へ接続する状態から前
記所定レベルの電位へ接続する状態に切替え自在なスイ
ッチ素子を有することを特徴とする請求項1記載のイン
タフェース信号操作装置。
2. The device according to claim 1, wherein said potential applying means has a switch element which can be switched from a state in which a signal line from said data receiving section is connected to said data transmitting section to a state in which said signal line is connected to said predetermined level of potential. The interface signal operating device according to claim 1, wherein
【請求項3】 前記信号線は、前記データ送信部の電源
状態が確定したことを示す電源確定信号線であり、前記
所定レベルの電位は前記電源状態の非確定を示す電位で
あることを特徴とする請求項1記載のインタフェース信
号操作装置。
3. The power supply determining signal line indicating that the power supply state of the data transmission unit has been determined, and the predetermined-level potential is a potential indicating that the power supply state is not determined. The interface signal operation device according to claim 1, wherein
JP8226410A 1996-08-28 1996-08-28 Interface signal operating device Withdrawn JPH1069439A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8226410A JPH1069439A (en) 1996-08-28 1996-08-28 Interface signal operating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8226410A JPH1069439A (en) 1996-08-28 1996-08-28 Interface signal operating device

Publications (1)

Publication Number Publication Date
JPH1069439A true JPH1069439A (en) 1998-03-10

Family

ID=16844689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8226410A Withdrawn JPH1069439A (en) 1996-08-28 1996-08-28 Interface signal operating device

Country Status (1)

Country Link
JP (1) JPH1069439A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009187245A (en) * 2008-02-06 2009-08-20 Fujitsu Ltd Interface board testing device and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009187245A (en) * 2008-02-06 2009-08-20 Fujitsu Ltd Interface board testing device and method

Similar Documents

Publication Publication Date Title
US4979108A (en) Task synchronization arrangement and method for remote duplex processors
EP1092194A1 (en) Device for use as stand-alone device and as slave device in a data bus system
KR100293950B1 (en) Apparatus and method for detecting fault using peripheral components interconnect bus monitor
US4475049A (en) Redundant serial communication circuit
JPH1069439A (en) Interface signal operating device
JP2861595B2 (en) Switching control device for redundant CPU unit
JPS6032374B2 (en) data transmission equipment
KR100191678B1 (en) Inspection method of network for duplicating communication network
KR970011438B1 (en) Apparatus for selecting a communication line between a processor and a device in an exchanger
JPS6175651A (en) Modulator-demodulator
JPH10133903A (en) Data transfer controller and loop back test system
KR950022612A (en) Error detection device and processing method on redundancy board of redundancy device
KR200167747Y1 (en) Dc bus loop-back test system for exchange
KR100220228B1 (en) Apparatus for controlling state transfer in the duplication architecture
JPS63149943A (en) Communication control equipment
KR0125889Y1 (en) Double mode controller of plc
JPH08191319A (en) Data communication system
JP2606160B2 (en) Failure detection method for parity check circuit
JP2001056702A (en) Multiplex instrumentation system
KR20030017683A (en) Apparatus and method for switching synchronous transfer mode switch automatically
KR19990011055A (en) Apparatus and method for state signal recognition of each module in a redundant system
JPH04119034A (en) Dual loop control system in information processing system
JPH03106155A (en) Circuit system for fault check
JPH02239356A (en) Pseudo fault occurrence system
KR19990079444A (en) Asynchronous Transfer Mode Matching Device with Loopback Function

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20031104