JPH1062203A - Position detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a detection result with correct and high resolution even when a time shift is generated between count timing and the output timing of a correction value in a system for adding a count value to a correction value and executing positional detection of high resolution by providing the system with a hysteresis function and executing accurate counting. SOLUTION: Latches 11, 12 respectively detect sample holding timing values of two-phase rectangular waves APH, BPH inputted to a counter 7, a comparison corrector 13 compares the values of the rectangular waves APH, BPH samplied by the latches 11, 12 with the values of two-phase sine wave signals Vad, Vbd and outputs a compared correction value and an adder 9 adds a count value C from the counter 7 and a correction value from a computing element 8 to the compared correction value from the corrector 13 and outputs the added value as a detected position.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a position detecting device for detecting a moving position of a moving body such as an arm in an NC control machine or a robot with high resolution.

[0002]

2. Description of the Related Art Conventionally, this type of position detector performs position detection using two-phase sine wave signals having a phase difference of 90 degrees spatially (hereinafter, these are referred to as Va and Vb). This type of position detector is usually called an encoder.

In a conventional encoder, for example, light emitted from a light emitting diode is applied to a rotating code plate attached to a predetermined rotating shaft whose rotational position is to be detected, and the rotating code plate and a fixed code facing the rotating code plate are fixed. The light passing through the slit provided in the plate is received by a light receiving element such as a photodiode and converted into a voltage, whereby the slit interval provided in the rotary code plate is reduced by one according to the rotation of the rotary code plate.
It is configured to obtain sine wave signals Va and Vb having a pitch of one cycle. In this case, two sine wave signals V
Two light receiving elements are provided at positions shifted by 1/4 pitch in order to have a spatial difference of 90 degrees between a and Vb.

Next, these sine wave signals Va, Vb
Is input to a comparator, and rectangular wave signals AP and BP having a high level (hereinafter, referred to as high) and a low level (hereinafter, referred to as low) are generated on the output side according to the positive and negative values of the sine wave signal, respectively. When the rectangular wave signal BP is low when the rectangular wave signal AP rises When the rectangular wave signal AP is low when the square wave signal BP falls, the rectangular wave signal BP is changed when the rectangular wave signal AP falls When it is high When the square wave signal AP is high at the rise of the square wave signal BP, the up / down counter is sequentially counted up,
On the other hand, when the square wave signal BP is high when the square wave signal AP rises, when the square wave signal AP is high when the square wave signal BP falls, the square wave signal BP when the square wave signal AP falls Is low When the rectangular wave signal AP is low when the rectangular wave signal BP rises, the up / down counter is sequentially counted down,
Thereby, the rotation angle of the rotary code plate is detected.

In this position detection method, as described above, the rectangular wave signal AP or B
During one cycle of P (one pitch), the rotation angle is calculated by 4
Times (called quadruple multiplication).

Therefore, taking advantage of the fact that the output signals Va and Vb are sinusoidal signals, when the rectangular wave signal BP is low when the rectangular wave signal AP rises, the rectangular wave is generated when the rectangular wave signal AP falls. When the signal BP is high, the up / down counter is counted up sequentially.
On the other hand, when the rectangular wave signal BP is high when the rectangular wave signal AP rises, and when the rectangular wave signal BP is low when the rectangular wave signal AP falls, the up / down counter is sequentially counted down.
By adding a correction amount of {tan ^-1 (Va / Vb)} / π to the count value, the rotation angle in one cycle is set to 4
There is known a method of performing detection with a resolution that is twice as high.

FIG. 10 shows the structure of a position detector of the above type. 31 and 32 are sample and hold circuits for sine wave signals Va and Vb, 33 and 34 are A / D converters for digital conversion, 35 and 36 are comparators for obtaining rectangular wave signals AP and BP from sine wave signals Va and Vb, 37 Is a square wave signal A
A counter for counting up and down by P and BP as described above, and 38 is the above {tan ^-1 (Va / Vb)} / π
, 39 is an adder for adding the output values of the counter 37 and the calculator 38, and 40 is a timing control circuit for operating the sample and hold circuits 31, 32 and the counter 37 in synchronization.

[0008]

By the way, in the position detector having the above configuration, in order to accurately count even in an environment where there is a noise in actual use, sine wave signals Va and Vb are set using a counter having a limited input frequency. A function called hysteresis is added to the comparators 35 and 36 which convert the sine wave signal into a rectangular wave at the same time as cutting the high frequency of the signal.

For this reason, as shown in FIGS. 8 and 9, the two-phase sine wave signals are represented by Va and Vb, and the rectangular wave signals output from the comparators 35 and 36 are represented by AP, BP and comparator 3.
Assuming that the rectangular wave signals in the case of using the comparators with hysteresis as APH and BPH are 5, 36, the output value of the counter 37 has the timing of counting up and counting down as shown in (d) of FIGS. A phenomenon occurs in which the timing does not match the zero level of the original sine wave signals Va and Vb. Therefore, the counter 37
When the count value and the correction value of the arithmetic unit 38 are simply added, there is a problem that correct position detection cannot be performed in a range in which the hysteresis is operating, as shown in (f) of FIGS. .

SUMMARY OF THE INVENTION In view of the above-mentioned conventional problems, the present invention has a hysteresis function in a method of adding a count value and a correction value to perform high-resolution position detection, and performs accurate counting and accurate high-resolution position detection. An object is to provide a position detecting device capable of obtaining a result.

[0011]

According to the position detecting apparatus of the present invention, each voltage value Va, Vb of a two-phase sine wave signal having a phase difference of 90 degrees spatially generated according to the movement of a moving body.
Means for sampling and holding, and an A / D for converting the sampled and held voltage values Va and Vb into digital signals
A converter, a calculator for calculating a value of {tan ^-1 (Vb / Va)} / π from a two-phase sine wave digital signal from the A / D converter, and a two-phase sine wave having hysteresis A comparator for converting to a two-phase rectangular wave by comparing with a zero level, a counter for counting the number of changes in the sine wave from the two-phase rectangular wave in accordance with the movement of the moving object in synchronization with the sample and hold timing, and a counter simultaneously Has a latch for detecting the value of the two-phase square wave input to the sampler at the time of sample and hold, and the value of the two-phase square wave sampled by the latch and 2
The comparison corrector that outputs a correction value by comparing the value of the phase sine wave, the adder that adds the output of the arithmetic unit, the counter, and the comparison corrector, the sample hold, the count reading, and the latch timing Timing control means for controlling the two-phase rectangular wave input at the same time, detecting the value of the two-phase rectangular wave input to the counter at the sample and hold timing by the latch, and comparing the detected value with the value of the two-phase sine wave. By obtaining the comparison correction value, the added value of the count value and the correction value is further corrected by ± 1 or 0.

The arithmetic unit, the comparison corrector, and the adder are constituted by a microcomputer, a ROM, a RAM, and software.
It can be configured by digital hardware.

The counter is constituted by a synchronous counter, and its input first-stage latch output is used as an input of a latch of a comparison corrector, and the timing of sample hold and latch is synchronized with the readable timing of the synchronous counter. By delaying the delay, it is possible to prevent the synchronization between the sample hold counter and the latch from shifting.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the position detecting device according to the present invention will be described below with reference to FIGS.

In FIG. 1, reference numerals 1 and 2 denote sample and hold circuits for sampling and holding two-phase analog input sine wave signals Va and Vb.
This is an A / D converter for digitally converting the phase analog sine wave signals Va and Vb. Reference numerals 5 and 6 denote comparators with hysteresis for obtaining two-phase rectangular wave signals APH and BPH by comparing the two-phase analog sine wave signals Va and Vb with a zero level having hysteresis. A counter that counts the number of sine waves that have changed according to the movement of the moving object depending on the state of the signals APH and BPH.
The counter value is increased or decreased by 2 according to a change in the cycle (360 degrees). 8 receives sine wave signals Va and Vb as inputs, and when Va is not 0, {tan ^-1 (Va / Vb)} /
π is calculated and output as a correction amount, and 1 when Va is 0
/ 2 is an arithmetic unit that outputs / 2. Latches 11 and 12 detect and store the values (high or low) of the two-phase rectangular wave signals APH and BPH input to the counter 7 at the time of sample hold. Reference numeral 10 denotes a timing control circuit for controlling the sample and hold in the sample and hold circuits 1 and 2, the reading of the counter 7, and the timing of the latches 11 and 12. Reference numeral 13 indicates a correction value of ± 1 or 0 by comparing the values of the two-phase rectangular wave signals APH and BPH sampled by the latches 11 and 12 with the values (positive and negative) of the two-phase sine wave digital signals Va and Vb. This is a comparison corrector that outputs. Reference numeral 9 denotes an adder for adding the outputs of the counter 7, the arithmetic unit 8, and the comparison corrector 13. An operation unit 14 includes the operation unit 8, the adder 9, and the comparison corrector 13.

FIG. 2 shows an example of a specific configuration of the arithmetic unit 14, which is composed of a microcomputer 15, a ROM 16, and a RAM 17. FIG. 3 is a flowchart showing the operation of the microcomputer 15. In FIG. 3, C is a counter value, La and Lb are output values of latches 11 and 12, Vad and Vbd are digital values of sine wave signals Va and Vb, and L is a position measurement value. As shown in FIG. 2, the microcomputer 15 determines that La is low, Lb is high, Vad is positive or 0, V
Correction of -1 when bd is positive La is high, Lb is low, Vad is negative or 0, V
When bd is negative, the correction is -1. When La is high, Lb is high, Vad is negative, and when Vbd is positive, the correction is +1. When La is low, Lb is low, Vad is positive, and Vbd is negative, the correction is +1. I do it with software.

FIG. 4 shows another specific example of the configuration of the arithmetic unit 14, which comprises a ROM 18, a shift register 19, a ROM 20, and an adder 21. ROM 18 stores Vad,
By inputting Vbd to the address line, Vad
The data is set so that a digitalized version of {tan ^-1 (Vb / Va)} / π is output to the data line when is not 0, and a digitalized version of 1/2 is output when Va is 0. ing. The shift register 19 includes the counter 7
Of the ROM 18 acting as a multiplier
Is set to match the digit to the output of. ROM2
0 is the output La of the latches 11 and 12 on the address line,
By inputting Lb, Vad, and Vbd, the correction value shown in the logic table shown in FIG. 5 is output to the data line as data corresponding to the digit of the output of the ROM 18. The adder 21 is configured to add the outputs of the ROM 18, shift register 19, and ROM 20 described above.

FIG. 6 shows a configuration example using a general synchronous counter as a specific configuration example of the counter 7 and the latches 11 and 12. Reference numerals 22 to 25 are called D flip-flops. One that performs the function of holding and outputting at the timing of the synchronization signal indicated by CLK;
Reference numeral 26 denotes an up / down counter, which counts up pulses input to UP and counts down pulses input to DOWN. Reference numeral 27 denotes a D flip-flop constituting the latch 11, and reference numeral 28 denotes a D flip-flop constituting the latch 12. CLK is a sample hold, latch, and counter read timing signal output from the timing control circuit 10, and is a counter read enabled timing after the end of the counter operation as shown in FIG. It is generated later than CLK. With this configuration, the actual read timing is slightly delayed from the desired read timing, but at most C.I. CLK or less than one cycle of C.CLK. It can be ignored by making CLK fast enough.

FIGS. 8 and 9 show timing charts in the case of counting up and in the case of counting down, respectively.
(A) is a sine wave signal Va, Vb, (b) is a rectangular wave signal AP, BP generated by a zero level comparator, (c)
Is a square wave signal APH, BPH generated by the zero level comparator with hysteresis, (d) is a count value,
(E) is the output value of the arithmetic unit 8, (f) is the added value of the count value and the calculated value, and (g) is the added value of the count value, the calculated value and the comparison correction value, which are the position detection values of the present embodiment. Is shown.

In the above description, the comparison / correction device has been described in which the counter section is configured to multiply by two.
In the case of quadruple multiplication, the operation can be similarly performed using the respective comparators and compensators.

[0021]

According to the position detecting device of the present invention, as apparent from the above description, a comparator with hysteresis for generating a two-phase rectangular wave signal from a two-phase sine wave signal,
A counter that counts the position by a phase square wave signal;
A position detection device that includes a computing unit that calculates a correction amount from a phase sine wave signal, an adder, and a timing control unit, and that adds a count value and a correction amount to perform high-resolution position detection, and simultaneously inputs the counter value to a counter A latch for detecting the value of the sampled and held two-phase square wave at the time of sample hold, and outputs a correction value by comparing the value of the two-phase square wave sampled by the latch with the value of the two-phase sine wave signal The output of the arithmetic unit, the counter, and the output of the comparison and correction unit is added by the adder, so the timing of counting up and counting down due to hysteresis does not exactly match when the sine wave signal is at the zero level. However, the correct measurement value can be obtained, and therefore, a hysteresis function can be provided to count accurately, and therefore the count timing and correction amount can be output. Exerts effect that it is the timing to obtain a detection result of the correct resolution higher offset.

If the arithmetic unit, comparison corrector and adder are constituted by a microcomputer, ROM, RAM and software, correct measured values can be obtained at low cost.

If the arithmetic unit, comparison corrector, and adder are constituted by digital hardware, correct measured values can be obtained in a short time of 1 microsecond or less, and position detection can be performed at high speed.

When a synchronous counter is used as a counter and its input first-stage latch is used as a latch input so that the synchronization between the counter and the latch does not deviate, the desired read timing can be slightly delayed and wiring can be performed. Irrespective of the delay or the like, the state of the latch and the state of the counter can be completely synchronized, and a correct measured value can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of a position detection device according to the present invention.

FIG. 2 is a configuration diagram of a calculation unit using a microcomputer in the embodiment.

FIG. 3 is an operation flowchart of a microcomputer.

FIG. 4 is a configuration diagram of a calculation unit using a ROM in the embodiment.

FIG. 5 is a logic diagram of a ROM functioning as a comparison arithmetic unit.

FIG. 6 is a configuration diagram of a latch using a synchronous counter according to the first embodiment.

FIG. 7 is a timing chart of a synchronization signal when a synchronous counter is used.

FIG. 8 is a timing chart at the time of counting up in the embodiment.

FIG. 9 is a timing chart at the time of countdown in the embodiment.

FIG. 10 is a configuration diagram of a conventional position detection device.

[Explanation of symbols]

1, 2 Sasson pull hold circuit 3, 4 A / D converter 5, 6 Comparator with hysteresis 7 Counter 8 Computing unit 9 Adder 10 Timing control circuit 11, 12 Latch 13 Comparison compensator 15 Microcomputer 16 ROM 17 RAM 18 Computing unit ROM 19 as a shift register 20 ROM as a comparison / correction device 21 Adders 22, 24 D flip-flops for the first-stage latch of the synchronous counter 26, 27 D flip-flops for the latch

Claims (4)

[Claims] 1. Each voltage value Va, of a sine wave signal having a phase difference of 90 degrees spatially generated according to the movement of a moving body,
Means for sampling and holding Vb, an A / D converter for converting each of the sampled and held voltage values Va and Vb into a digital signal, Δt from a two-phase sine wave digital signal from the A / D converter
an arithmetic unit for calculating the value of an ^-1 (Vb / Va)｝ / π; a comparator for converting a two-phase sine wave to a zero-level with hysteresis to convert it into a two-phase rectangular wave; A counter that counts the number of changes in the sine wave from the two-phase rectangular wave in response to the movement of the moving object in synchronization with the timing, and a latch that detects the sample-hold value of the two-phase rectangular wave input to the counter at the same time. And a comparison corrector that outputs a correction value by comparing the value of the two-phase square wave and the value of the two-phase sine wave sampled by the latch, and adds the outputs of the arithmetic unit, the counter, and the comparison corrector A position detecting device comprising: an adder that performs sampling and hold; sample reading, counting reading, and timing control means for controlling latch timing to occur simultaneously. 2. The position detecting device according to claim 1, wherein the arithmetic unit, the comparison corrector, and the adder are configured by a microcomputer, a ROM, a RAM, and software. 3. An arithmetic unit, a comparison corrector, and an adder are constituted by digital hardware.
The position detecting device as described in the above. 4. A counter comprising a synchronous counter, and an input first-stage latch output thereof is used as an input of a latch of a comparison corrector, and the timing of sample-hold and latch is synchronized with the readable timing of the synchronous counter. 2. The position detecting device according to claim 1, wherein the delay is delayed so that the synchronization between the counter and the latch does not shift.