JP2551680B2 - Position detection device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a position detection device used in a machine tool or the like for detecting a position, an angle, or the like.

(Prior Art) FIG. 5 is a block diagram of a conventional position detection device that performs position detection using a resolver. FIG. 6 (A)
(F) is a timing chart showing the operation of the conventional position detecting device. As shown in FIG. 6 (A), the clock generator 7 generates a synchronization signal CLK ₁ as an excitation timing signal and a hold signal with a 100us period of 5us width, and the synchronization signal CLK ₁ is sent to the excitation circuit 2 and the sample hold circuit 3. Sent. The excitation circuit 2 generates a positive pulse voltage while the input synchronizing signal CLK ₁ is at “1” level, and the synchronizing signal CLK ₁ is lowered to “0” level, as shown in FIG. At this time, a negative pulse voltage having the same area as the positive pulse voltage is generated to excite the rotor side coil on the rotor side of the resolver 1 with the shaft angle multiplier X. The resolver 1 is excited to excite the same figure (C).
And (D), two rotation angle signals S _a and S _b are generated which are proportional to the sine value and the cosine value of the rotor rotation angle, respectively. The sample hold circuit 3 holds the rotation angle signals S _a and S _b at the rising timing of the synchronizing signal CLK ₁ as shown in FIGS. _7E and _7F , and holds the hold levels S _a1 and S _b1 at that time. To the A / D (analog / digital) converter 4. The A / D converter 4 converts the hold levels S _a1 and S _b1 which are analog signals into digital values DA and DB proportional to the voltage level and sends the digital values DA and DB to the interpolation calculation unit 5. Interpolation calculation unit 5
Calculates the absolute position within the resolver rotor 1 / X rotation by a value of 0 to 255 by performing the calculation shown in the equation (1) based on the digital values DA and DB, and sets it as the lower data P _s .

When DA ≧ 0 and DB ≧ 0 and DA ≦ DB θ = 256 × (tan ⁻¹ (DA / DB) / 2π) When DA ≧ 0 and DB ≧ 0 and DA> DB θ = 64−256 × (tan ^-1 (DB / DA) / 2π) DA ≧ 0 and DB <0 and DA> −DB θ = 64 + 256 × (tan ⁻¹ (−DB / DA) / 2π) DA ≧ 0 and DB <0 and DA <−DB θ = 128−256 × (tan ⁻¹ (−DA / DB) / 2π) DA <0 and DB <0 and −DA ≦ −DB θ = 128 + 256 × (tan ⁻¹ (DA / DB) / 2π) When DA <0 and DB <0 and −DA> −DB θ = 192−256 × (tan ⁻¹ (DB / DA) / 2π) DA <0 and DB ≧ 0 and −DA ≧ − When DB is θ = 192 + 256 × (tan ⁻¹ (−DB / DA) / 2π) When DA <0 and DB ≧ 0 and −DA <DB θ = 256−256 × (tan ⁻¹ (−DA / DB) / 2π) The multi-rotation counter 6 determines the previous absolute position, the current absolute position, the previous multi-rotation position, and the current multi-rotation position as P _s ′, P _s , C _r ′ and C _r , respectively. Calculation shown in equation (2) Deeds, calculates the higher order data C _r is a multi-revolution position of this.

When P _s ′ −P _s ≧ 128, C _r = C _r ′ +1 P _s ′ −P _s ≦ −128, C _r = C _r ′ −1 (2) Further, the multi-rotation counter 6 is By performing the calculation shown in the equation (3), the position data P _o over a large number of rotations with high resolution is output.

P _o = 256 * C _r + P _s (3) On the other hand, as a method different from the above method, the rotation shaft of the resolver 1 is decelerated by a speed reduction mechanism instead of the multi-rotation counter 6 and the shaft angle multiplier By inputting to the axis of the 1st and 2nd resolver, the absolute position of the rotor of the resolver 1 over the range of 1 / X rotation is detected, and the value of both resolvers is combined to detect the position data over multiple rotations with high resolution. There is a way to do it.

(Problems to be Solved by the Invention) However, in the former position detecting device of the related art described above,
Since the multi-revolution counter 6 calculates based on the absolute position within 1 / X rotation of the resolver rotor at the previous time, the resolver 1 within one cycle of the synchronization signal CLK ₁ which is an excitation timing signal and a hold signal. Will be erroneously detected if is rotated more than 1 / (2X) rotations. Here, the synchronization signal CLK ₁
Where T is the upper data detection period, which is the period of R, and X is the resolver shaft angle multiplier, the maximum response speed R _MAX is as shown in equation (4).

The maximum response speed R _MAX becomes smaller when the shaft multiplication angle X is increased in order to achieve higher resolution as derived from the equation (4). Further, if the resolution of the A / D converter 4 is increased to increase the resolution, the conversion time taken by the A / D converter 4 becomes longer, so the detection cycle T becomes longer, and the maximum response speed R
_{The MAX} becomes smaller and becomes an expensive device. As described above, in a general position detecting device, there has been a problem that high resolution and high speed rotation are opposed to each other and are not compatible with each other. Further, in the latter method using a plurality of resolvers, although a plurality of resolvers can be used although they can handle high-speed rotation, the detection cycle becomes longer as the processing time such as interpolation becomes longer, and the cost is higher. In addition, there is a problem that both size and power consumption increase.

The present invention has been made under the circumstances as described above,
An object of the present invention is to provide a position detecting device for applying a pulsed excitation waveform to a resolver, which is inexpensive, small in size, and low in power consumption, which has a high resolution and can maintain high-speed rotation while maintaining a position detection cycle as it is. To provide a position detecting device.

(Means for Solving the Problem) The present invention relates to a position detection device used in a machine tool or the like for detecting a position, an angle, etc., and the above-described object of the present invention is to provide a pulse signal to a resolver. In a position detection device that detects a position by applying an excitation signal,
Sync signal generating means for generating a sync signal in synchronization with the excitation signal; and first computing means for computing position information based on a binarized value of the output of the resolver stored in synchronization with the sync signal. It is achieved by having. Further, in a position detecting device for detecting a position by applying a pulsed excitation signal to a resolver, a synchronizing signal generating means for generating a first synchronizing signal and a second synchronizing signal, and storing in synchronization with the first synchronizing signal. First computing means for computing position information based on a binarized value of the output of the resolver, and position information based on two output values of the resolver sample-held in synchronization with the second synchronization signal. Second computing means for computing
This is achieved by including arithmetic means and digit alignment arithmetic means for performing digit alignment of the respective position information obtained by the second arithmetic means to obtain a position detection value.

(Operation) In the present invention, the excitation signal of the resolver and the timing of storing the binarized value of the two outputs of the resolver are synchronized, the counting condition is determined based on the stored value, and the counting condition is determined based on the condition. Since the data is counted and used as upper data, the upper data can be detected in a cycle shorter than the limit of the conventional sample hold means, A / D (analog / digital) conversion means, and interpolation means, so that higher speed rotation can be supported. Further, the excitation signal of the resolver and the timing of sample-holding the two outputs of the resolver are synchronized, the output of the sample-hold means is A / D converted and interpolated to form lower data, and the lower data and the upper data Since the digits are aligned, it is possible to detect the position over multiple rotations with high resolution from low speed to high speed. Further, the number of the first synchronizing signals between the up or down pulses input to the counting means is counted, and the period of the synchronizing signal is changed according to the counted value, and the excitation time of the resolver depends on the frequency response of the resolver. Since it is the prescribed minimum time, unnecessary excitation to the resolver can be omitted and power consumption can be reduced.

(Example) Hereinafter, the Example of this invention is described in detail based on drawing.

FIG. 1 is a block diagram of an embodiment of the position detecting device of the present invention. 2 (A) to (M) and FIGS. 3 (A) to (L) are timing charts during high speed rotation and low speed rotation, respectively. In FIG. 1, the sample and hold circuit 3, the A / D converter 4 and the interpolation calculation section 5 have the same constructions as the conventional ones, and therefore their explanations are omitted. Therefore, first, the clock generator 17 is shown in FIGS. 2 (A) and (B).
The first synchronizing signal CLK ₀ and the second synchronizing signal CLK ₀ ′ are generated as shown in FIG. The on-time of the generated signal is the minimum constant time defined by the frequency response of the resolver 1,
The cycle changes based on the command from the oscillation cycle calculation circuit 15.
First synchronization signal output from clock generator 17
CLK ₀ is input to the excitation circuit 2, the first storage circuit 10 and the second storage circuit 11, and the second synchronization signal CLK ₀ ′ having a constant cycle is input to the sample hold circuit 3 and the third storage circuit 16. The two rotation angle signals S _a and S _b output from the resolver 1 are zero-detected by the comparator 8 and the comparator 9, respectively,
Pulse signals SA and SB as shown in FIGS. 2 (F) and (G)
Obtained as. The first memory circuit 10 uses the first synchronization signal CLK ₀
The pulse signals SA and SB are stored at the timing of 1 and are output to the second memory circuit 11 and the decoder 12 as pulse signals SA1 and SB1 as shown in FIGS. The second memory circuit 11 makes the first storage signal at the timing of the first synchronization signal CLK ₀ .
The values of the storage circuit 10, that is, the previous pulse signals SA1 and SB1 are stored and are output to the decoder 12 as pulse signals SA2 and SB2 as shown in FIGS. The decoder 12 has four inverters 121 ₁ and 121 as shown in FIG.
₂ , 121 ₃ , 122 ₄ , two NAND circuits 122 ₁ , 122 ₂ , two AND circuits 123 ₁ , 123 ₂ and a NOR circuit 124, and the first memory circuit 10 and the second memory circuit A logical operation is performed based on the values of the pulse signals SA1, SB1, SA2, SB2 input from the memory circuit 11, and the count-up pulse SU and the count-down pulse SD and 4 as shown in FIGS. The first bit P _a and the second bit P _b of the double count are output. The up / down counter 13 performs counting based on the count-up pulse SU and the count-down pulse SD input from the decoder 12, and outputs it as a count value C _s . The third memory circuit 16 delays the first bit at the timing delayed by the decoding time of the decoder 12 from the second synchronization signal CLK ₀ ′.
It stores P _a , the second bit P _b, and the count value C _s, and outputs the stored values as P _a ′, P _b ′, and C _s ′ to the digit matching arithmetic circuit 14. The digit matching arithmetic circuit 14 is configured to input the most significant bit P _m of the absolute position, which is binarized within 1 / X rotation of the resolver rotor input from the interpolation arithmetic unit 5, and the third memory circuit 16
The correction value at the turn of the increase or decrease of the upper data C _s' by using a more first bit P _a of the inputted sample hold circuit 3 of the hold timing synchronized with 4x count 'and the second bit P _b' ( 5) Based on the equation.

(▲ ▼ 'is a value obtained by inverting P _a ) Furthermore, the digit matching arithmetic circuit 14 calculates it based on (5).
The position data P _o is calculated and output by combining C _s ″ and the output P _s of the interpolation calculation unit 5. Note that P _a ′ and P _b ′ are used as the lower bits of the higher data C _s ′. By doing so, it is possible to obtain a wide range of position data with a resolution of 1/4 of 1 / X rotation of the resolver rotor without performing an interpolation calculation. Or the first between the countdown pulse SD pulses
Calculate the synchronization signal CLK _0, calculates the oscillation period of the first synchronizing signal CLK ₀ commands the clock generator 17 in accordance with the rotational speed of the rotary shaft. First in clock generator 17
The sync signal CLK ₀ is 100
It is possible to oscillate in two cycles of μS and the minimum cycle for detecting upper data of 10 μS, and the second cycle signal CLK ₀ ′ is 100 μS.
It has a fixed cycle.

FIG. 3 is a timing chart at a low speed in which the cycle of the first cycle signal CLK ₀ is 100 μS, and the lower order data can be calculated by the same processing procedure as the case of the higher order data described above.

(Effects of the Invention) As described above, according to the position detecting device of the present invention, when a resolver with a shaft angle multiplier of X is used, the upper data requires four excitation pulses for 1 / X rotation of the resolver rotor. , The upper data detection period, which is the period of the first synchronization signal CLK ₀ , is T ′.
Then, the maximum rotation speed _R'MAX is expressed by equation (6). Compared to the conventional maximum response rotation speed _RMAX , the conventional upper data detection period T is the time required for A / D conversion and interpolation. 100
On the other hand, the period T'of the present invention is 10 μS.
Therefore, the maximum response speed of the present invention is about 5 times faster than the expressions (4) and (6).

Further, it is possible to detect the position over a large number of revolutions with high resolution from low speed to high speed with only one resolver. Further, the resolver is provided with only one excitation portion, the number of excitations is reduced at a low speed, and the resolver is excited only for a time required for detection, so that power consumption can be reduced. Further, since it is composed of only one resolver and several electronic circuits, it is inexpensive and compact.

[Brief description of drawings]

1 is a block diagram of an embodiment of the position detecting device of the present invention, FIG. 2 is a timing chart at high speed, FIG. 3 is a timing chart at low speed, FIG. 4 is an internal logic circuit of the decoder 12, FIG. 5 is a block diagram showing the configuration of a conventional position detecting device, and FIG. 6 is a time chart in the conventional position detecting device. 1 ... Resolver, 2 ... Excitation circuit, 3 ... Sample hold circuit, 4 ... A / D converter, 5 ... Interpolation calculation unit, 6 ...
… Multi revolution counter, 7,17 …… Clock generator, 8, 9
…… Comparator, 10,11,16 …… Memory circuit, 12 …… Decoder, 13 …… Up / down counter, 14 …… Digit matching arithmetic circuit, 15 …… Oscillation cycle calculation circuit.

Claims (7)

(57) [Claims] 1. A position detecting device for detecting a position by applying a pulsed excitation signal to a resolver, and a synchronization signal generating means for generating a first synchronization signal and a second synchronization signal in synchronization with the excitation signal; A position detecting device, comprising: first calculating means for calculating position information based on a binarized value of the output of the resolver stored in synchronization with a first synchronizing signal. 2. The first arithmetic means is a comparator for binarizing two output values proportional to the sine value and cosine value of the rotor rotation angle output from the resolver in the previous term, and in synchronization with the sync signal in the previous term. First storage means for storing the output value of the comparator, and the first storage means in synchronization with the synchronization signal.
A second storage means for storing the storage value of the storage means;
The position detecting device according to claim 1, further comprising: a storage unit and a counting unit that counts up or down based on a pattern of each stored value stored in the second storage unit. 3. The position detecting device according to claim 1, wherein said synchronizing signal generating means is adapted to generate said synchronizing signal in response to a moving speed of said resolver. 4. A position detecting device for detecting a position by applying a pulsed excitation signal to a resolver, and a synchronization signal generating means for generating a first synchronization signal and a second synchronization signal in synchronization with the excitation signal; First computing means for computing position information based on a binarized value of the output of the resolver stored in synchronization with a first synchronizing signal; and the second computing means.
Second computing means for computing the positional information based on the two output values of the resolver sample-held in synchronization with the synchronizing signal, and the respective positional information obtained by the first computing means and the second computing means. A position detecting device comprising a digit matching calculating means for carrying out digit matching for obtaining a position detection value. 5. The first computing means includes a comparator for binarizing two output values, which are proportional to the sine value and the cosine value of the rotor rotation angle output from the resolver in the previous term, and the first synchronizing signal in the previous term. First storage means for storing the output value of the comparator in synchronization, and second storage means for storing the storage value of the first storage means in synchronization with the first synchronization signal,
The position detecting device according to claim 4, further comprising: a counting unit that counts up or down based on a pattern of each stored value stored in the first storage unit and the second storage unit. 6. The second computing means includes sample and hold means for performing the sample and hold, conversion means for converting an analog value held by the sample and hold means into a digital value, and two outputs from the conversion means. The position detecting device according to claim 4, comprising interpolation means for obtaining rotational position information of the resolver based on the value. 7. The position detecting device according to claim 4, wherein the synchronization signal generating means is configured to generate the first synchronization signal in response to a moving speed of the resolver.