JPH1056783A - Control apparatus for inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a control apparatus by which the distortion of an output current is suppressed by a method wherein one out of an upper switching element and a lower switching element is ON/OFF-controlled according to the positive polarity or the negative polarity of the output current and the switching element on the other side is operated in a control mode in which the element is set to an always truned-off state. SOLUTION: A current control means 6 outputs, to an adder 9, a voltage command signal V* at an amplitude according to a deviation signal Δi. On the other hand, a computing circuit 7a ON/OFF-controls a switching element S1, and it outputs, on the basis of an output current (i), a distortion compensation signal Vc 1 in a control mode in which a switching element S2 is always turned off. In addition, a computing circuit 7b ON/OFF-controls the switching element S2, and it outputs, on the basis of the output current (i), a distortion compensation signal Vc 2 in a control mode in which the switching element S1 is always turned off. One out of the distortion compensation signals Vc 1, Vc 2 is selected by a changeover circuit 8, outputted to the adder 9 and added to the voltage command signal V* to change a voltage command value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a control device for an inverter.

[0002]

2. Description of the Related Art Japanese Patent Publication No. 4-46073 discloses that one of upper and lower switching elements is turned on / off in accordance with the polarity of the output current.
There is a description of a voltage-type inverter device technology in which an off control is performed and the other switching element is always in an off state.

In a normal voltage-type inverter device, the upper and lower switching elements are controlled so as to repeat an upper on / lower off state or an upper off / lower on state. On the other hand, there is a case where the output current of the inverter does not flow through the on-state switching element but flows through a freewheel diode connected in anti-parallel to that element. The prior art focuses on this point, and switching elements that do not pass output current
Operate the inverter always off without turning it on.

According to this technique, since one of the two switching elements is always in an off state, it is not necessary to provide a dead time for preventing a DC power supply short circuit when turning on the other switching element. For this reason,
The use of this technique has the advantage that the problem of output voltage distortion due to the dead time or the problem of reduction in the voltage utilization of the inverter does not occur.

[0005]

However, a conventional inverter circuit is provided with a snubber circuit for protecting the switching element, and when the conventional technique is applied, a problem arises in that the output voltage waveform is distorted due to the influence of the snubber circuit. . Hereinafter, the mechanism of generating voltage distortion will be briefly described.

FIG. 5 shows an inverter circuit having a snubber circuit. Here, SN1 and SN2 are snubber circuits.
The snubber circuit has a function of suppressing an increase in the voltage across the switching element when the switching element connected in parallel to the snubber circuit is turned off. The inverter circuit including the snubber circuit operates as shown in FIG. However, here, it is assumed that the inverter output current i is always positive. For simplicity, a dead time for turning off both S1 and S2 is not considered. The operation of this inverter circuit is divided into the following four states. (State 1) In a state where S1 is on and S2 is off, the capacitor voltage is Vcs1 =
0, and Vcs2 = 2E, the output voltage is E. In this state, an output current flows through S1 as shown in FIG. (State 2) Charge and discharge periods of CS1 and CS2 after changing to S1 off and S2 on, respectively. CS2 discharges through RS2 and S2 as shown in FIG. 6 (b). CS1 is charged accordingly. The output voltage changes from E to -E. (State 3) A state in which charging and discharging have proceeded from state 2 and the freewheel diode D2 has become conductive. The capacitor voltage is Vcs1 = 2E and Vc
s2 = 0, and the output voltage is -E. In this state, FIG.
An output current flows through D2 as shown in FIG.
(State 4) Charge and discharge periods of CS1 and CS2 after changing to S1 on and S2 off, respectively. CS1 is
As shown in FIG. 6D, discharge is performed through RS1 and S1. CS2 is charged accordingly. Output voltage is -E
From E to E.

Here, when the prior art is applied, the switching element S2 which does not flow the output current in the state 3 is always turned off. However, switching element S2 is in state 2
, The discharge path of CS2 changes when S2 is always turned off. That is, the discharge path of CS2 changes as shown in FIG. 7, and CS2 discharges through RS2 and the load. The discharge time (time when the voltage changes from 2E to zero) of the capacitor CS2 is almost constant in the case of the path shown in FIG. However, when the path changes as shown in FIG. 7, the discharge time changes depending on the magnitude of the output current. Therefore, since the output voltage is affected by the voltage of CS2, the time when the output voltage changes from E to −E is also:
It is determined depending on the magnitude of the output current.

Similarly, when the inverter output current is negative, S1 is always turned off, and after S2 is turned off, the discharge time of CS1 changes depending on the magnitude of the output current. At this time, the time when the output voltage changes from -E to E is determined depending on the magnitude of the output current.

As described above, when the prior art is applied, the output voltage changes from E to -E or from -E to E when one of the upper and lower switching elements, which is on / off controlled, is turned off. Time depends on the magnitude of the output current. This delay in the voltage change results in an error in the inverter output voltage. In particular, when the output current is small, the error increases, and the inverter output voltage is distorted.

An object of the present invention is to provide an inverter circuit provided with a snubber circuit, which can control output voltage distortion even if the non-conducting side switching element is controlled to be always turned off in accordance with the output current polarity as described above. It is an object of the present invention to provide an inverter control device which does not cause the problem.

[0011]

In order to achieve the above object, the present invention provides a control mode in which an upper switching element is controlled to be turned on / off and a lower switching element is fixed to be turned off, based on an output current value. Means for determining the amount of compensation for the output voltage error, and the amount of compensation for the output voltage error based on the output current value corresponding to a control mode in which the upper switching element is fixed to off and the lower switching element is on / off controlled. , A means for selecting the compensation amount in accordance with the control mode, and a means for adding the compensation amount selected by the means to a voltage command value, wherein the voltage command value is compensated in advance for an output voltage error. Change.

In a region where the absolute value of the output current or the instantaneous value of the output current command is small, a control mode for controlling ON / OFF of both the upper and lower switching elements is newly added, and the compensation amount of the output voltage error in the mode is added. Means based on the output current, means for selecting the amount of compensation according to the control mode, and means for adding the amount of compensation selected by the means to the voltage command value. Change the value.

[0013]

FIG. 1 shows a first embodiment of the present invention.

Hereinafter, the configuration of the first embodiment will be described. In FIG. 1, reference numeral 1 denotes a voltage type inverter, and reference numeral 2 denotes a load device driven by the inverter 1. In the inverter 1, the self-extinguishing type switching elements S1 and S2 are connected in series as shown. A freewheel diode D1 is connected to the switching element S1 in anti-parallel, and a snubber circuit SN
1 are connected in parallel. The snubber circuit SN1 is a resistor RS1
The capacitor CS is connected to the parallel connection circuit of
1 are connected in series. Similarly, a freewheel diode D2 is connected in antiparallel to the switching element S2, and a snubber circuit SN2 is connected in parallel with the polarity shown. The snubber circuit SN2 is connected to a parallel connection circuit of a resistor RS2 and a diode DS2,
Are connected in series. A connection point between the switching elements S1 and S2 is set as an output terminal of the inverter 1. The load 2 is connected between the output terminal and a connection point between the DC voltage sources E1 and E2. DC voltage sources E1 and E2 each generate a voltage E and are connected in series as shown. The positive terminal of the DC voltage source E1 is a switching element S1.
, And the negative terminal of the DC voltage source E2 is connected to the negative terminal of the switching element S2. The current detector 3 detects an output current i of the inverter 1. The current command circuit 4 generates a current command signal i ^* . The adder 5 calculates a deviation i ^* −i between the current command signal i ^* and the output current i and outputs a deviation signal Δi. The current control means 6 outputs a voltage command signal V ^* having an amplitude corresponding to the deviation signal Δi. Arithmetic circuit 7
a outputs a distortion compensation signal Vc1 based on the output current i in a control mode in which the switching element S1 is on / off controlled and S2 is always off. The arithmetic circuit 7b outputs a distortion compensation signal Vc2 in a control mode in which the switching element S2 is on / off controlled and S1 is always off, based on the output current i. The switching circuit 8 is controlled by selection signals SS1 and SS2 described later,
One of c1 and Vc2 is selected, and a distortion compensation signal Vc is output. The adder 9 includes a voltage command signal V ^* and a distortion compensation signal Vc.
Is calculated and output. The comparator 11 compares the sum (V ^* + Vc) of the voltage command signal V ^* and the distortion compensation signal Vc with the carrier signal T output from the carrier generation means 10 and outputs a pulse signal 111 pulse-modulated. I do. The inverting circuit 12 outputs an inverted signal 121 of the pulse signal 111. The selection circuit 13 outputs signals SS1 and SS2 for selecting a switching element to be always turned off in accordance with the polarity of the current command signal i ^* . AND circuit 14a
Outputs the logical product of the PWM pulse signal 111 and the selection signal SS1, and the output signal is connected to the gate terminal G1 of the switching element S1 via the gate circuit 15a. Also,
The logical product circuit 14b outputs a logical product of the signal 121 and the selection signal SS2, and the output signal is connected to the gate terminal G2 of the switching element S2 via the gate circuit 15b.

In the first embodiment, the output voltage of the voltage type inverter is changed to control the inverter output current.
Hereinafter, the operation of the current control will be described. First, the current flowing from the connection point of the switching elements S1 and S2 toward the load 2 is defined as the inverter output current i, and the direction from the connection point of S1 and S2 toward the load 2 is defined as positive. A sine wave signal of the following equation is given as a current command value i ^* of the output current.

I ^* = I · sin (ωt + θ) where I is the amplitude, ω is the angular frequency, and θ is the initial phase.
In order for the output current i to follow the current command value i ^* , the current control means 6 determines the deviation Δi between the current command signal i ^* and the detection signal i.
And outputs a voltage command signal V ^* corresponding to. Actually, as the current control means 6, a proportional controller that outputs a voltage command signal proportional to the deviation Δi, or a sum of an amount proportional to the deviation Δi and an amount proportional to the integral value of the deviation Δi is used as the voltage command signal. A proportional-integral controller is used. The sum of the voltage command signal V ^* and the distortion compensation signal Vc is compared with the carrier signal T by the comparator 11. The comparator 11 is 1 if (V ^* + Vc)> T holds.
Otherwise, 0 is output as the pulse width modulation signal 111. On the other hand, the selection circuit 13 selects the control mode of the switching element according to the positive / negative polarity of the current command signal i ^* . Specifically, when the current command signal i ^* is positive, SS1 = 1 and SS2 = 0 are output in order to perform a control mode in which S1 is turned on / off and S2 is always turned off. When i ^* is negative, SS1 = 0 and S1 to control the on / off state of S2 and set the control mode to always turn off S1.
S2 = 1 is output. Note that when the polarity of the current command signal i ^* changes, SS1
Alternatively, a delay is provided when SS2 rises from 0 to 1 to create a period where SS1 = SS2 = 0. AND circuit 1
4a calculates the logical product of the selection signal SS1 and the pulse width modulation signal 111, and connects the output to the switching element S1 via the gate circuit 15a. Similarly, the AND circuit 14b outputs the selection signal SS2 and the inverted signal 121 of the signal 111.
Is calculated, and its output is connected to the switching element S2 via the gate circuit 15b. Here, it is determined that when the output of the logical product is 1, the switch is on, and when it is zero, the switch is off. As described above, the on / off control of the switching element of the inverter 1 controls the output current i of the inverter 1 to follow the current command signal i ^* .

In the first embodiment, distortion compensation control is performed to prevent the occurrence of voltage distortion due to an output voltage error.
Hereinafter, the distortion compensation control according to the first embodiment will be described. In the first embodiment, when the pulse width modulation signal 111 changes as shown in FIG. 2A, the output voltage Vout of the inverter changes with a delay due to the influence of the snubber circuit. Current command i
^* > 0, that is, when SS1 = 1 and SS2 = 0, as shown in FIGS. 2B and 2C, the fall time (change from E to −E) of the output voltage is equal to the output current. It becomes longer as i is closer to zero. Conversely, when the current command i ^* <0, that is, when SS1 = 0 and SS2 = 1, FIG.
As shown in (e), the rise time (change from -E to E) of the output voltage becomes longer as the output current i approaches zero. Because of these voltage change delays, the output voltage has an error with respect to the command. Here, when the distortion compensation signal Vc is set to zero, a voltage error occurs depending on the control mode of the switching element and the output current value. Therefore, even if a sine wave signal is given as a voltage command, the output voltage will be distorted as shown in FIG. Therefore, in the present invention, output voltage distortion is reduced by performing feedforward compensation in which the distortion compensation signal Vc corresponding to the above-described control mode is added to the inverter voltage command V ^* . The compensation signal in each control mode is calculated by the arithmetic circuit 7
Calculated based on the output current value by a and 7b. The switching circuit 8 includes a switch 81 that selects Vc1 when SS1 = 1, and a switch 82 that selects Vc2 when SS2 = 1, and a distortion compensation signal V corresponding to the control mode.
Output c. When this compensation signal Vc is added to the voltage command, the distortion component of the output voltage is canceled and the output voltage becomes a sine wave.

It should be noted that the closer the absolute value of the current i is to zero, the longer it takes for the rise / fall of the output voltage to increase, so that the output voltage error increases. For example, when the current command i ^* > 0, the closer the absolute value of the current i is to zero, the slower the output voltage changes from E to −E. High voltage is output. Therefore, as shown in FIG. 3, the value of the distortion compensation signal Vc1 is set to be larger on the negative side as the current i is smaller. Similarly,
The distortion compensation signal Vc2 is set such that the smaller the current i is, the larger the compensation amount becomes on the positive side.

FIG. 4 shows the configuration of a second embodiment of the present invention. In the first embodiment, there is a possibility that distortion compensation becomes difficult because the output voltage error increases as the current value decreases. Therefore, in the second embodiment, the control mode of the switching elements is changed so that both switching elements are turned on / off in a region where the output current is close to zero. As a result, the output voltage error does not increase when the current is low, so that the amount of distortion is reduced.

Hereinafter, the configuration of the second embodiment will be described. The parts different from the first embodiment will be described. The arithmetic circuit 7c outputs the distortion compensation signal Vc3 in the control mode in which both the switching elements S1 and S2 are on / off controlled.
Is output based on the output current i. The switching circuit 8 selects one of the three distortion compensation signals Vc1, Vc2, and Vc3 and outputs the distortion compensation signal Vc in accordance with each control mode.
The selection circuit 13 selects a control mode according to the value of the current command i ^* . The selection circuit 13 sets SS1 = 1 when the current command i ^* is larger than -Ic, and sets it to 0 when the current command i ^* is smaller. If the current command i ^* is smaller than Ic, SS
2 = 1, and 0 if larger. That is, when the current command i ^* is between -Ic and Ic, SS1 and SS1
2 is 1 and both switching elements S1 and S2 are on / off controlled.

The operation of the second embodiment will be described. In the control mode in which both switching elements are on / off controlled,
Time when both switches are off (dead time)
The gate amplifiers 15a and 15b delay the timing at which the gate signal rises from off to on by a predetermined time. In order to compensate for the output voltage distortion due to the dead time, the arithmetic circuit 7c outputs a signal Vc3 for compensating the dead time distortion. The switching circuit 8 in the second embodiment is constituted by a logic circuit and a switch. In a control mode in which S1 is turned on / off and S2 is always turned off, the distortion compensation signal Vc1 is selected, and S2 is turned on / off to control S1. The operation is such that the distortion compensation signal Vc2 is selected in the control mode that is always off, and the distortion compensation signal Vc3 is selected in the control mode in which both S1 and S2 are on / off controlled. By adding the selected compensation signal to the voltage command, the distortion of the output voltage in each control mode of the switching element is canceled, and the output voltage becomes a sine wave.

Since the output current i is controlled so as to follow the current command value i ^* , the input signals of the arithmetic circuits 7a to 7c in the first and second embodiments are not limited to the output current i. It is possible to calculate the compensation signal using the value i ^* .

The same effect can be obtained by applying the present invention to an inverter capable of outputting not only two levels but also three or more levels of voltage.

In this specification, the structure and operation are described using an electric circuit and an analog signal in order to make the description easy to understand. The effect of the present invention is the same even if it is operated.

[0025]

According to the present invention, the voltage type inverter having the snubber circuit controls on / off of one of the upper and lower switching elements according to the positive / negative polarity of the output current, and the other switching element is always in the off state. Even when the operation is performed in the control mode, the output voltage distortion can be compensated because the distortion compensation signal corresponding to the control mode is added to the voltage command. for that reason,
Output current distortion can be suppressed, and fluctuations in the output torque of the motor can be prevented.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a voltage-type inverter control device showing one embodiment of the present invention.

FIG. 2 is an output voltage waveform diagram in the embodiment of FIG.

FIG. 3 is an operation waveform diagram in the embodiment of FIG.

FIG. 4 is a circuit diagram of another embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional voltage-type inverter device including a snubber circuit.

FIG. 6 is a circuit diagram of the inverter device shown in FIG. 5;

FIG. 7 is a circuit diagram in a case where control is performed such that a non-conducting side switching element is always fixed to OFF in accordance with an output current polarity;

[Explanation of symbols]

1: Inverter circuit, SN1 to SN2: Snubber circuit, 2
... Load, 3 ... Current detector, 4 ... Current command circuit, 5 ... Adder, 6 ... Current control means, 7a-7c ... Compensation amount calculation circuit,
8 switching circuit, 9 adder, 10 carrier generation means, 1
DESCRIPTION OF SYMBOLS 1 ... Comparator, 12 ... Inverting circuit, 13 ... Selection circuit, 14a
１４14b: AND circuit, 15a〜15b: Gate circuit

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor ▲ Taka ▼ Junichi Hashimi 5-2-1, Omika-cho, Hitachi City, Ibaraki Prefecture Inside the Omika Plant of Hitachi, Ltd.

Claims (7)

[Claims] 1. A voltage-type inverter device including a plurality of switching elements connected in series to a DC power supply and controlling on / off of the switching elements to control an average output voltage, when an output current has a positive polarity. A first mode in which a switching element between the negative terminal of the DC power supply and the output terminal is fixed to an OFF state, and a positive terminal of the DC power supply and the output terminal when the polarity of the output current is negative. Control means for controlling the switching mode between the first mode and the second mode for fixing the switching element in an off state, and means for obtaining a compensation signal for an output voltage error in each of the first mode and the second mode based on an output current value Means for adding the compensation signal to a voltage command value corresponding to each of the control modes, wherein the voltage command signal is pulse-width modulated, and the switching element Controller of the inverter and controls the on / off. 2. A voltage type inverter device including a plurality of switching elements connected in series to a DC power supply and controlling on / off of the switching elements to control an average output voltage, wherein the polarity of the output current is positive and the output current is Is larger than the predetermined value Ic1, the first mode in which the switching element between the negative terminal of the DC power supply and the output terminal is fixed to the off state, and the polarity of the output current is negative and the output current Is smaller than the predetermined value Ic2, the second mode in which the switching element between the positive terminal of the DC power supply and the output terminal is fixed to the OFF state, and the instantaneous value i of the output current
And the predetermined values Ic1 and Ic2 satisfy Ic2 <i <Ic1.
If the above condition is satisfied, control means for controlling to a third mode for stopping fixing any of the switching elements to the off state, and a compensation signal for an output voltage error in each of the first, second, and third modes And a means for adding the compensation signal to a voltage command value corresponding to each of the control modes. The voltage command signal is subjected to pulse width modulation to turn on / off the switching element. An inverter control device for controlling turning off. 3. An output current value according to claim 1, wherein each of the control modes is such that a switching element between the output terminal and a positive terminal or a negative terminal of the DC power supply is fixed in an off state. Means for obtaining a compensation amount according to the following formula: a controller for an inverter that increases the compensation voltage as the magnitude of the instantaneous value of the output current approaches zero. 4. The switching method according to claim 1, wherein the polarity of the output current changes to switch from the first mode to the second mode, or vice versa, the switching changing from off to on. The element is an inverter control device that delays the rise from off to on for a predetermined time. 5. The inverter control device according to claim 2, wherein when the third mode is selected, a rise of the switching element from off to on is delayed by a predetermined time. 6. The method of claim 1, 2, 3, 4, or 5,
Means for generating a signal corresponding to the output current value,
An inverter control device for obtaining a compensation signal for an output voltage error using the signal instead of the output current. 7. The output current command according to claim 6, further comprising: a current command generating means for generating an output current command which is a target value of the output current; and a current control means for causing an output current to approach the output current command value. An inverter control device characterized in that a signal is a signal corresponding to an output current value, and a compensation signal for an output voltage error is obtained by using the signal instead of the output current.