JPH1056611A - Video copy protecting processing and its cancel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To strengthen a copy protecting processing and to remarkably reduce an amusement value of an illegal copy by performing a horizontal and/or a vertical deformation and/or a horizontal synthesizing pulse narrowing processing to a video signal. SOLUTION: A television image 12 includes overscan sections 14 and 16. The light side overscan section 16 is provided with a checker pattern comprising a gray rectangle 24 and a black rectangle 26 to alternately appear. Copy protection is strengthened by this checker pattern information 24 and 26. On the display of the image 12 at a standard TV set, a checker pattern 20 exists in the overscan area 16 so as not to be visually watched. The vertical signal deformation is inserted into a lower overscan area 9 so as to disable visual watching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video copy prohibition process, and the video copy prohibition process degrades the image quality when a copy of a protected record is reproduced, and further reduces the protected record. When recorded illegally, it reduces the appreciation.

[0002]

2. Description of the Related Art Video prohibition processing is well known. As an example, referenced here issued on December 23, 1986
Ryan, U.S. Pat.No. 4,631,603, states, "While video signals are distorted and television set receivers produce normal color images from the distorted video signals, video tape recording of the distorted video signals is generally The automatic gain control system of a typical videocassette recorder employs a spurious image with a normal sync pulse (including an equalizing pulse and a wide pulse) of a normal video signal. The invention is based on the fact that it is indistinguishable from a sync pulse, where a pseudo sync pulse is a pulse other than a normal pulse, which extends to a normal sync chip level and has a duration of at least 0.5 microsecond. A plurality of such pseudo sync pulses are added to the normal video signal during the vertical blanking period and the pseudo sync pulse Each pulse is followed by a positive pulse of suitable amplitude and duration. As a result,
The automatic gain control system of the videotape recorder incorrectly measures the video level and the recording of the video signal is not proper. The result is an image quality that cannot be used during playback. (See abstract).

Beginning at the fifth row of the second column, additional pulse pairs (each pair consisting of a negative going pseudo sync pulse and a positive going "AGC" pulse) are signaled to the video tape recorder's automatic level ( It is stated that the gain control circuit can detect incorrect video signal levels and perform gain correction, resulting in unusable videotape recordings.

[0004]

Accordingly, this prior art "basic copy prohibition process" causes an abnormally low amplitude video signal to be recorded when a copy is attempted. When an illegal copy is reproduced, effects such as horizontal division (position shift) and vertical image shift are observed. Whether this occurs depends on the content of the image, i.e. the presence of white (light) and black (dark) regions of the image. Thus, while this prior art process generally provides excellent copy protection, some users may be willing to have lower image quality depending on the combination of video tape recorder (such as a VCR) and a television set. Provides an image that can be viewed.

[0005] In a specific combination of a VCR and a TV set, various copy protection processes according to the known prior art hardly cause image quality deterioration. In some markets for recorded video products, despite copy protection, the rate of piracy, i.e., illegal copying of video tapes, is high, and viewers are clearly aware of the illegality of prior art copy protection processes. I do not mind the low image quality of the copy. Therefore, it is required to enhance the copy protection processing that degrades the image quality more than the processing of the related art.

There is also a need for a method of releasing the copy protection process.

[0007]

In accordance with the present invention, the prior art "basic" copy protection process described above is enhanced by further modifying the video signal in several ways. Ensure that image content requirements are met to maximize the effect of Further variations are: (1) blanking the active video portion in the overscan area of the image immediately before the horizontal or (2) vertical sync signal occurs, and (reduced) to the blanked portion. Amplitude video signal)
This involves inserting a waveform that is recognized as a synchronization signal into the TV set or videotape recorder, thereby causing the VCR or TV set to erroneously synchronize. By performing this modification only on a particular video line or field, it is possible to bring about sufficient image quality deterioration for illegal copying. Further variations that narrow the horizontal sync pulse also result in the detection of spurious vertical sync signals in TV sets, affecting certain video tape recorders.

In horizontal deformation, the right edge of the image is
It is replaced by a "checker" pattern that appears in black and gray squares (like a checkerboard). The width of this checker pattern is chosen so that it is within the overscan (invisible) portion of the image when displayed on a standard television set receiver. If the image content is light (such as mid-gray) when the signal amplitude is unusually low, the left edge of the black square of a video line will appear as a negative (toward blanking level) transition early in the horizontal. It will be appreciated that it causes retrace. When the image content is dark, the right edge of the gray square (adjacent to the dark image area) will cause an early retrace on each video line in some video lines, again as a negative going transition. (The description of the video waveform here follows the convention that the positive amplitude is white and the negative amplitude is black.) In one embodiment, the horizontal deformation checker pattern is at a rate slightly deviated from the repetition rate of the video field. The generated checker pattern acts to move the image up or down slowly, with any point moving from the bottom of the image to the top, or vice versa, at a rate of about 1 second. When the original (legal) cassette is played, this checker pattern has no effect on the image, since there are no abnormal signal conditions in any way in the TV set.

However, when an illegal (unapproved or illegally copied) copy cassette is reproduced using a video tape recording device, the signal attenuation due to the copy protection processing according to the prior art described above causes the signal attenuation with the checker pattern. The combination causes an early horizontal retrace of the television set where black or gray squares are present in each video line, depending on the characteristics of the video tape recorder and the TV set and the image content.
Each of the black and gray checkers can provide a sufficient amplitude transition, depending on the content of the preceding active video image. If the image content is bright (white), the left edge of the black checker causes a negative going transition to black. If the image content is dark, the right edge of the gray checker causes a negative going transition from gray to a subsequent dark area (typically a blanking level). The difference between the lines ending in black or gray alternately causes a horizontal shift of the image information, i.e. a wobble that slowly moves the image up or down.

The tendency of the television set to retrace (perform early horizontal flyback) is a light-to-dark transition (the left edge of the black checker or the black checker) prior to the location of the true horizontal line sync signal in the video line. (Right edge of gray checker). The early retrace thus caused is that the image information of the following line is moved forward, i.e. the horizontal right direction corresponding to the distance between the negative transition and the position of the leading edge of the real horizontal synchronization signal. Causes a shift to This shift causes a “segmentation” (rearrangement of the horizontal position) of the image information.

A somewhat similar variant in the vertical image sense is that in the lower overscan portion of the image immediately before the vertical blanking period, the last few lines of the selected video field have the active video location, or / Or
Insert alternating dark and white bands up to the first few lines of the vertical blanking period. This vertical rate deformation is achieved in several ways. In one embodiment, several (about 5) active video lines immediately before the vertical sync signal are at a rate of about 1 to 5 cycles per second.
Alternating between blanking levels and gray levels (typically about 30% of peak white). This is the release of the drum servo lock in the video tape recorder for copying,
Alternatively, resulting in erroneous vertical retraces in the TV set, the pirated image shows vertical instability (up and down jumps) at a certain rate, and the image quality is significantly degraded. In another embodiment, two to five alternating (modulated) white-black-white lines are:
Inserted at the end of each or every other video field, a videotape recorder for copying or an ornamental TV
The same result of loss of vertical lock in the set is obtained because the insertion pattern is recognized as a vertical synchronization signal when the AGC response to the copy protection signal reduces the amplitude of the video signal.

Both of these vertical deformations in another embodiment are extended to the first few lines of a subsequent vertical blanking period. Inserting a pulse in the video signal portion after a normal horizontal or video sync pulse results in abnormal video retrace at this insertion point, and thus is an effective enhancement of the prior art basic copy inhibit process. I have. Typically, these added post-sync pulses are, for example, on lines 22 to 24 of the NTSC television signal.

Therefore, the processing according to the present invention is not suitable for (1) reproduction quality of illegal copies and (2) recording and reproduction functions of a video tape recording apparatus, and optimization of image contents that causes a maximum level of subjective deterioration. Guarantee the conditions. In response to the horizontal and vertical deformations, the television set incorrectly performs a horizontal or vertical retrace at the abnormal point. In the same way that TV sets incorrectly recognize this signal, both the recording videotape recorder during copying and the reproducing videotape recorder during reproduction are affected. In this case, the color circuit of the video tape recording device is affected, and as a result, an image that is more deteriorated than the basic copy prohibition process is obtained. This is a further added effect to what has been described so far. This is due to the special way video tape recorders process color information. This image degradation includes inaccurate color reproduction and intermittent or continuous color loss. Therefore, the purpose of the deformation is more than the image quality deterioration due to the copy protection processing according to the basic prior art described above.
The further elimination of the value of piracy as entertainment.

A third variation of the video signal involves narrowing the horizontal sync signal. In combination with a re-recorded (copied) copy protected video signal with reduced signal amplitude,
This narrowing process causes the video tape recorder or TV set to detect a false vertical sync signal, causing vertical retrace at locations other than the start of the field, thus further degrading image quality. This variation is based on the video field identification (2
The width (duration) of the horizontal synchronizing pulse is narrowed in a line of 50 to 262). These narrowed horizontal sync pulses, when combined with reduced amplitude video signals, cause spurious vertical retraces in many TV sets and video tape recorders, further degrading display quality. Narrowing the horizontal synchronization pulse where the checker pattern exists (line 10 to 250) also increases the degradation due to the checker pattern when an illegal copy is made.

The image quality deterioration according to the present invention is particularly effective when the basic copy protection processing according to the prior art causes a relatively small image quality deterioration or a relatively small deterioration in recording or reproduction of a video tape recording apparatus. I know there is. Thus, by combining the prior art processing with the processing of the present invention, the entertainment value of illegal copying is increased for more combinations of videotape recorders and TV receivers than with the basic prior art processing alone. Is greatly reduced.

Applying the horizontal checker pattern or vertical deformation only to the overscan portion of the television image ensures that the checker pattern or vertical deformation is not visible when the original recording or signal is viewed,
Of course, its existence is not known to those who watch the original record. In another embodiment, the person performing the processing may sacrifice the image area to enhance the effect (the appearance of the processing when the legal recording is played back may be sacrificed to increase the copy-inhibiting effect. Can be done). Therefore, the deformation may be extended to the visible portion of the video field by breaking the standard of broadcast TV, and there is no problem in many cases in practical use. Further, in another embodiment, the process chooses to deviate from acceptable signal standards to further increase the effect of copy prohibition.

Any modified signal is normally displayed on a TV receiver or monitor, provided that the signal has the normal amplitude. When the amplitude of the deformed signal is reduced, as in the case of piracy, an optimal state is obtained for the TV receiver to display the degraded image or for the video tape recorder to reproduce the degraded image. This is a back-to-back using two video tape recorders.
In the context of videotape record copying, this occurs when the basic copy prohibition process of U.S. Pat. No. 4,631,603, referenced above, is being applied (illegally) to the copied record.

The video signal modification according to the present invention causes a lack of horizontal or vertical stability in the TV receiver, and also in recording and playback for a typical video cassette (video tape) recorder as described above. It also has a similar effect. The VCR uses the leading edge of the horizontal sync signal to correctly position the burst gate. If the burst gate is incorrectly positioned, the color burst will not be sampled properly, resulting in color loss or color distortion. Horizontal deformation leads to false detection of the leading edge position of horizontal synchronization. This is the VC used to record and play back (copy protected) copies.
R, resulting in color loss and distortion. This effect can occur independently in the TV set.
TV sets tend to lose vertical lock as a result of this process, as do VCRs. The result is a loss of drum servo lock in the VCR.

The variants described here ensure that the necessary conditions for maximum image quality degradation always exist, and rely on the chance that those conditions are met (specific images are displayed). is not. Thus, the above-described processes, including the horizontal and / or vertical deformation and / or horizontal sync pulse narrowing processes, are of great value in enhancing the above-described basic prior art copy protection processes, and are more general. In addition, it enhances any copy protection process that reduces the amplitude of the recorded video signal when an illegal copy is attempted. Another embodiment for increasing the horizontal jitter in pirated videotape is in the range of about 1-2 microseconds after a color burst, at about -2.
0IRE amplitude (-40IRE is equal to normal sync amplitude)
Uses a post-horizontal pseudo-sync pulse about 1-2 microseconds wide.

Although the embodiment described herein is used for the NTSC television standard, those of ordinary skill in the art will appreciate that this variant is applicable to the SECAM and PAL television standards. Clearly there is.
Further, several methods and apparatus are described herein in accordance with the invention that allow for unobstructed copying and viewing by removing or "breaking" the video signal distortions described above. In one embodiment, the breaking method and apparatus breaks the sync pulse narrowing deformation by replacing or level shifting the vertical and horizontal deformation pulses with a fixed level gray signal, and further spreading or replacing synchronization.

In other variations, the breaking method uses an added pre-horizontal sync pulse, post-horizontal sync pulse, or attenuated averaging. Further, a new method for breaking the prior art basic video copy inhibition process is described.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION

Horizontal Rate (Checker) Signal Variation FIG. 1A shows a normal television image 10 (without showing the actual video information), where the television image 10 has a left and right overscan portion 14 and 16 and upper and lower overscan portions 7 and 9. The image portion inside the dotted line 13 is the visible video 11.

As is well known, the overscan portion of a television image is that portion of the television image that is not found on a standard television set. In consideration of design restrictions and beauty when viewing,
The standard TV set is adjusted by the manufacturer to display somewhat less than 100% of the transferred image area. The portion of the television image that is not normally visible is called the overscan area. These areas can be viewed on a specialized type of video monitor with underscan capability. However, since all standard television receivers operate in overscan mode, checker patterns and deformed lines added at the end of each field are not visible on television receivers sold in the United States and elsewhere. Can not do.

FIG. 1B shows a modified television image 12 according to a modification of the invention, which television image 12 includes overscan portions 14 and 16.
The right overscan portion 16 is provided with a checker pattern including a gray square 24 and a black square 26 that appear alternately. This checker pattern information 24 and 26 provides enhanced copy protection as described below. In the display of the image 12 of the standard TV set, the checker pattern 20 cannot be seen because it is in the overscan area 16. A vertical signal deformation is inserted in the lower overscan area 9 and thus cannot be seen as well.

FIG. 2A illustrates a video field 30 that includes left and right overscan portions 32 and 34 and that includes a vertical and horizontal image element 38 (eg, a cross) in the active video 36. This field 30 is according to the present invention, and the checker pattern and the vertical deformation signal are:
Obviously not included. It is also an unreduced signal amplitude, i.e. one without prior art copy protection processing.

FIG. 2B shows a checker pattern 42 added with an overscan area 34 outside the boundary 13.
And a vertical deformation pattern 87 added to the lower overscan portion 9. Because of the normal signal amplitude, the checker pattern 42 and / or the vertical pattern 87 have no effect on the appearance of the normally displayed cross 38. It should be understood that FIG. 2B shows what appears on a monitor showing the overall area but not on a conventional television receiver.

It is not possible to show in a graphical representation the effect of these signals on the VCR. TV sets exhibit artifacts due to abnormally low signal amplitude, and the VCR used to record and play back the copy is also affected.
In this case, the servo system of the VCR is affected and generates a positionally unstable image. FIG. 3A shows an image 50 obtained from a reduced signal amplitude in a relatively insensitive VCR according to the prior art copy protection process, but without adding a checker pattern.
This figure shows only the actually visible part of the image on the standard television receiver (inside the boundary 13 in FIGS. 2A and 2B). As can be seen from the figure, the crosses 38 are displayed normally, because the image content in this case is such that horizontal displacement does not occur. This is,
This is a case where only inappropriate copy protection is obtained by the copy protection processing of the related art, and the image is of course viewable.

FIG. 3B shows the effect when the checker pattern 42 is used when the signal amplitude is reduced, that is, when the conventional copy protection processing is used together with the checker pattern. As before, the overscan portion is not shown in FIG. It can be seen that the cross 38 has undergone a number of horizontal "breaks" 43, which occur where the checker pattern 42 transitions from the gray checker 46 to the black checker 44 (and vice versa) in FIG. I do. As shown in the enlarged view of FIG. 3 (C), the vertical portion 43 of the cross 38 is located at the left edge of the black area 44 of the checker pattern and the position of the true horizontal synchronization signal (not shown) of each line. Is shifted in the horizontal direction by an amount depending on the distance. Clearly, the image 50 of FIG. 3B is sufficiently degraded. This effect is achieved by the checker pattern 42
Is further increased by moving vertically at low speed (not shown), and the horizontal shift appears to move, i.e., shake. This provides a substantially non-viewable image, i.e., sufficient copy protection.

According to the present invention, the checker pattern 42 of FIG. 2B typically includes five black squares 44,
Each alternates with a middle gray square 46 (for clarity FIG. 2B shows fewer squares than actual). It has been found that maximum image degradation occurs when there are approximately five gray-to-black transitions and five black-to-gray transitions in the vertical direction of an image.

The signal level of the black square 44 is set between the blanking level and the black level for NTSC (the black level and the blanking level are the same for the PAL or SECAM signal). And SECAM are set to the black level, and the amplitude of the middle gray square 46 is about 30% of the peak white level. As shown in FIG. 3B, the checker pattern 42 generates a zigzag type pattern, but in other embodiments, there is only one black square 44, or two, three, four, and even more. May have more black squares 44 provided per field in FIG. Further, the size (height and width) of the black square 44 does not need to be uniform.

In an environment where the video signal amplitude is low, the negative going transition, that is, the transition from the current image level to the black level at the start of the black direction 44, is made before the horizontal sync signal on at least one line of the image. By providing, this process causes an early horizontal retrace. FIG.
The checker pattern 42 shown in (B) is a pattern that provides a desired effect.

The typical duration (width) of the checker pattern 42 is about 1.0 to 2.5 microseconds, which means that the checker pattern is not normally inserted into the display portion of a standard television picture, ie, overscan. Limited to part, determined by requirement not to violate normal horizontal blanking period. In another embodiment, the horizontal sync pulse is narrowed, allowing the checker pattern to widen. This results in a larger horizontal shift when a low amplitude video signal is displayed, but results in a non-standard original video signal that can be used in some non-broadcasting applications.
Also, the amplitude of the middle gray 46 and / or the black square 44 is
It need not be exactly as described above. The effect of the relative position change of the leading edge of the horizontal sync pulse and the color burst can be corrected by corresponding realignment and / or extension of the color burst.

FIG. 4 shows the horizontal blanking period 60 of a single video line, along with the location where the checker pattern exists. Horizontal sync pulse 62 typically begins 1.5 microseconds after the start of horizontal blanking period 60. Active videos 66 and 68 are before and after horizontal blanking period 60. However, in accordance with the present invention, the portion 70 of the active video 66 immediately before the horizontal blanking period 60 is replaced by either an intermediate gray level signal 74 or a black level signal 76 (both the gray level 74 and the black level 76). Both are shown in FIG. 4 for illustration). Active video 66 part 70
Loss is not a problem because, as described above, in a standard television receiver, this portion of the active video is invisible to the overscanned portion of the image.

The transition 80 from the active video level 66 to the black level 76 is perceived by the television receiver as a horizontal synchronization signal. This effect (as described above) only occurs when the signal amplitude displayed for copy protection processing is reduced. The presence of gray level 74 (the gray part of the checker) ensures that the entire image does not shift to the right. For example, the above phenomenon occurs when a black stripe exists on the right side of the image. The alternating gray and black levels produce the zig-zag effect shown in FIG. 3B, which has been found to be virtually unappreciable for everyone. FIG. 4 also shows a normal color burst 82 present on the back porch 84 during the horizontal blanking period 60.

It can be seen from FIG. 4 that the only variation to the video signal is the removal of a small portion of the active video 70 and the insertion of either the gray level 74 or the black level 76 at that location. right. The above enhancement to introduce the sway moves the checker pattern at low speed from bottom to top of the image or vice versa. It has been found that if a transition takes about one second from the bottom of the image to the top of the image, it can maximize the entertainment value of the image. The effect of this moving wobble is obtained by slightly shifting the frequency of the square wave producing the checker pattern from the fifth harmonic of the field rate, ie from 295 Hz to 305 Hz for NTSC television. The corresponding frequency for PAL or SECAM systems is 245Hz to 255Hz. This deviation from synchronization results in the desired slow motion of the checker pattern. As described above, even if the checker pattern is steady without such a deviation from synchronization, the processing of the present invention has a sufficient advantage. The frequency of the signal generating the checker pattern can be adjusted to maximize image quality degradation when the low amplitude signal is reproduced and displayed. NT
180Hz to 360Hz for SC, 150Hz for PAL
Frequencies from to 300 Hz (3 to 5 times the field rate) usually provide the optimal effect. This frequency is
It may be changed over time to ensure optimal effects on various playback and display devices.

In another embodiment, the checker pattern is located on the front porch during the horizontal blanking interval, ie, does not replace any portion of the active video. This reduces the amount of horizontal misalignment somewhat, but at least retains some of the desired effect, and results in a signal that retains all image information but does not fully meet the NTSC standard.

The checker pattern does not need to be present in every field. Vertical Rate Signal Modification The above description is for horizontal image information, and the video signal modification and the effects resulting from this modification exist in the horizontal image direction. In the following, the related vertical rate deformation described above will be further explained.

Vertical deformation takes several forms. In one embodiment, for groups of one to four lines in the lower overscan portion of the video field,
The active video is alternately replaced with white or black. In another embodiment, the last few video lines immediately before the vertical sync pulse and the first few lines of the subsequent vertical blanking period are blanked, and the original image video and vertical sync pulse there were high. Level (mid gray or actual peak white which is about 30% of peak white) or low (range black to blanking level)
1 (B) and FIG.
It is replaced as shown at 87 in (B).

The deformed active video line corresponds to the overscan area 9 at the bottom of the image shown in FIG.
These vertical deformations are invisible to the viewer because they are limited to lines within (and, given the video from the VCR, the deformed lines are in a position similar to the position of the head switch point). , Because of the head switch point and the subsequent disturbance, the video of those lines cannot be used anyway).

As is well known in standard NTSC video signals (or other standards), each of the first three lines of a vertical blanking interval contains two equalizing pulses, followed by the next three lines. Each contains two "wide" vertical sync pulses. Normally, vertical retrace begins shortly after the first vertical sync pulse. An example of the first vertical deformation is shown in FIG. 5A (where the line numbers indicate the second field of the NTSC video frame). Lines 517, 5
The active video portions of 18 and 519 are replaced by peak white (nominal 1.0 volt) signals, and the same is done on lines 523, 524 and 525. Instead of a group of three lines, the group may have zero to five lines or more, and the white and black signals may be modulated or switched in amplitude. Therefore, in the last few lines of each field, the pattern of the white and black signals dynamically changes between fields.

Example of Second Vertical Deformation (FIG. 5B)
Is the last two active video lines of the video field (eg, lines 524 and 525) and the first three lines of the immediately following VBI (eg, lines 1, 2,.
Blank out 3). These two active lines are in the lower overscan area 9 of the TV image (FIG. 23)
Exists. And the middle gray (peak white 30
%) Video signal 87 is generated and periodically inserted into those five blanked lines. When the mid-gray signal is not on (as indicated by the vertical arrows on lines 524-3), those blanked lines are
The vertical sync circuit of the receiver is "fooled" so that a vertical retrace is performed on the first of these five lines, rather than the beginning of the normal five horizontal sync pulses. Therefore, the vertical retrace is moved five lines forward. When those five lines are mid-gray, vertical retrace is performed in place with normal vertical synchronization. It should be understood that the number of blanked lines and the amplitude of the inserted waveform may vary in other embodiments.

As shown in FIG. 5B, line 4
6 (only 1-4 are shown) is a standard signal, similar to lines 517-523. Transformation is line 52
4, 525, 1, 2, and 3 only, the active video portion of lines 524 and 525 and line 1
-3 have a 0.3 volt intermediate gray signal which is blanked (black) or inserted (this amplitude is nominal and reduces the amplitude reduction effect of the related prior art copy protection process). It should be understood that no consideration was given.) FIG. 5B shows a part of the field of the intermediate gray level. As mentioned above, a gray signal is typically
It switches on and off ("vibrates") at a rate between 1 Hz and 10 Hz. When oscillating at 1 Hz, the active video is composed of 30 consecutive video fields including 5 lines at the blanking level, followed by 30 video fields in FIG.
30 video fields including 5 lines that are% gray are continuous. As shown in FIG.
The color bursts from line 3 to line 3 may (or need not) be blanked.

This vibration occurs once a second (vibration rate),
The image is jumped up and down five lines, which has been found to be very unpleasant for the viewer, as indicated by the "x" in FIG. 3 (B). That is, in the field having the vertical deformation shown in FIG. 5B, the vertical retrace occurs five lines earlier, followed by the field in which the vertical retrace occurs normally.
This early vertical retrace occurs because the presence of prior art copy protection signals reduces the overall video amplitude from NTSC standard 1.0 volts to, for example, up to 0.4 volts (from peak white to sync tip). Because. At that time, the vertical sync separator of the TV receiver is 5
Recognize the first of the two blanked lines as the first vertical sync (wide) pulse and perform the vertical retrace shortly thereafter.

In another embodiment of vertical deformation (not shown), the last two lines of one field and the first three lines of the next field may be deformed as shown in FIG. Instead, the deformation is the last five lines of the active video for a field (lines 521, 522, 5
23, 524, 525), thereby avoiding the generation of "illegal" (non-standard) video signals. Another type of this vertical deformation is shown in FIG.
About three or more lines, such as lines 524 and 525 of FIG. In some TV sets, this results in an additional jump, which means that the TV set uses the correct timing, one at line 4 and one at about line 23, for a total of two vertical sync pulses. See ".

It should be understood that the vertical deformation need not extend over the active video portion of the horizontal line. It has been found that applying the deformation in one line for about half the duration of the active video is sufficient to generate early vertical retrace. FIG.
In yet another embodiment of the vertical deformation shown in (C) (substantially similar to the embodiment of FIG. 5 (A)), the horizontal blanking period includes lines 517, 518, 519, 523, 52
At 4 and 525, it is removed (blank) and a white pulse is added. Thus (as in the embodiment of FIG. 5B), this is also an "illegal" (non-standard) video signal, but one that can be used for many applications other than broadcast. Eliminating horizontal blanking in those lines increases AGC gain reduction (in the AGC circuit of the VCR). Lines 517, 518, 519, and 52
The white pulses at 3, 524, 525 may be present in each field, or may be modulated or switched in amplitude. In addition, those lines with white pulses may be shifted by several lines from field to field or at some multiple of the field rate, so that when copied illegally and viewed on a TV set, the lines will move vertically. Bokeh effect is induced. The group of white lines may be from zero to four lines.

The vertical deformations made to the video signal have no effect when input to the TV monitor as part of the original (legal) signal. However, when the video signal amplitude is sufficiently reduced, for example, by copy prohibition processing, the TV monitor tends to erroneously detect the vertical synchronization information, and the vertical instability occurs as described above.

Further, when the vertical deformation signal is input to the VCR together with the copy prohibition processing for reducing the amplitude of the video signal in the recording VCR, the drum servo of the VCR tends to be disturbed when recording. This is because VCRs generally require a "clean" vertical sync signal to maintain the correct phase, and the presence of jittery vertical sync signals causes the VCR to lose lock.
The effects seen when the recording is played back are vertical instability of the image and intermittent noise bands that appear when the drum servo loses lock (similar to a variable tracking error).

That is, the vertical rate waveform deformation functions similarly to the vertical rate waveform deformation except that vertical rather than horizontal disturbances are induced. Combining the two methods is more effective with respect to image quality degradation than using only one. By changing the pulse rate of the vertical waveform, ie, by changing the frequency between 2 Hz and 10 Hz, for example over a period of about 20 seconds, the effect can be increased for more TV sets. Changing the checker frequency can also move the horizontal split up and down, producing a more offensive image when illegal copying is performed.

Vertical and Horizontal Deformation Apparatus A block diagram of the circuit for inserting the horizontal and vertical deformations described above is shown in FIG. The main video signal path includes an input clamp amplifier A1, a sync pulse narrowing circuit 96, a mixing point 98 to which components of a horizontal checker and a vertically deformed waveform (causing jitter) are added, and an output line drive amplifier A2. Also in this case, the video input signal to the circuit of FIG. 6 may be one in which the last nine lines of each field are blanked to the reference level. U.S. Patent No.
No. 4,695,901 shows a switching circuit for blanking.

The processing control and signal generation path includes a sync separator 100, a control circuit 102, a circuit for generating a required signal voltage added to the main video signal (FIG. 7), and a control circuit 102 for controlling the required signal voltage. And a switch selection system 104 (FIG. 6) applied under In some cases,
Element symbols, for example, U1, R1, OS1, A1 are repeated in the drawings for certain parts. However, unless otherwise indicated, it is not intended that the same parts be shown.

The input video has its dc component recovered by an input video clamp amplifier A1 (amplifier A1 is a commercially available component, such as the EL2090 from Elantec). Amplifier A1 ensures that the video signal (during blanking) is at a known predetermined DC level before additional waveform components are added. The resulting clamped video signal is provided to mixing point 98 via an internal impedance R ₀ , typically greater than 1000 ohms. The additional pulse signal to be inserted is applied to mixing point 98 with an internal impedance of less than 50 ohms. When it is desired to transform the input video signal with, for example, a checker component, an appropriate signal is selected and applied to the mixing point with a low internal impedance to cancel the input video signal from amplifier A1 and to convert the input video signal to the desired Replace effectively with signal. If the input signal should not change, all switch elements 104 are left open and the video signal remains unchanged and the output line drive amplifier A2
Is input to The resulting video signal at mixing point 98 is applied to line drive amplifier A2 to provide a standard output signal level and output impedance. The output of video clamp amplifier A1 is input to sync separator 100 (a commonly available component, such as LM1881 from National Semiconductor). The sync separator 100 provides a composite sync pulse and a frame identification signal used in the processing control circuit 102.

The processing control circuit 102 generates a control signal that turns on the signal selection switch 104 at the correct timing (and required duration) at which various signals should replace the input video signal. All of the various signals that replace the original (input) video consist of high or low steady state DC signal levels. For example, a "high" checker signal is a mid-gray level, typically 30% of peak white, and a "low" checker signal is a black or blanking level. These various signal levels are provided by potentiometers VR ₁ , VR ₂ , which provide adjustable signal levels connected to appropriate voltage supply lines.
It is generated from VR ₃ and VR ₄ (or from a fixed voltage dividing resistor for a predetermined signal level) (see FIG. 7). This signal is applied to the appropriate selection switch elements 104-1, 104-
2, 104-3 and 104-4 have unit gain operational amplifier A
5, ensuring the required low output impedance for the mixing point 98.

The control circuit 102 generates an appropriate switch selection control pulse for the checker pattern and the vertical deformation signal (see FIG. 6). The checker pulse is supplied only to the selected line, and includes, for example, 10
The checker pattern starts at the second line (ie, after the end of vertical blanking), and ends 10 lines before the last line including image information (ie, 10 lines before the start of the next vertical blanking period). Similarly, the vertical jitter modification signal is supplied only to the selected line, for example, to the last nine lines before the vertical blanking period. Therefore, both the checker pattern and the vertical deformation signal require a control signal having horizontal and vertical rate components.

The video input signal "Video In" is buffered by the amplifier A3 and coupled to the synchronization detector via a coupling capacitor C1 and a low-pass filter including a resistor R1 and a capacitor C2 (see FIG. 6 for details). 8). Sync separator 100 provides a composite sync pulse and a frame identification square wave signal. The composite synchronization pulse is supplied to a phase lock loop (PLL) 100. Potentiometer V
Phase control of PLL 100 using R ₆ (“phase adjustment”)
Is adjusted so that the horizontal rate output pulse starts at the desired starting point of the checker, typically 2 microseconds before horizontal blanking (see FIG. 9). The output signal of PLL 100 is used to derive the horizontal rate component f _H of both the checker and the vertical deformation signal. Synchronous separator 100
Is inverted by inverter U5 to provide a clamping pulse to clamp amplifier A1 (part number EL2090).

The frame identification square waveform output (“frame pulse”) of the synchronization detector 100 is supplied to the one-shot circuit OS
1 to generate a frame identification pulse of about 1 microsecond. This one-shot output signal f _V is used to derive the vertical rate components of both the checker and the vertical deformation signal. The horizontal rate phase lock loop component f _H from the PLL 110 is stored in the memory address counter 11
4 clock input terminal. Frame (vertical)
Rate one-shot output signal f _V is, counter 114
Is input to the reset input terminal RS. The output signal of the memory address counter 114 is input to a memory 116, which typically outputs a checker pulse enable (CPE) signal which goes high during the portion of the image where the checker signal should be present, to its data line output. E programmed to provide one of the terminals
PROM. The second data line output provides a field end identification (EFI) signal that goes high during the last few lines of each field to include the vertical deformation signal.

Horizontal rate phase lock loop component f _H
Is also input to a one-shot circuit OS2 which generates a line end pulse (ELP) of the required duration of the checker pulse, typically 2 microseconds (see FIG. 9). The horizontal rate phase lock loop output signal f _H is also input to another one-shot circuit OS3, and the
Generate an output pulse that is microseconds long. The output of one-shot OS3 triggers another one-shot OS4, and the output pulse VJPw having a duration of about 52 microseconds.
o Generate. The timing and duration of the pulse VJP are
Positioning the vertical deformation inducing signal within the line time, ie, pulse VJP is essentially turned on during the desired portion of the active horizontal line period.

The four signals ELP, VJP, CPE, and EFI are output from the signal selection switches 104-1 to 104-4.
(See FIG. 7). The line end pulse ELP is supplied to the dividing circuit 122,
Generate a desired frequency for determining the checker frequency.
The higher this frequency, the greater the number of checker dark-bright-dark transitions per image height. This frequency may be chosen within a wide range, but a division factor of 52 (n = 52) gives a valid result. The output signal of the divider 122 is directly input to a certain input terminal of the three-input AND gate U4.
The inverted output of divider 122 is input to a corresponding input terminal of second three-input AND gate U5. Divider 1
The output of 22 may be a swept oscillator circuit consisting of a pair of NE566ICs. One NE566 is nominally set to 300Hz and the other is set to 1Hz. 1 Hz NE56
The output of 6 is fed to the frequency control input of the NE566 at 300 Hz. Each of the three-input AND gates U4 and U5 has a checker pulse enable (CP
E) and an end-of-line pulse (ELP) signal.
As a result, a high checker control (HVJ) signal is applied to the output terminal of the 3-input AND gate U4, and a low checker control (LVJ) is applied to the output of the 3-input AND gate U5.
A signal is obtained.

A similar configuration generates the necessary signals for the vertical deformation control signal. (Part number NE55 sold
An oscillator 126 (such as 5 and NE566) is configured to operate at a low frequency, typically between DC and 10 Hz. Oscillator 126 can be set to a high logic level output. Similarly, the signal output from dc to 10Hz will produce as much T as possible when the pirated copy is reproduced.
It can be swept over a range of frequencies that would interfere with the Vset. This is, as described above, a pair of NE56
This can be done using 6IC. The output signal of oscillator 126 is provided to one input of a three-input AND gate U2.
The inverted output of the oscillator 126 is input to a corresponding input terminal of the second three-input AND gate U3. Also, sweeping the frequency of oscillator 126 can cover a wide range of different TV sets, as each TV set will "resonate" or more jitter at its own frequency. Vertical jitter position (VJP) and field end identification (EFI) signal (flicker generator 13
The signal EFI modified by 0 is indicated as EFI '), and is input to the other two input terminals of the three-input AND gates U2 and U3. As a result, high vertical jitter control (EFC) is applied to the output terminal of the 3-input AND gate U2.
H), and a low vertical jitter control (EFCL) signal is obtained at the output of the 3-input AND gate U3.

With the appropriate modifications, the above-described arrangement allows the normal horizontal or vertical synchronizing signal to be applied, eg, on lines 22-24 of the NTSC television signal for added vertical distortion.
It should be understood that additional horizontal or vertical deformations are created to cause video retrace. The circuit of FIG. 7 together with the flicker generation circuit 130 is EFI ′
To generate a plurality of vertical deformation signal patterns.

FIG. 7 shows a field or frame "flicker feature" generator 130, which is used in some embodiments of the present invention to perform horizontal and vertical deformations. The following points are achieved by this flicker feature. 1) Change the “polarity”. That is, the gray and black squares of the checker pattern are inverted at a specific multiple of the field rate. This interleaves, for example, a checker shift for videos attenuated by piracy,
Furthermore, the appreciation of the copy is reduced.

2) Changing the position of the end-of-field (vertical deformation) pulse for each field reproduces a blur with an illegal copy and flicker on a TV set. This is because the position of the pseudo critical sync pulse is at a different timing in each field. This may be the case, for example, if the EFI pulse is high on lines 255-257, if the EFI1 pulse is high on lines 258-260, if the EFI2 pulse is high on lines 261-262 and 1, and if the EFI3 pulse is high on line 21. −
If high at 23, this is achieved.

FIG. 11 shows the flicker generator 130 of FIG.
And a multiplexer U10 (ie, CD405) by EPROM U8 (part number 27C16 or 2716).
Via 2) we show that those pulses are multiplexed at the field rate. As a result, the position where the pseudo vertical synchronization pulse is generated differs depending on the field. In a simple example, EFI, EFI1, EFI
2, and EFI3 are switched per field. As a result, pseudo-perpendicular lines or lines 259, 262, or 22 occur for successive fields or frames when playing an illegal copy. Therefore, the image is accompanied by flicker due to a change in the vertical synchronization position of the field rate in the TV or VCR. EPROM U8 allows for adjustments as to where to place the variable end of the field pulse as a function of time.

FIG. 11 also shows how the black and gray squares of the checker pattern are inverted at specific multiples of the field rate. The vertical sync pulse provides a clock to the 8-bit counter U7 (256 divisions, part number 74HC393). The output of counter U7 drives the address line of EPROM U8. When the data output signal D0 from the EPROM U8 goes high, the switches SK1K and SK
Invert the checker pattern via 2K. EPROM U
8 is adjustable so that inversion commands for the checker pattern can be generated pseudo-randomly or periodically, and at different flicker rates (ie, every 2 fields or every 5 fields). Etc.) can be realized. Data lines D ₁ and D _{2 of} EPROM U8 are also connected to multiplexer switch U1.
0 (part number CD4052), so the output signal EF
The degree of tunability in generating I 'can likewise be improved.

Alternative Circuit for Generating Vertical and Horizontal Deformations In FIG. 7, the end-of-field and end-of-line pulses are:
Pass the switch to disable the video drive resistor _R0 .
Unless those switches have a sufficiently low "on" resistance, video from the input program source will
It is always superimposed on the field end or line end pulse. For example, a typical analog switch has an on-state resistance of about 100 ohms. A typical value of the resistor R ₀ is 1000 ohms. At these values, 10% of the video
Will be superimposed on the end-of-field and end-of-line pulses. If the video reaches peak white, the end-of-field and end-of-line pulses will have a level of at least 10% of peak white (100 IRE) or 10 IRE, thus nullifying those added pulses.

To overcome these potential problems, in another embodiment, additional pulses are added and selected via a multi-terminal switch, which does not simultaneously select the video source. To eliminate. FIG.
As shown in FIG. 5, the high and low states of the field termination are determined by the input from the oscillator U22 (0.1 Hz to 10 Hz oscillator) and the AND gate U having the input signals VJP and EFI.
23. Switch SW103 is switched between high and low states are respectively controlled by the variable resistor R _B and R _A. Amplifiers A10A and A10B
Is a unit gain buffer amplifier. EOF in low state
In order to eliminate the cross talk with the checker pulse,
Switch SW103A is connected to switch SW103 and amplifier A
100, and switch SW102A is coupled between switch SW102 and amplifier A101. The “and” gate U23A connects the switch SW103A to the ground on all lines other than the position of the EOF line. Similarly, the gate U21A connects the switch SW102A to the ground except when the checker pulse is on. Otherwise, switch SW
103A and SW102A are respectively a switch SW10
3 and the SW102 are passed through the EOF and checker pulses. The output of the switch SW103 is buffered by the unity gain buffer amplifier A100 and input to the coupling amplifier A102. Similarly, the switch SW102
Receives the signal ELP, the counter U20 (divided by n counters), and the high and low states of the line end generated by the signal CPE.

Variable resistors R _C and R _D provide adjustment for high and low line termination pulses, respectively. Amplifier A
101 buffers the switch SW102 and inputs the buffer to the coupling amplifier A102 via the resistor R2. Amplifier A102
Supplies an output to a coupling amplifier A103. The post pseudo sync pulse (PPS) is also input to the coupling amplifier A103. The outputs of the coupling amplifier A103 are therefore a line end pulse, a field end pulse, and a post pseudo sync pulse (PPS). The switch SW101 selects all of the pulses by the OR gate U10 and the inverter U11 during a period corresponding to those pulses, and selects video during all other periods. Amplifier A104 buffers the output of switch SW101 and provides a video output "video out" containing the pulsed video. The switch SW104A applies the video from the sync narrowing circuit to the voltage level VBLNK (ie, 0IRE) for the last 9 active lines of each TV field by means of an "and" gate U104B.
Blank beforehand. Gate U104B provides an EPROM data output EFO (going high for the last nine lines of the TV field) and a VJ (active horizontal line pulse).
And P as two inputs.

The position modulation source for the PPS is a voltage source Vg
controlled by en. The voltage source Vgen is a resistor R20
And the inverted burst gate pulse is output to the resistor R1
The variable delay is input to 0 and the capacitor C2 and input to the one-shot U20. One shot U20 is a variable position about 1.5 microseconds after the burst of input video and is rejected during the vertical blanking period by signal CPE and NAND gate U21B. Resistance R6 is PP
Determine the amplitude of S. Resistor R6 typically has a -10 IR
E is set to -20 IRE. NAND Gate U21
The other input (U22A) is normally high for all PPSs, resulting in constant amplitude pulse position synchronization. U
If 22A is oscillating (ie, 300 Hz), P
Similarly, the PS signal is repeatedly turned on and off at (300 Hz). Thus, the PPS can be a position modulated pulse,
In addition, it can be a synchronization pulse with a modulated pulse amplitude following the burst.

Horizontal Sync Pulse Narrowing Variation The sync pulse narrowing circuit and method for enhanced copy prohibition of a video signal may be used by itself, as described further below, or (see block 96 in FIG. 6). Used in series (as shown) with the other signal modification techniques described above. The reason for narrowing the video signal sync pulse (mainly the horizontal sync pulse) is that when an illegal copy is made, the attenuated video with a short sync pulse width (duration)
This is because this poses a problem in the reproducibility when viewed on a TV set. This is because most TV set sync separators provide DC recovery of the sync chip. Since those TV set sync separators are typically driven by an intermediate impedance, the sync pulses are partially clipped. By narrowing the sync pulse, the sync pulse is further clipped.
When an illegal copy of the video signal is made, especially in the presence of the above-mentioned checker and / or end-of-field deformation signal, the copy will have a reduced sync pulse width and reduced amplitude video. As a result, the TV sync separator is subject to significant loss of sync due to clipping from the reduced sync width and attenuation of the video itself. Thus, the TV set is not properly "extracted" of the sync, so that the TV image is more unsuitable for viewing, since the horizontal and / or vertical deformation effects are stronger. FIG. 13 shows a typical prior art sync separator as used in many TV sets.
This circuit operates when the inverted video is provided to the base of transistor Q1 via coupling capacitance C. The sync tip of the video signal charges the capacitor C just enough, and only the top of the sync pulse turns on the transistor. Resistor _Rb biases the transistor and the sync tip is "cut out". Voltage Vc of the C ends is related to the resistance R _o is the driving resistance of the video. The greater the resistance _Ro , the more synchronous clipping is observed at _Vb . If the resistance _Ro is too large, the transistor Q1 will start to sync out to the video (blanking level) domain, but this will allow the transistor to be cut off just below the inverted sync tip level. Up to the average level,
Value of V _c is because not charged.

Insufficient charging of the capacitor C turns on the transistor Q1 even when a blanking level is input. The base-emitter impedance of transistor Q1 is low when transistor Q1 is on (this causes a positive going sync pulse to decay).
Since the charging of the capacitor C is a function of the width of the sync pulse, narrowing the sync pulse causes the sync separator to clip the narrowed portion of sync beyond the normal sync width. This is equivalent to performing synchronous clipping at a point close to the video signal (that is, the video blanking level). At normal video levels, the narrowed sync pulses do not cause playback problems in VCRs and TVs. However, if the narrowed sync pulse is recorded on an illegal copy of a copy protected cassette, the video signal will be attenuated. This attenuated and narrowed synchronization causes the TV to extract sync pulses unreliably (during playback viewing) and to synchronously extract a portion of the video signal, ie, the blanking level.

The particular horizontal sync pulse is selectively narrowed to near zero pulse width (duration less than 600 ns), and T
If the filter of the sync separator in the V or VCR becomes unresponsive, or if the coupling capacitance of the sync separator charges only negligibly, it is equal to the absence of a sync pulse in that region. The narrowed pulse of the selected horizontal sync near the end of the field can create a situation where the sync separator clips out the blanked video line during playback as a new (false) vertical pulse. When a pirated video signal is attenuated and fed to a TV, the above situation can cause a VCR or TV to detect two vertical pulses in one field, causing vertical jitter.

In one embodiment, the pulsing (modulation) of the frequency of the line at the end of the video field (with an amplitude of at least 10 IRE from 0IRE and a narrowed horizontal sync pulse) is swept from 1 Hz to 15 Hz.
This has the desired effect on a wide variety of TV sets. FIG. 14A shows a video signal waveform (Vi
n) indicates, this is the inverted video is input to the TV sync separator circuit in Figure 13, the resistance R _o of Fig. 13 (≒
0). FIG. 14B shows the influence of the coupling capacitance and the resistance _Rb . Note that at Vb, the video signal goes up to the sync chip level (since R _b ≫R _o , the resistance R _b and the capacitance C _b
Is the result of the RC time constant. FIG. 14C shows a narrowed horizontal synchronization pulse. The operation of resistor _Ro (where _Ro is an intermediate resistance value, i.e., 200 to 1500 ohms), capacitance C, resistor _Rb , and transistor Q1 cause a clipped operation of the reduced sync tip. Because the sync width is narrower, the capacitor C is not fully charged, causing more sync clips. Note that the charging of the capacitor C is related to the amplitude of the sync pulse and its pulse width, ie Vc is proportional to (sync pulse width) times (sync amplitude). The lower the voltage Vc, the greater the synchronous clipping operation. FIG. 14D shows this effect at the point Vb in FIG.

FIG. 15 (A) shows an attenuated video source signal due to piracy with a narrowed sync pulse, where "A" indicates the presence of a checker pulse. The sync separator responds to completely clip the sync pulse, so that the portion of the video going to the end of the line is recognized as a new sync pulse. FIG. 15B illustrates this. The sync disconnect (inverting) transistor Q1 is on during the clipped portion of the video.

FIG. 15C shows that the leading edge of synchronization is destabilized by clipping a portion of the video. The instability of this leading edge of the sync separator is T
V displays an unstable image (i.e., a horizontal swing). As indicated by the arrow, the resulting unstable sync pulse is caused by a narrowing of the sync or a checker pulse.

FIG. 15 (D) shows the output of the TV sync separator for FIG. 14 (D) which is a normal level TV signal whose synchronization has been narrowed. Therefore, the signal in FIG.
It does not cause playback problems for the V set. FIG.
Only when the signal of (D) is added to the copy protection signal and an illegal copy is made, the reproduction problem becomes apparent in the TV set, since the illegal copy results in an attenuated signal. is there.

FIG. 16 (A) shows a signal near the end of a video field or after a vertical sync pulse (ie, NTSC lines 256-25) under fully unattenuated TV signals.
9, line 10-12) has a variable amplitude (i.e., about 10-10 from around the blanking level).
When switching is performed along with “ZZ” in FIG.
Indicates that the image starts to rise so as to cut into the image area.
This results in a wider pulse in the "ZZ" region, but not as wide as it would cause a vertical sync pulse.

FIG. 16 (C) shows the output of the sync separator of the waveform of FIG. 16 (B). If a copy prohibition protection signal is added to the waveform, the illegal copy provides the attenuated signal to the TV sync separator as shown in FIG. FIG. 16 (D)
Shows an attenuated TV signal due to piracy when a narrowed sync is added at the end of the field line.

FIG. 17A shows a rising operation appearing at the point _Vb via the resistor _Rb and the capacitor C. The corresponding output of the sync separator has a new (false) wide (vertical sync) pulse at "y". This new pseudo vertical sync pulse is generated when a narrowed horizontal sync pulse is applied to the field end line at the blanking level. 1 from narrowed horizontal sync pulse and 10 IRE
If both 00IRE levels are present, the TV sync separator will only output a narrow horizontal rate sync pulse and no new wide pulse will be generated. This means that the sync separator is 1
This is because levels from 0IRE to 100IRE are completely ignored. By selecting and deselecting blanking and more than 10 IRE units of signal, the sync separator allows early or delayed false vertical sync pulses (FIG. 17).
(B) sees a normal vertical sync that sometimes follows. These early or delayed spurious vertical sync pulses will cause the TV to jitter up and down when playing the illegal copy.

To achieve the same effect as described above, in some cases: • Narrow the selected sync pulse to about zero. That is,
Remove the horizontal sync pulse and have the TV sync separator generate a false vertical sync pulse. Reposition some sync pulses for more than 63.5 microseconds, causing the sync separator to malfunction and generate a new false sync vertical sync pulse. This causes the rise operation of some sync separators to generate spurious vertical pulses.

FIG. 17 (C) shows that the video signal is equal to or more than blanking, that is, about 10 IRE in a narrow pulse region.
5 shows a video signal in which there are no false vertical sync pulses because there are more than units. Therefore, when the level of the video signal is sufficiently higher than the blanking level, no spurious vertical sync pulse is generated even if the narrowed horizontal sync pulse exists.

As shown in the sync pulse narrowing circuit of FIG. 18A, a video input signal (which may already contain a basic copy protection pulse) is input to terminal 160 and sync separator 162 and The video is supplied to the video adder 164. The sync separator 162 outputs the separated horizontal sync (H
Sync) and a vertical sync signal to a line select gate 166, which selects, for example, line 10 from line 10 of each video field. The separated H sync pulse is also provided to a one-shot circuit OS10, which in response responds with a signal having a duration of about 2 microseconds by an AND gate U10.
12 and the other input of this gate is the line select signal from gate 166 indicating the selected line 10 to line 250. In response, AND gate U
12 is H at each of lines 10 to 250
A signal indicating the synchronization part is output, and this signal is
The amplitude is adjusted by 74. The output of the amplitude adjustment amplifier 174 is added to the original video signal in the adder 164, and the output is supplied to a video output terminal 180. FIG. 18B shows the waveform at point Q in FIG. 18A (normal H synchronization with color burst).
7 shows the signal at R, which is the output of the amplitude adjustment amplifier 174. The sum of Q and R ("Video Out" shown at the bottom of FIG. 18B) is observed at video output terminal 180, which is a shortened H sync pulse with a color burst.

Another circuit that performs synchronous narrowing with the envelope of the extended color burst (the extended burst is
(Necessary to guarantee color lock for TV sets if the reduced H sync causes color lock problems). 19 and 20
Shows a circuit that provides a narrowed horizontal sync pulse over the active video field. Within this active field, the EPROM data output determines which lines are further narrowed. For example, this EP
The ROM output (EPD1) is 3.7
It has a displacement sync pulse width of microseconds and has a line 251-
262 has a displacement sync pulse width of 2.0 microseconds. Other combinations are also possible, depending on the programming of EPD1 in EPROMU9. Another output from EPROM U9 is a line (ie, lines 255 and / or 25) before the position of the EOF pulse.
7), etc. (this is done by EPD2 from AND gate U10 and EPROM U9). The repositioned horizontal sync narrowing sync is the normal H
This is possible even after the synchronization is suppressed in BI.

For input video by any combination of basic copy prohibition processing, field end pulse, and checker processing, or ordinary RS170 type video,
The DC component is restored to 0V (equal to the blanking level) by the video amplifier A1. Amplifier A1 outputs to sync separator U2, which outputs composite sync and vertical pulses between 1 and 20 microseconds. In order to generate a burst gate to the circuit 2015 to lock the burst of the input video, the burst gate pulse, if present, is present (i.e., basic copy inhibit processing has been applied to the input video). Care must be taken not to generate Therefore,
One shot U3 receives composite (and pseudo) synchronization
A 45 microsecond non-retriggerable pulse is generated in one shot, the length of which is equal to the equalizing pulse and the vertical 2H pulse in the vertical blanking period, as well as any pseudo sync pulses that may be present (usually TV line 1
(In the first 32 microseconds of 0-20) is long enough to ignore. One shot U10 delays the leading edge of the input video sync by 5 microseconds to trigger one shot U11, which is a 2 microsecond one shot consistent with the input video color burst.

The amplifier A1 drives the color bandpass filter amplifier A91, and the phase lock loop circuit 210
Enter 5 The output of the PLL circuit 2105 is a continuous waveform in which the subcarrier phase is fixed to the color burst of the input video. PLL circuit 2011 adjusts the regenerated subcarrier phase at the output of amplifier A5 to be correct. The frame sync pulse from sync separator U2 is E
Reset the address counter U8 for PROMU9. The counter U8 is counted up by the horizontal rate pulse from the amplifier A3. EPROMU
9 outputs each data line including a specific TV line which is high or low in the active field.

One of the advantages of the circuits of FIGS. 19 and 20 is that
The regenerated narrowed sync can be placed anywhere in the horizontal blanking interval (HBI). This is particularly advantageous when starting a new narrowing sync 1 microsecond ahead of (before) the horizontal sync of the input video. In the state where the new narrow horizontal synchronization and the PPS pulse precede by 1 microsecond, the horizontal instability at the time of the illegal copy with the basic copy prohibition processing is one of the horizontal jitter.
This results in a microsecond increase. By advancing the narrowed H sync pulse, the narrowed H sync pulse and the PPS
And there will be a larger time interval between them, which will proportionally increase the instability when the pirated copy is reproduced.

To produce an advanced narrowing H sync, the output of one shot U2, a 45 microsecond pulse coincident with the leading edge of the input sync, is "squared" by a 32 microsecond one shot U4. Elements R1, L
1 and the filter with C1 is one shot U2
The output of is bandpass filtered to produce a 15.734KHz sine wave.

By adjusting the inductance L1, a sine wave is generated that precedes (or follows) the H synchronization of the input video. The comparator A3 converts this sine wave to generate a pulse having an edge that precedes or follows the preceding synchronization edge of the video input. The "follow-up" capability of filters R1, L1, and C1 (where Q is 4) to produce a waveform synchronized to the input signal generally requires that most horizontal inputs be at a time when the video input is from a VCR. P
Above LL. The output of amplifier A3 is fed into a 14 microsecond one-shot U5 to generate an HBI gate signal to replace the original (input) sync and burst with a new narrow sync and extend burst.

One shot U6 sets a nominal narrowing delay of 0.5 microseconds from the beginning of the input video HBI (of the leading edge of one shot U5), and one shot U7 sets a new narrowing synchronization pulse. To trigger off. Elements R2, R3 and Q1 form a switch,
This switch further narrows the pulse according to the command of EPD1 (low on lines 251-262 of each field, high otherwise) by shorting transistor Q1 (emitter to collector). The output of one shot U7 is a 3.7 microsecond pulse from line 20 to line 250,
From 51 to line 262 are 2 microsecond pulses. Triggering off the trailing edge of one shot U7 is one shot U12, whose output is an extended burst gate (with a pulse width of about 5.5 microseconds).

The output of the one-shot U12 is the switch S
Gating the color burst from circuit 2011 via W22, a 3.58 MHz bandpass filter amplifier A4,
An extended burst envelope from the output of switch SW22 is shaped and coupled to coupling amplifier A5 via extended burst amplitude adjustment resistor R10. The narrowed H sync from one shot U7 is "anded" with signal EPD2 by gate U13, where signal EPD2 is narrowed so that some of the narrowed sync is suppressed to emphasize the end-of-field pulse. Normally high except for lines. Gate U1
The output of 3 can be applied to amplifier A5 via a narrow synchronous amplitude control resistor R8. The output of amplifier A5 is a narrow sync pulse extension color burst. The switch SW25 is
The output of the amplifier A5 is switched based on the AND gate U14 and the OR gate U20.
Is the output of the one-shot U5 and the EPD (active field position pulse, lines 20-262)
3 to switch the output of the amplifier A5 during the HBI.

The buffer amplifier A22 outputs video from the input with a new narrow H sync and extended color burst. In order to gate the sync pulse (EOFRSP) repositioned at the field end position, one shot U
16 is 10 to 40 microseconds from the leading sync edge of the input video. Gate U16 supplies to gate U17 a pulse having a width of 2 to 4 microseconds, which is 10 to 40 microseconds behind the leading sync edge of the input video. The output of gate U16 is
EPD4 from AND gate U18 and EPROMU9
Is enabled by The signal EPD4 is EPD
High on some lines at the end of the field after synchronization suppression has been initiated by 2. Gate U1
6 drives the coupling amplifier A5 via the EOFRSP amplitude adjustment resistor R85. The gate U16 also turns on the switch SW25 through the OR gate U20 while EOFRSP is active, and inserts the repositioned synchronization pulse (EOFRSP). Thus, the output of amplifier A2 will be the input video, narrowing synchronization, and suppression (or zero).
One or two lines of synchronization, and / or several lines of narrowed H synchronization repositioned.

Even if not all horizontal sync pulses in the video signal are narrowed, it is effective to narrow the sync pulses. It has been found that even a relatively small number of narrow horizontal sync pulses can result in false vertical retrace. For example, three to six consecutive video lines with narrowed horizontal sync pulses are sufficient for this purpose. Collecting the narrowed horizontal sync pulses in a continuous (or at least relatively close) line,
Preferred for generating false vertical retraces.

Other circuits for narrowing the sync pulse in a setting to remove the copy protection signal are disclosed in US Pat. No. 5,157,510 to Ron Quan et al. And US Pat.
No. 965, both of which are incorporated herein by reference. FIG.
(A) and (B) show the configuration diagrams of two circuits that combine the above-described synchronization pulse narrowing processing with the above-described prior art copy protection processing and horizontal and vertical signal deformation.

FIG. 21A shows a first device in which the program video is supplied to a circuit block 204 for adding a prior art copy protection signal including an added AGC and a pseudo sync pulse. The next block 206 (detailed in FIG. 6) adds (1) a checker pattern and (2) a vertical rate signal variant to the end of each of the selected fields. (FIG. 18 with different details)
The sync pulse narrowing circuit block 208 (shown in (A) and FIGS. 19 and 20) further modifies the video signal and supplies it to a terminal 209 for output to, for example, a master copy VCR of a video cassette copying facility. It has been found that the basic copy inhibition process according to the prior art can be improved by simply performing a synchronous narrowing process at the same time.

Alternatively, in FIG. 21 (B), the input program video signal is
08 and input to copy protection, checker pattern and vertical rate signal transformation circuit blocks 204 and 206 (combined and shown here as one block) and are provided to output terminal 210. It should be understood that the described video signal variations, ie, checker patterns, end-of-field vertical patterns, synchronous narrowing, and the like, will be provided by other devices as well.

Method and Circuit for Eliminating Video Copy Protection Signal Deformation At least the above-mentioned AGC and pseudo sync pulse, and / or
Alternatively, a method and circuit for canceling a copy inhibit processing signal that includes a sync narrowing and / or line end checker pulse and / or a field end pseudo vertical sync pulse when given is described below.

For AGC and pseudo sync pulses, see Ryan US Pat. No. 4,695,901 and Quan, referenced herein.
U.S. Pat. No. 5,157,510 discloses a method and apparatus for releasing (removing or attenuating) those added pulses. Ryan, U.S. Pat. No. 4,695,901, discloses only pseudo sync and AGC pulse removal or attenuation, but does not disclose sync pulse narrowing, field end pseudo vertical sync pulse, or line end (checker) pulse release. As is well known in the art, the processing amplifier can use the regenerated sync to remove the sync pulse narrowing, but the processing amplifier releases the line end checker pulse and the field end pseudo vertical sync pulse. do not do.

The prior art does not teach how to release those copy protected vertical and checker signals. Simply blanking them out will leave the effect of the remaining copy inhibit signal when an illegal copy is made. The reason for this is that even if those signals are blanked to the blanking level in the presence of pseudo sync and AGC pulses, the attenuated video signal will be input to the TV set when an illegal copy is made. This attenuated signal has, for example, a blanking level field end line, and thus a pseudo vertical sync pulse will be generated in this situation. this is,
This is particularly noticeable when a narrowed horizontal sync pulse is still present.

On the other hand, if the narrowed sync pulse is only restored to the normal sync width, the other two copy protection enhancement signals (checker and vertical) still have an effect. Therefore, the following method cancels the above-described copy inhibition processing effect. 1) Line end (checker deformation) copy protection signal
Is replaced by at least about 20% of the peak white signal, or at least about 20% of the peak white
The% change signal is added to the line termination signal.
The signal replacement or signal addition may be performed on the checker signal to cancel the processing. What is meant by "portion" is the portion of the end of the line pulse to be "neutralized" or the portion of all lines of the video that have an end-of-line pulse.

2) The end-of-field (vertical) copy protection pulse may be replaced by a signal at least about 20% of peak white over a period of at least about 32 microseconds per line, or at least about 20% of peak white. % Level change signal is enough lines (ie 7 out of 9; 5 out of 7; 2 out of 3)
At least about 32 microseconds are added to the vertical pulse, thereby canceling the copy prohibition processing.

The 20% of the peak white referred to in relation to the vertical and checker pulses is a typical experimentally determined minimum required to achieve the purpose of canceling the video signal effect; It should be understood that a higher level signal (of 30% or more) will accomplish the purpose more completely. 3) Most (50% or more) of the narrowed horizontal sync pulse is widened to release the sync narrowing process, ie, if the sync is narrowed to 3.0 microseconds, the sync pulse is reduced to 4.0 microseconds. If it is widened, it is appropriate to cancel the synchronization narrowing process, and it is not necessary to replace the narrowed synchronization with the RS170 standard horizontal synchronization pulse (RS170
Note that by default, the horizontal sync pulse width is 4.7 microseconds).

4) The sync pulse width expanded to penetrate the end-of-line (checker) pulse can be used to release both the checker and sync narrowing processes. Care must be taken to ensure that the TV set's flyback pulse still triggers the color burst, but this is because the TV set's flyback pulse is extended by extending the sync pulse to include part of the checker pulse. Because it triggers early.

5) Horizontal sync and color burst with proper sync and burst width rearranged in checker pulse can release both sync narrowing and checker processing, and the flyback signal of TV set is T
Properly trigger the V-set color burst signal.
If the video amplitude is reduced, the vertical pulse has the effect of a vertical sync signal on the TV set. Most TV sets and VCRs require about 30 microseconds to trigger a vertical sync filter and output a vertical pulse. Therefore, even if the vertical pulse is modified so that the residual pseudo vertical pulse has a duration of, for example, 20 microseconds or less, the vertical synchronizing filter does not output the pseudo vertical synchronizing pulse.

If the "low" state of the checker pulse is shortened and the narrowed horizontal sync pulse is not detected by the TV set or the sync detector of the VCR, a sufficient release of the checker pulse is provided. This can prevent the influence of the checker pattern when reproduced in an illegal copy. FIG. 22 shows a two-stage circuit and method for removing all the above-described copy-protection protection signals. AG
C, pseudo sync, checker, vertical pulse, and a video signal containing a narrowed horizontal sync pulse are first disclosed in Ryan U.S. Pat. No. 4,695,901 and Quan U.S. Pat. No. 5,157,510.
From the terminal 228 to the circuit 230 described in FIG.
Cancels the effects of the AGC pulse and the pseudo sync pulse. Next, the output signal of the circuit 230 is input to the enhancement signal eliminator 234, which cancels the checker and vertical pulses, and further cancels the residual AGC pulse or the pseudo sync pulse and the sync narrowing during the horizontal blanking period. Terminal 236
The video and signal appearing in the above, therefore, have all the effects of the copy protection signal eliminated.

In this embodiment, the checker and vertical pulses reduce their pulse to about 20% of peak white.
, Or by adding a level change signal having an amplitude of about 20% of peak white (ideally). The checker pulse can also be defeated by inserting a wide horizontal sync signal, thereby replacing the checker pulse. This cancels the checker pulse and widens the horizontal sync pulse to cancel the sync narrowing process. Finally, if the HBI (horizontal blanking period) is replaced by a new horizontal sync and color burst, the AGC and / or pseudo sync pulses and sync narrowing in the active field are released.

In this embodiment, furthermore, by reducing the black level duration of the checker and the vertical pulse, a viewable copy can be obtained. Also, the AGC pulse following the normal horizontal synchronization pulse is released by adding a negative level change pulse to cancel the raised color burst (AGC pulse), or by replacing the synchronization and burst. Can be done. A circuit for achieving this is shown below.
In FIG. 23, which shows details of block 234 of FIG. 22, the enhanced copy protection signal is gain K (i.e., K is 2).
(Equal to). The output of the amplifier A10 is coupled to a capacitance C1, a diode D1, and a resistor R1, which constitute a DC synchronization recovery circuit. The resistor R2, the capacitor C2, and the capacitor C1 form a color subcarrier frequency notch filter, and the comparator A
11 can properly separate the synchronization. Voltage reference V
b1 sets a cutout point at which the comparator A101 functions as a sync separator. Comparator A1
The output of 1 is a resistor R3 and an inductance L as elements.
1, and supplied to a low pass filter including a capacitor C3 to recover the vertical rate pulse. Reference input level Vb
Comparator A12 with 2 is a vertical sync separator.

Since this video signal can be from a VCR, some sync detectors, ie, LM1881,
Generate an incorrect frame pulse for the R output.
Thus, to generate a frame pulse, one shot U1 generates a pulse that ends at a point slightly less than six lines from the beginning of the first vertical sync pulse. One shot U2 outputs a pulse having a width of about 25 microseconds.

The AND gate U7 is connected to the inverter U
6 and the output of one shot U2
Generate pulses that occur in all two fields of each frame. Only in one field, U2 and U6
The output from is high. The output of gate U7 is 1 and 2
FIG. 24 is a signal (FID) gate that triggers a one-shot U8 having a pulse duration of one-half field (see FIG. 24). For flip-flop U9, the output of one-shot U8 is coupled to the D input of flip-flop U9, and the vertical synchronization is the clock input of flip-flop U9, so that a frame rate square wave is generated and its rising and falling edges Coincides with the first vertical sync (wide) pulse of the input video signal. One shot U10, counter circuit U11, and horizontal PLLU
The horizontal rate pulse from 4 is 1 which counts 525 states
A signal is generated on the 0-bit address bus B10. EPR
OMU 12 is addressed by a 10-bit bus B10 and, depending on the program in EPROM U12,
The output lines of OMU 12 carry the following signals.

1) Active field position (AF)
(High state from line 22 to line 262). 2) End of field position (EOFL) (high state from line 254 to line 262). In FIG. 23, a PLL circuit U4 and a one-shot U5
Is the horizontal rate PL such that the output of PLL circuit U4 precedes the leading edge of the video horizontal sync by about 3 microseconds.
This is an L circuit. This is achieved by one shot U5, which delays the output of PLLU4 by about 3 microseconds. The output of one shot U5 is fed back to the phase detection input of PLLU4. Since the edges of both detection inputs of PLLU4 need to match,
The output of LU4 should precede the leading edge synchronous edge amplifier (comparator) A101. PLLU4
Also ignores any pulse except the horizontal rate.
Therefore, vertical pulses and others are ignored by PLLU4.

Further, the one-shot U3 shifts the timing of the trailing edge of the synchronization from the comparator A11 so that the burst gate pulse (B
G). FIG. 25 shows a checker and a level change circuit for canceling a vertical pulse. Amplifiers A20 and A
Reference numeral 21 denotes a coupling amplifier. The signal supplied to this coupling amplifier is video via resistor R100,
A line termination pulse via the resistor 101 and a field termination pulse via the resistor R102. The preceding horizontal pulse (A) that starts at the same timing as each of the checker pulses
By using (HP), a pulse of approximately 1.5 microseconds in duration is de-timed from AHP using the active field pulse AF from EPROMU12. AND gate U13 provides a high logic pulse (EOLD) at the end of each line during the active field.
Generate This pulse from gate U13 is appended to the video so that the checker pulse does not fall to the blanking level. Instead, the checker pulse is at least 20% of the peak white level. This releases the end-of-line checker pulse, which, in the context of an attenuated video signal, is such that the sync separator will "falsely" trigger
This is because the video level of the checker pulse does not decrease.

Using the AHP input to one shot U15 for a pulse ending in HBI, one shot U16 generates an active horizontal line pulse of approximately 49 microseconds (35 microseconds minimum). Sometimes, a similar effect can be obtained for a vertical pulse. One shot U16 is triggered off at one shot U15 (pulse duration of 14 microseconds) to form an active line pulse. This active horizontal line pulse is ANDed with the field end position (EOFL) pulse from EPROM U12 by gate U150. The EPROM U12 EOFL pulse sends a logic high signal at the end of the field during the horizontal active line via gate U150. This logic high level from the gate U150 output is added to the video signal by the resistor R102 to ensure that the vertical pulse is at a level of at least 20% of the peak white. With the vertical pulse having a level of at least 20% of peak white, these new end-of-field lines do not cause pseudo-vertical synchronization under attenuated video conditions. Thus, the output of amplifier A21 has a release mechanism for both checker and field end pulses. To release the synchronization narrowing process, the output of the amplifier A21 is coupled to a capacitor C12, a capacitor C13, a diode D10, a diode D11, and a resistor R12, which constitute a DC synchronous chip amplifier. The voltage VD2 is set so that the amplifier A22 has a DC component of 0 volt at the blanking level.

The AHP is used again, and the one-shot U12
And one shot U18 generates a new extended sync pulse. Elements R17, C18, C3, C19, R
18, and R19 are low pass filters for finite rise time synchronization. Voltage Vb3 is set to establish a blanking level for the new extended sync "high" state. One shot U19
And U20 together with AND gate U21 constitute control logic for reinserting a new extended horizontal sync pulse during the active field. The outputs of the one-shots U19 and U20 are slightly delayed from U17 and U18 to include the low-pass filter delay including elements such as R17, C18, L3, and so on. Electronic switch SW1
Therefore selects the spread synchronization and outputs a video output to amplifier A23. The part within the dotted line on the right side of FIG.
This is a synchronous replacement and output circuit S50.

FIG. 26 shows a circuit used in conjunction with the circuit of FIG. 23, replacing the checker pulses with new expanded horizontal sync pulses and new color bursts, and following those new expanded horizontal sync pulses. . Also,
The vertical deformation pulse is released by a level change via the source signal EOFD (see FIG. 25) input to the resistors R412 and R411.

The input signal includes the elements R299, C400, L
400 and through a color bandpass filter including C401, into a burst regeneration U40 (part number CA1398), which is a subcarrier from a burst to a continuous wave (3.58 MHz).
z) It is a regenerator, and the crystal Y40 is a 3.58 MHz crystal. The output of burst regenerator U40 is filtered by a bandpass filter (passing 3.58 MHz, including elements R300, L401, and C402) and buffered in amplifier A40. The electronic switch SW40 is
A new color burst is selected by one-shot U43. One-shot U43 is triggered by the regenerated expanded sync trailing edge of one-shot U41. One shot U40, with a 0.5 microsecond delay, sets the "path" of the horizontal sync front porch. The regenerated synchronization from the one-shot U41 output includes the elements R307, L403, C404, R305, R
306 and the voltage V400, and are filtered and level-changed. Amplifier A42 buffers this level-shifted expanded regeneration synchronization and provides a resistor R30.
4 and the color bust from amplifier A43. The electronic switch SW41 selects a new extended synchronization during the active field (by means of the AF source signal from the AND gate U44 and the EPROM U12).
Select a new burst during BI (new extended sync and new burst release active field AGC pulse in HBI, ie any copy-protected video signal with raised back porch pulse). ). The amplifier A44 buffers and outputs the new video in which the copy inhibition signal including the narrowed synchronization, checker pulse, and vertical pulse is released.

FIG. 27 shows a circuit for "level changing" to a higher voltage by integrating non-zero voltages. The line termination release signal ELOD and the field termination release signal EOFD are used for the level change in FIG. 23, and the voltage control amplifier (VCA) U is used while the checker pulse and the vertical deformation pulse are present in the copy protected signal.
A control signal for increasing the gain of 50 (part number MC1494) is generated. The video is DC restored and the sync tip goes to 0V, which means that the low state of the checker and vertical deformation pulses is above 0V (typically 0.3V to 0.5V). Elements C201, R201, D1
0, D20, C200, R200, and A49 form this DC recovered video signal. The output of the VCAU 50 is a copy prohibition signal that has been changed or amplified to an equivalent level sufficiently higher than the blanking level, and cancels the copy prohibition enhancement effect. The amplifier A50 buffers and outputs the output signal from the VCAU 49 to the narrow synchronization pulse canceling circuit in FIG.

FIGS. 28, 29, and 30 show alternative examples in which the checker and the vertical copy inhibit signal are released by the switch circuit. As FIG. 28 shows, during the checker and vertical pulses (for the DC recovery video of FIG. 23), the control voltage corresponding to those pulses is (EOLD) using electronic switches SW199 and SW198, respectively.
And under the control of EOFD signals) to select 20% peak white signal V ₁₀ for releasing the copy prohibition pulse. The finite driving impedance of the video signal makes this possible (resistor R200 provides an impedance of about 2000 ohms). The video signal is then amplified by the amplifier A501, processed by the synchronous replacement and output circuit S50 of FIG.

FIGS. 29 and 30 show an alternative switch circuit to the circuit of FIG. 28 for canceling the checker and vertical pulses (the synchronous replacement and output circuit S50 is not shown in FIGS. 29 and 30; 28 as well). In FIG. 29, the DC recovered video input signal is supplied to amplifier A54 via resistor R201, and disable switches SW198 and SW199 under the control of the EOLD and EOFD pulses, respectively, cause more than 20% of peak white. , Or the voltages V1 and V2, which are DC offset AC signals. 30 is similar to the circuit of FIG. 29 except that the switches SW198 and SW19
9 are arranged directly in series in the video signal path and use conventional replacement means to nullify the checker and end-of-field pulses. In some cases,
Simply blanking the checker and EOF pulses (blanking level V ₁ = V ₂ = V ₁₀ ) is sufficient for viewable video, and the checker and EOF pulses are sufficient.
The effect of the pulse can be canceled.

Apparatus for Removing Horizontal and Vertical Enhancement by Extending Synchronization FIG. 31 shows a circuit for releasing horizontal and vertical enhancement by extending synchronization, where the vertical (EOF) and checker (EOL) enhancements are input. Provided to buffer amplifier A60. The output of amplifier A60 is coupled to sync separator U61. The composite sync output of sync separator U60 is supplied to one shot U61 to eliminate the 2H pulse in the composite sync. The output of one shot U64 is supplied to PLL oscillator U65. PLLU65 for N = 910
Of the horizontal line frequency is 14.31818 MHz.
Times (Nf _H ). By using Nf _H to clock counter U 68 and to reset f _H , counter U 68
69 provides an 11-bit address bus. EPRO
The MU 69 can output the vertical pixel position (as programmed in EPROM U69). EP
The output of ROMU 69 includes the horizontal timing for the pre-pseudo sync position, the sync spread position, the new burst gate position, and the pseudo sync position for the EOF pulse. The output of sync separator U61 also has a field ID (frame) pulse that resets 525 status counter U63. State counter U63 is clocked by the horizontal frequency pulse from PLLU 65 and is divided by N counter U607. Thus, EPROMU 66 indicates the horizontal line position in the active field. For example, in EPROM U66, D ₀ is line 2
It is 2-253, and D ₁ is a line 254-262, the position of the vertical modification pulses.

Referring to FIG. 32, logic gates U610 to U614 utilize the data output of EPROMs U69 and U66 as follows. 1) The pre-pseudo sync and sync spread position is gated by the signal D0 such that the pre-pseudo sync and spread sync h is on lines 22-253. The output of gate U613 does this.

2) Synchronous spreading is performed from line 254 to line 2
62 and the additional pseudo sync pulse is on line 25
4 to line 262 only. This is achieved by the output of U612. The OR gate U614 is connected to the gate V61.
2 and the outputs of U613 to take the OR of their new burst gate signal, D3H. Gate U614
The output of controls switch SW600 to insert pre-pseudo sync (line 22 to line 253) H sync spread (new burst gate from line 22 to line 262).

3) The new burst signal from signal D3H and active field pulse D3 gate signal fsccw using amplifier A65 and AND gate U615. The output of gate U615 provides signals D3H and D3H.
A color subcarrier that is on only when 3 is high. Variable resistor R607 sets a new burst level,
Capacitance C607, inductance L607, and resistance R6
04 filters the envelope of the new burst.
U616 combines only the pre-pseudo-sync, pseudo-sync, and spread sync pulses, and controls the amplitude controls R602 and R60.
The signal is input to the inverting coupling amplifier via 3. Coupling amplifier A
67 will therefore have pre-pseudo-sync, extended H-sync, new burst, and pseudo-sync, and switch SW205 switches the output of amplifier A67 during the corresponding period.

FIG. 34 (A) to FIG. 34 (H) correspond to FIG.
32 and waveforms shown at respective points in FIG. 32. FIG.
Shows a typical PLL circuit for 31 oscillators U65
Varactor-tuned diode LC oscillator 252
G / reset phase detector U70, resistor R700 and capacitance
Low pass filter including C700 (1KHz or less), amplification
Elements R702, C703, R70 related to vessel A70
3, R704, and reference voltage V _bbDC amplifier 2 including
Consists of 50.

Another method for canceling the checker and the vertical enhancement effect is shown in FIG.
Since the switch SW100 is of low resistance, the checker and vertical deformation pulses are essentially (switch averaging) in the high / low state of the end-of-line (checker) and end-of-field (vertical deformation) pulses. By the voltage, which is the average voltage (by circuit 260):
Attenuation and / or level change or replacement. For example, if the checker and vertical deformation pulses have a high state of 30 IRE and a low state of 0 IRE, the capacitance C1 will be charged to a voltage of about (30 IRE-0 IRE) / 2 = 15 IRE. Switch SW100 is on by gate U304 during the checker period at the end of the line and on during the end of field pulse, during which time the voltage on capacitor C1 releases the enhanced copy inhibit signal. About 15I which is enough for
At the level of RE, the input video signal is invalidated.

In FIG. 35, the enhanced copy inhibit signal is provided to input amplifier A1, which is a sync separator 258.
, Which outputs a short-term frame pulse (ie, 10 microseconds) to reset the memory address content of circuit 260. On the other hand, the composite sync (which may include a pseudo sync pulse of the basic copy inhibition process according to the prior art) is provided to a horizontal phase lock loop circuit (PLL) U303. Thus, the output of PLLU 303 is a horizontal frequency pulse that starts approximately 2 microseconds before the front porch of the input video. The EPROM of circuit 260 has an output associated with the line position of the checker and end-of-field pulse in the TV field. One shot U10
0 outputs a pulse that matches the checker position in the horizontal line, and one-shot U200 and U300 output a pulse that matches the field end pulse in the horizontal line as U.
Generate a pulse as the 300 outputs have. The positions of the checker and the field end pulse are determined by the gate U20.
By being gated by 0 and U203 and ORed by gate U304, a pulse is output which coincides with the checker (EOL) and the end-of-field pulse of the input video signal. Switch SW103
Are turned on during their coincident time, and attenuate the enhanced copy protected signal with a resistor RS (capacitance C1
Averaging) to output a signal that is more easily viewed from the amplifier A2.

Another release method is to switch using one or both of the negative peak and positive peak clipper circuits during the presence of the checker (EOL) and vertical deformation (EOF) pulses, as shown in FIG. It is to do. The copy protected signal at the input is
6 clamped. The positions of EOF and EOL are identified by the circuit and input to the OR gate U305. Diode D1 clips the checker (high) gray pattern and the vertically deformed high gray pulse positively, making the recording easier to copy. Diode D2 sets the (low) black level of both EOL and EOF pulses to switch SW
Using the switch 101 and the switch SW102, the clip is negatively clipped to the gray level to make the recording easier to copy. Amplifier A
Reference numeral 7 buffers the switches SW101 and SW102, and outputs a copyable video signal.

The third canceling method detects a checker pulse and a vertical deformation pulse and adds an inversion pulse. The check pattern moves up and / or down,
Also, since the vertical deformation pulse moves up and down, the circuit of FIG. 37 detects the EOF and FOL pulses and makes them zero. Zeroing is not very effective because it reduces the checker or end-of-field pulse to approximately the blanking level (0IRE), but in some cases provides more aesthetically pleasing image quality (ideally, cancellation (Recall that the checker and end-of-field pulses need to be about 20 IRE or more in order to do so). Thus, zeroing causes the high and low states of the checker and end-of-field pulses to go to the low state (0IRE). FIG. 37 shows a zeroing circuit. The video from the amplifier A1 output of FIG. 35 includes the elements C15, D15, Vb15, and R
DC restored to a blanking level of about 0 volts by 15 and A246 supplies its output to switch SW124, which passes the checker and field end pulses based on OR gate U247. Gate U247 receives the position of the checker and end-of-field pulses identified by gates U202 and U203 in FIG. The inverter A82 has a switch SW
124 and inverts the inverted checker / field termination pulse via resistor R2 (resistor R1
Back to the input video (via), thereby zeroing the checker and end-of-field pulses (resistors R1 and R2 have the same value) Amplifier A209 buffers the video signal with the checker and end-of-field pulses zeroed (resistor R6 holds the DC bias to ground for inverting amplifier A82).

Still another release method (used for EOL and EOF pulses) is shown in FIGS.
As shown in the waveform (B), the peak active video is attenuated by about 20% from 100% to 80%, and further, the synchronization amplitude is increased (about 20%). This requires increasing the composite synchronization from 40 IRE to 60 IRE. Since the pseudo sync pulse as disclosed in U.S. Pat. No. 4,631,603 is 40 IRE, this method can also cancel the pseudo sync pulse. In a state where the composite sync pulse is extended, the sync detection circuit tends to detect only a large sync pulse and ignore a small sync pulse. Therefore, no pulse pair (sync pulse and AGC pulse) is detected. FIG. 38A shows an original input waveform of one video line. FIG. 38 (B) shows the video lines deformed for both the checker and vertical deformation pulses.

FIG. 38B shows a waveform having a modified sync amplitude of about 50% for standard video with checker and end-of-field pulses. Because the composite sync signal is large, the attenuation due to piracy is generally not sufficient, and the checker and end-of-field pulses have no effect when watching piracy. The horizontal and vertical syncs are modified even more so that the TV and VCR sync separators do not accidentally trigger.

FIG. 39 is a circuit for providing the waveform of FIG. 38 (B). Enhanced copy prohibition protection signal, gain 0.
8 amplifier A84. Their input signals are clamped and have a blanking level equal to 0V. The sync separation circuit 302 outputs the composite sync CS to the analog switch SW210 and the attenuator 300. Attenuation circuit 300 uses the offset voltage -V to attenuate the typical logic level of composite synchronization (i.e., 5V peak-to-peak). The attenuation circuit 300 outputs a regenerated composite sync that is at a level of −60 IRE from 60 IRE (0 IRE equals 0 V). The switch SW210 selects this new regenerated synchronization, and outputs a waveform as shown in FIG. 38 (B) via the amplifier A505.

Another release method, as shown in the circuit of FIG. 40, tracks and captures the active video line and
Replace the checker pulse with the last value of the active video before the start of the pulse. By using the A1 output and U202 output from the circuit of FIG. 35 in conjunction with the circuit of FIG. 40, it is possible to release the checker by tracking and capturing. This method is similar to re-inserting a known voltage during the checker pulse. Most program contents are more than 0IRE (especially in NTSC, black level is 7.5 IR)
E), so video tracking and capture generally
A level above 7.5 IRE is sufficient to release the checker when this level is reinserted into the checker position.

The amplifier A90 receives an input from the amplifier A1 in FIG. Amplifier A90 has a delay of 100 ns to 200 ns (due to a delay line or low pass filter) and the pulse from gate U202 tracks and captures the video 100 ns to 200 ns immediately before the checker pulse. Switch 310 is off at the time of the checker pulse and on at all other times. Therefore, switch 30
0 goes off and the output of amplifier A92 is essentially video transparent until capacitor C107 inserts the last programmed pixel (about 7.5 IRE or more) during the checker pulse time for about 2 microseconds. is there.

Another canceling method shown in the waveforms of FIGS. 41A and 41B adds a high-frequency signal to the EOF and EOL pulses, and effectively causes a level change according to the average DC level of the high-frequency signal. . FIG. 41A shows a video input signal including an EOF pulse in the upper waveform, and a high-frequency level change signal having a frequency of 0.1 MHz to 5 MHz in the lower waveform. The lower waveform of FIG. 41A can be applied to checker pulses as well (eg, at a frequency of 3 MHz). The resulting VCR recording signal is shown in FIG. 41 (B) and has a wavy portion at a frequency of 3 MHz. For added high frequency signals, the VCR responds only to the average DC level, thus causing the high and low states of the EOF and / or EOL pulses to change level and lose effect.

Since the above-mentioned enhancement also depends on the circuit of the TV set, as shown in FIG.
(Release) circuit 322 may be connected between the playback VCR 320 and the TV set 324 to ensure a more ornamental illegal tape copy image using the RF modulator 326 if necessary. Pre-sync pulse to release horizontal and vertical deformations Synchronous pulse replacement wider than normal (ie, normal sync is 4.7 microseconds, whereas wide sync is 6-10 microseconds), but vertical deformation (field termination) ) And checker (end-of-line) pulses are described below, respectively.

In a sync separator used in a TV set as shown in FIG. 13 of the prior art, a composite sync pulse charges an input sync separation coupling capacitance C. The clip threshold is a function of the average charging time per TV line.
The longer the charging time, the farther the clipping point is from the blanking level. The cut-out point is the resistance R
Since the voltage rises toward the blanking level by the action of _b and the capacitance C, the synchronizing pulse preceding the line end pulse temporarily delays the rise and prevents cutting out during the line end pulse or the field end pulse.

FIG. 43A shows the response of the TV sync separator to a TV signal (inverted video representation) with only the checker copy prohibition enhancement added to the basic copy prohibition process of US Pat. No. 4,631,603. The TV sync separation cutout point 328 is clearly in the "A" area (checker area), thus causing an on / off pre-sync pulse such that a checker pattern appears in the image of the TV set.

The waveform of FIG. 43B shows the result of a synchronization pulse wider than normal. The TV synchronization separation cutout point 330 at this time is obviously not in the “A” checker area, and the TV does not display the checker pattern. In order to guarantee the color lock of TV and VCR, the color burst waveform is set to “CB” over the entire horizontal synchronization area.
It may need to be added to the "X" region.

FIG. 44 (A) and FIG. 44 (B)
FIG. 7 shows a normal video horizontal sync pulse and a widened horizontal sync pulse, wherein the second half of the widened horizontal sync pulse has a regenerated color burst (CB) added thereto;
Further, a color burst is added after the trailing edge of the spread horizontal synchronization pulse. The added regenerated color burst ensures that whether the TV triggers off the color burst on the leading edge of the synchronization or off on the trailing edge, there is still a color burst locked for the TV set. To

Since the vertical deformation pulse is generally at the invisible lowermost end of the TV field, a regenerated color burst is not required at the position of the vertical deformation pulse synchronization. The following describes that adding the sync pulse and the pre-sync pulse negates (cancels) the effects of the field end and line end pulses. By adding the sync pulse and the pre-sync pulse, the sync separator coupling capacitance C of the TV becomes more charged. Therefore, the cutout point of the sync separation circuit is separated from the blanking level, and the line end pulse and the field end pulse can be avoided.

The waveform in FIG. 43C shows a video to which a pre-sync pulse has been added, and the sync separator cut-out point 331 of the TV or VCR does not go to the line end position. A similar result is shown in FIG. 45C for a vertically deformed pulse into which a pseudo sync pulse has been inserted. FIG.
(A) shows a vertically deformed pulse "B" having a normal H sync width and a TV sync separator cutout point 336.
Note that the clipping point 336 of the TV sync separator clips the vertical deformation pulse B. FIG. 45 (B)
Shows the corresponding waveform with a widened H sync width,
The cutout point 338 of the TV sync separator does not cut into the “B” region (vertical deformation pulse).

Further Horizontal Deformation of Post-Sync Pulse FIG. 46 shows that the effect of copy prohibition is increased when illegally copied in conjunction with the above-described basic copy prohibition process of US Pat. 3 shows a circuit for adding a post-quasi-sync pulse (to reduce). The video that has undergone the basic copy prohibition processing and the other enhancement processing described above is input to the resistor R9. Amplifier A1 buffers the input video and supplies it to sync separator U6 via capacitor C1. The vertical sync output of sync separator U6 resets 12 bit counter U1. Counter U1 is clocked by horizontal sync from PLLU2 locked to composite sync. EPROM U3 selects on which line the post pseudo sync (PPS) appears. EPROM
As selected by U3, the post-pseudo-sync may be pseudo-randomly arranged. Signal D0 (EPROMU
3) appropriately suppresses the one-shot OS3. The burst gate signal from sync separator U6 is inverted and low-pass filtered by capacitor C2 and resistor R2. The voltage Vgen is a signal (ie, a 300 Hz triangular waveform).
In the volume C2. This causes a time-variable threshold change to the one-shot OS3, and thus a position change. The output of the one-shot OS3 is a fixed (ie, 1.5 microsecond duration) pulse with a pulse position change of, for example, ± 1 microsecond. The output of the one-shot OS3 blanks any video to the blanking level by the switch SW1, and adds a pulse by the variable resistor R7 to generate a post pseudo sync pulse. The coupling amplifier A3 is a one-shot OS3
To maintain the correct shape of the added post pseudo sync pulse. From FIG. 47 (A) to FIG.
(E) shows the waveforms at various points in the circuit of FIG. 46, as labeled. The amplitude of the post pseudo-synchronization may be amplitude-modulated by Vgen2 and a voltage control amplifier A41 which is an integrating amplifier. Amplifier A4
The output of 1 changes in amplitude according to Vgen2, and is 0 V when the post pseudo sync pulse is off.

Release Method and Apparatus for Post Synchronization Enhancement FIG. 48 shows another release circuit used for "video-in" including the post-pseudo-sync pulse (PPS) described above, where the video input has a capacitance C1. The signal is supplied to the synchronous separator U1 via the synchronous separator U1. That is, the circuit of FIG. 48 reduces or eliminates the effect of the PPS pulse, and enables recording of a video signal. Sync separator U1 supplies the composite sync to horizontal phase lock loop U2. H-PLLU2 (after burst)
The phase is determined to start in the region of the post pseudo sync pulse. One shot U5 triggers H-PLLU2 and generates a pulse including a post-pseudo sync pulse. The vertical sync from the one-shot sync separator U1 triggers the sync separator U4 to generate a TV pulse that extends from line 4 to line 21, the one-shot U4 triggers the one-shot U5, and the line 22 to line 2
Generate up to 62 active field pulses. The output of one shot U5 (which coincides with a period other than the vertical blanking period) gates AND gate U10, and the output of gate U10 is turned on only during the period of the active TV field.

Thus, the output of gate U10 indicates the position of the post-pseudo sync pulse in the active field.
FIGS. 49 (A), (B), and (C) show labeled waveforms at three points in the circuit of FIG. FIG.
FIG. 48A shows that the output signal of the gate U10 in FIG.
A state in which a pulse (PPSD) coincident with the signal is generated and further subjected to a level change by an analog integrator U16 (part number 1494) to release the post pseudo sync pulse is shown. The integrator U6 increases or decreases the gain while the post-pseudo-unsynchronization pulse U10 is present. When signal VID1 is provided to integrator U1, the sync tip is at 0V at VID1. By increasing the gain at an appropriate time, the waveform Z of FIG. 50B is obtained as a result. By using signal VID2 instead of VID1 and using the output of gate U10 for integrator U6,
The signal is reset so as to be attenuated at the time of the positive going pulse which is the output of 0, and the gain is reduced at an appropriate time. As a result, the waveform Y of FIG. 50 (C) is generated and the processing is canceled.

By using the signal VID2 for the analog switch SW220 in the circuit of FIG. 50D, the output of the gate U10 controls the switch SW220 to insert a reference voltage. When VR is 0 V, a post-pseudo sync with blank erasure is obtained from the waveform X in FIG. If VR is the sync tip voltage (i.e., -40 IRE), the waveform U of FIG. 50 (F) that generates an additional H sync pulse having a fixed amplitude and position is obtained. This causes a fixed horizontal image shift in most TV sets and there is no "wobble" that the post pseudo sync pulse would otherwise have caused.

By applying the output of the gate U10 to the amplifier A6 of the circuit of FIG. 50 (G), a level change is performed to cancel the post pseudo sync pulse, and the waveform in this case is shown in FIG. 50 (B). . FIG. 50H shows the position of the PPS and the level change. Finally, narrowing the post-pseudo sync pulse for effect cancellation is done by cutting out the sync. As shown in FIG. 51A, an amplifier A7 has a resistor R100 and an inductance L1.
00 and a video VID2 with a color subcarrier blocked by a notch filter consisting of a capacitor C100. The output of amplifier A7 is _Vbb2 at about -10 IRE.
, Both normal synchronization and post-pseudo synchronization are cut out. AND gate U7 and gate U10
By using the PPS from FIG. 48 (FIG. 48), gate U7 outputs a pulse that is inverted but identical in logic level to the original post pseudo sync pulse. One shot U8 is 90% of the pulse period of the post pseudo sync pulse.
The switch SW224 is time-controlled as described above, and cuts the leading edge of the pseudo sync pulse by 90% or more.
Control. The result is the waveform "Video Out DD" seen in FIG. 51 (B), which has a very narrow post-pseudo sync pulse, so that in any video device (VCR or TV set) Has no effect. The output of gate U7 (FIG. 51A) is
By adding to the amplifier A6 of FIG. 50 (G) via the resistor R6, an output in which the level of the post-pseudo-sync is changed as shown in FIG. 50 (H) is obtained. This method can also partially or completely override the amplitude of the post-pseudo-sync pulse, resulting in an attenuated post-pseudo-sync.

Method and Apparatus for Reducing the Effect of the Basic Copy Inhibit Signal The basic copy inhibit signal consisting of the pseudo sync and AGC (ie, basic copy inhibit) pulses added (as described above) A method and apparatus for reducing the effects without deforming the added pulses will be described below. Unlike the method described above, which modifies the added pulse by amplitude decay, level change, or pulse narrowing to nullify the effect of the added pulse, the method uses AGC
And the effect of the added pulse is reduced by further adding another pulse that neutralizes the gain reduction due to the pseudo sync pulse.

US Pat. No. 4,631,603 describes a VCR AG.
The manner in which the C circuit measures the input video signal using the synchronization and back porch samples will now be described. By adding an additional sync pulse with a very high level of back porch, a gain reduction occurs. VCR AGC
Since the circuit continuously samples the amplitude of the sync (using sync samples and back porch samples), the method removes all back porch levels from blanking and below the blanking level (ie, for NTSC video). About-
20 IRE unit), thereby invalidating a certain copy inhibition signal. Also, in the method, there is no copy inhibit signal including the AGC and the pseudo sync pulse,
In the region at the bottom (end of field) of the TV field, it is possible to add a further pseudo sync pulse. These "further" pseudo sync pulses are followed by pulses below the blanking level.

Referring to FIG. 52, a basic copy protected video ("Video In") is transmitted to sync separator U2 (part number LM).
1881 or its equivalent). The composite sync from sync separator U2 uses the trailing edge of the sync to
Trigger a three microsecond one shot U3. The vertical sync from sync separator U2 is one shot U4 and U
Trigger 5 to form an active field pulse as an input to AND gate U1, which ANDs the active field pulse with the output of one shot U3. Thus, the output of gate U1 will be a 3 microsecond back porch pulse during the active TV field (or one shot U4 and U5 are not needed and U1, U4 and U5 are eliminated, and the output of one shot U3 becomes Supplied directly to resistor R6). Resistor R3 is a negative summing resistor that subtracts a level from the video input back porch. Input amplifier A
0 buffers the video input, capacitance C3, diode D
1, a resistor R3, and a voltage Vb. The output of the negative feedback amplifier A3 is a resistor R7
And at this output, the back port is pulled down (see FIGS. 54 (A) to 54 (G), which show the signals at various positions in FIG. 52 as labeled).

The circuit shown in FIG. 53 is the same as the circuit shown in FIG.
And the last 10 or 11 lines of each TV field are coded with a pseudo sync pulse and below the blanking level, ie, -10 IRE to -30 IR.
Replace with a TV line containing a pair with the AGC pulse E. Video from the terminal of diode D1 in FIG. 52 includes video DC restored to 0V for a blanking level of 0IRE. The amplifier A2 in FIG. 53 amplifies this video and sends it to the horizontal fixed transmitter U11 (oscillator CA).
(Pin 1 at 31541, where the sync tip from amplifier A2 is 7V). The output of the oscillator U11 is a 32H phase lock loop, and outputs a signal having a frequency of 503 KHz. This 503 KHz output signal is output from the amplifier A2.
Amplified for the logic level by the binary divider U1
Input to 0.

The coupling amplifier A4 has an on-state of about 2 microseconds and an off-state of 2 microseconds and has an amplitude of -20 IRE to -4 IRE.
It outputs a square wave signal which is 0IRE. Voltage Vbb and resistor R9 set the proper DC offset voltage, while resistors R10 and R11 set the proper amplitude. In FIG. 52, one shot U6 generates an active line pulse for a period of 32 microseconds from the start of the active horizontal line, and one shots U7 and U8 are triggered by a vertical synchronization pulse to output the last 11 lines of the active TV field. It goes high between. AND gate U in FIG.
9 thus produces a 4 microsecond square wave from -20 IRE to -40 IRE during the last 11 horizontal active lines of the TV field (where pseudo sync and AGC pulses are not generally located). . Amplifier A
5 and resistor R12 output a modified copy inhibit signal with the reduced back porch pulse and the new pseudo sync and reduced negative AGC pulse.

The modified video signal provided by the circuits of FIGS. 52 and 53 causes the AGC amplifier of the VCR to make inaccurate measurements. As a result, based on the measurement of the pseudo sync pulse with the reduced level AGC pulse (and the reduced back porch), it appears to the VCR that a low level video signal is present, and therefore the VC
R increases the gain of the AGC amplifier. This offsets the gain reduction of the VCR's AGC amplifier due to the basic copy prohibition process. In one embodiment, the added pseudo-sync pulses at the EOF location each include a blanking level (0I) following the trailing edge of the added pseudo-sync pulse.
RE) having a period of at least about 2 microseconds,
Cancel EOF (vertical) deformation. This is achieved in various ways by the switch or waveform replacement circuit described above. This is particularly effective when the EOF deformation is 10IR
This is a case where the amplitude from E is 20 IRE or more. If there is no blanking level under these conditions,
The EOF deformation is reduced, but the effect of the basic copy prohibition process is increased, and thus the EOL deformation is increased, preventing the entire copy inspection process from being released.

The above description of the invention is illustrative and not restrictive, and other modifications in accordance with the present invention will be apparent to those skilled in the art based on this disclosure, It is intended to be within the scope of the appended claims.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams showing a normal image and a deformed image with a horizontal deformation checker pattern and a vertical deformation arrangement, respectively.

FIGS. 2A and 2B show images obtained from a video signal having a normal amplitude, showing a case without a checker pattern and a case with a checker pattern, respectively.

3 (A), (B) and (C) show the same image displayed on a television set in the case of a video signal of reduced amplitude, without the checker pattern and vertical deformation, and in the checker, respectively. It is a figure showing about the case where a pattern and vertical deformation are accompanied.

FIG. 4 shows a part of a video signal with a checker pattern.

FIGS. 5A and 5B respectively show a portion of a video signal with vertical deformation that does not extend to the horizontal and vertical blanking periods and a portion of the video signal with vertical deformation that extends to the vertical blanking period. It is a figure which shows the added vertical deformation | transformation extended to a horizontal blanking period.

FIG. 6 shows a circuit for applying a video signal modification according to the invention.

FIG. 7 shows a circuit for applying a video signal modification according to the invention.

FIG. 8 shows a circuit for applying a video signal modification according to the invention.

FIG. 9 is a diagram showing waveforms for explaining the operation of the circuits of FIGS. 6 to 8;

FIG. 10 is a diagram showing waveforms for explaining the operation of the circuits of FIGS. 6 to 8;

FIG. 11 is a diagram showing details of the flicker generator of FIG. 7;

FIG. 12 is a diagram showing another embodiment of a circuit for applying a video signal modification.

FIG. 13 is a diagram illustrating a sync separation circuit according to the related art.

14A to 14D are diagrams showing video waveforms illustrating horizontal sync pulse narrowing.

15A to 15D are diagrams showing video waveforms illustrating horizontal sync pulse narrowing.

16 (A) to (D) are diagrams showing video waveforms illustrating horizontal sync pulse narrowing.

17 (A) to (C) are diagrams showing video waveforms illustrating horizontal sync pulse narrowing.

18A is a block diagram of a circuit for narrowing a horizontal synchronization pulse, and FIG. 18B is a diagram showing a waveform at a point Q in FIG. 18A and a signal at R which is an output of an amplitude adjustment amplifier. FIG.

FIG. 19 is a diagram showing a circuit for narrowing a horizontal synchronization pulse in detail.

FIG. 20 is a circuit portion following FIG. 19 and shows a circuit for narrowing the horizontal synchronization pulse in detail.

FIGS. 21 (A) and (B) are block diagrams of an apparatus that combines synchronization pulse narrowing and horizontal and vertical deformation.

FIG. 22 is a block diagram of an apparatus for removing various video signal distortions.

FIG. 23 is a circuit diagram of a circuit that removes a copy prohibition process enhancement signal by level change and horizontal synchronization replacement.

FIG. 24 is a circuit diagram of a circuit that removes a copy prohibition process enhancement signal by level change and horizontal synchronization replacement.

FIG. 25 is a circuit diagram of a circuit that removes a copy prohibition process enhancement signal by level change and horizontal synchronization replacement.

FIG. 26 is a circuit diagram of a second circuit that removes a copy prohibition process enhancement signal by new synchronization and burst position replacement.

FIG. 27 is a circuit diagram of a third circuit that removes a copy prohibition process enhancement signal by integration.

FIG. 28 is a circuit diagram of a circuit for removing a copy prohibition process enhancement signal by a switching unit.

FIG. 29 is a circuit diagram of a circuit for removing a copy prohibition process enhancement signal by a switching unit.

FIG. 30 is a circuit diagram of a circuit for removing a copy prohibition process enhancement signal by a switching unit.

FIG. 31 is a diagram showing a circuit for nullifying an enhancement signal using synchronization spreading.

FIG. 32 is a diagram showing a circuit for nullifying an enhancement signal using synchronization spreading.

FIG. 33 is a diagram showing a circuit for nullifying an enhancement signal using synchronization spreading.

FIGS. 34A to 34H show FIGS. 24A and 2
FIG. 4B is a diagram showing a waveform of the circuit of FIG.

FIG. 35 is a circuit diagram showing another circuit for canceling an enhancement signal by DC component averaging and attenuation.

FIG. 36 is a circuit diagram showing a further circuit for releasing an enhancement signal by clipping.

FIG. 37 is a circuit diagram showing still another circuit for releasing the enhancement signal.

FIGS. 38 (A) and (B) are diagrams showing waveforms for explaining enhancement signal release by increasing the synchronization amplitude.

FIG. 39 is a circuit diagram of a circuit for releasing an enhancement signal by increasing a synchronization amplitude.

FIG. 40 is a circuit diagram showing another circuit for releasing the enhancement signal by the tracking and capturing circuit.

FIGS. 41A and 41B are diagrams showing waveforms for explaining cancellation of an enhancement signal by adding an AC signal.

FIG. 42 is a circuit diagram showing a circuit that combines a circuit for releasing an enhancement signal;

FIGS. 43 (A), (B) and (C) are diagrams showing waveforms for explaining synchronous clipping.

FIGS. 44A and 44B are diagrams showing waveforms for explaining the effect of extended synchronization.

FIGS. 45 (A), (B) and (C) are diagrams showing further synchronization cut-out points.

FIG. 46 is a circuit diagram showing a circuit for enhancing a checker pattern using a post-sync pulse.

FIGS. 47A to 47E are diagrams showing waveforms for explaining the operation of the circuit in FIG. 46;

FIG. 48 is a circuit diagram showing a circuit for canceling post-sync pulse enhancement.

FIGS. 49A to 49C are diagrams showing waveforms for explaining the operation of the circuit in FIG. 48;

50 (A), (D) and (G) are circuit diagrams showing a circuit for canceling a post pseudo sync pulse.
(B), (C), (E), (F), and (H)
FIG. 6 is a diagram showing waveforms for explaining the operation of the circuits of FIGS.

FIG. 51A is a circuit diagram showing a circuit for canceling a post pseudo sync pulse by pulse narrowing, and FIG.
FIG. 3 is a diagram showing waveforms for explaining the operation of the circuit of FIG.

FIG. 52 is a circuit diagram showing a circuit for canceling the basic copy prohibition processing of the related art.

FIG. 53 is a circuit diagram showing a circuit for canceling the basic copy prohibition processing of the related art.

FIGS. 54A to 54G are FIGS. 42A and 4B; FIGS.
FIG. 3 is a diagram showing waveforms for explaining the operation of the circuit of FIG.

[Explanation of symbols]

 7 Upper overscan part 9 Lower overscan part 10 Normal television image 11 Visible video 12 Deformed television image 14 Left overscan part 16 Right overscan part 24 Gray square 26 Black square 32 Left overscan part 34 Right over Scanning part 36 Active video 38 Horizontal image element 43 Horizontal division 42 Checker pattern 44 Black checker 46 Gray checker 50 Image 60 Horizontal blanking period 62 Horizontal sync pulse 66, 68 Active video 74 Intermediate gray level signal 76 Black level signal 82 Color burst 87 Vertical pattern

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Coacolan, Jeremy Jay United Kingdom Middlesex Ubi 8 3S Wyxbridge Cowley New Peach L. 76 (72) Inventor Ryan John O United States of America 95014 Cupertino Creekside Court 22015 (72) Inventor Kuan, Ronald United States of America 95014 Cupertino Underrich Drive 10910

Claims (16)

[Claims] 1. A method of releasing a copy protection process for adding a pseudo sync and an AGC pulse to a video signal, wherein the amplitude of at least a part of an active video portion of the video signal is reduced; A method that includes increasing the amplitude of a pulse. 2. A method for canceling the effect of a video copy prohibition process of adding a pulse during a blanking period of a video signal, wherein a back porch portion of the video signal having a blanking level amplitude is replaced with the blanking level. A method comprising replacing with a signal having the following amplitude: 3. The method of claim 2, wherein said amplitude below said blanking level is about -20 IRE units. 4. Generating a plurality of negative-going pulses; about the last 10 of at least some fields of said video signal.
3. The method of claim 2, further comprising applying the plurality of negative-going pulses to an active line. 5. The method of claim 2, further comprising the step of modifying the portion of the video signal following each added negative going pulse to a blanking level of the video signal for a predetermined period. 6. The method of claim 2, wherein said replacing comprises applying a negative level change pulse to said back porch portion of said video signal. 7. A method for releasing a video copy protection process that adds a pair of negative and positive going pulses during a blanking period of a video signal, thereby enabling recording of an observable copy of the video signal. Determining a particular portion of at least some video lines of the video signal in which the added pulse is present; reducing the level of the particular portion below the blanking level of the video signal; A method that includes steps. 8. The method of claim 7, wherein said particular portion includes a back porch of each of said video lines. 9. The method of claim 7, wherein said level is less than about -20 IRE units. 10. Determining a portion of each field of the video signal that does not include the added pulse; generating a plurality of negative going pulses; about -10 IRE to -30 IRE.
The method of claim 9 further comprising: generating a plurality of positive-going pulses having the following levels: adding the plurality of generated negative-going pulses and positive-going pulses to the determined portion of each field. the method of. 11. A device for canceling a copy prohibition process for adding a pair of negative going pulses and positive going pulses during a blanking period of a video signal, the device having a blanking level amplitude of the video signal. Apparatus comprising: means for determining a back porch portion of a video signal; and means for replacing the back porch portion with a signal having an amplitude below the blanking level. 12. A generator for generating a plurality of negative-going pulses; and means for applying the plurality of negative-going pulses to about the last ten lines of at least some fields of the video signal. The apparatus according to claim 11, 13. An apparatus for canceling a video copy protection process for adding a pulse during a blanking period of a video signal, comprising: a generator for generating a signal below a blanking level of the video signal; A timing circuit for determining the duration of a particular portion of at least some lines of the video signal; and an additional circuit for adding the generated signal to the video signal with the determined duration. Including equipment. 14. A method for releasing a copy protection process for adding a pseudo sync and an AGC pulse to a video signal, wherein the pseudo sync pulse has a smaller amplitude than a sync pulse of increased amplitude. Increasing the amplitude of the sync pulse portion of the video signal relative to the video signal without changing the amplitude of the pseudo sync pulse, wherein the negative amplitude from the blanking level of the sync pulse is By modifying the video signal to be greater than the negative amplitude of the sync copy protection pulse from the blanking level, the increased sync pulse allows for normal detection by the recorder sync separator and a pseudo sync pulse. A method for preventing the detection of a video signal, thereby enabling the copying of the video signal. 15. An apparatus for canceling copy protection processing for adding a pseudo sync and an AGC pulse to a video signal, comprising receiving a video signal input including the pseudo sync and the AGC pulse, and converting a sync pulse in the video signal. A sync detector for detecting and ignoring a pseudo sync pulse; receiving the video signal input and increasing the amplitude of the sync pulse of the video signal without changing the amplitude of the pseudo sync pulse and the video portion of the video signal An amplifier controlled by the output of the sync detector so that the negative amplitude of the sync pulse from the blanking level is greater than the negative amplitude of the pseudo sync copy protection pulse from the blanking level. By modifying the video signal, the increased sync pulse allows for normal detection by a recorder sync separator and a pseudo sync. Prevents detection of pulse, thereby apparatus for enabling copying of said video signal. 16. A method for releasing a copy protection signal including a pseudo sync and / or AGC pulse and a normal sync pulse, wherein the amplitude portion of the normal sync pulse is increased from the amplitude portion of the pseudo sync pulse. A method comprising the steps of: detecting a normal sync pulse only using a sync pulse detection system in a recorder used to copy a video signal to enable normal recording of the copy protection signal.