JPH1041677A - Electromagnetic interference shield type printed wiring board and manufacture thereof - Google Patents
Electromagnetic interference shield type printed wiring board and manufacture thereofInfo
- Publication number
- JPH1041677A JPH1041677A JP19714496A JP19714496A JPH1041677A JP H1041677 A JPH1041677 A JP H1041677A JP 19714496 A JP19714496 A JP 19714496A JP 19714496 A JP19714496 A JP 19714496A JP H1041677 A JPH1041677 A JP H1041677A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- holes
- cutting
- electromagnetic interference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電磁干渉（以下、
「ＥＭＩ」と言う）シールド型の印刷配線板の構造及び
その製造方法に関するものである。[0001] The present invention relates to electromagnetic interference (hereinafter referred to as "electromagnetic interference").
The present invention relates to a structure of a shield type printed wiring board and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】図４乃至図６は従来の印刷配線板の一例
を示すもので、図４はその印刷配線板を製造途中の状態
で示す要部外観図、図５は図４のＢ−Ｂ線に沿う拡大断
面図、図６はその印刷配線板を完成後の状態で示す要部
外観図である。図４乃至図６において、印刷配線板５１
は多層構造となっており、内部には高速回路（不図示）
や高速回路部品（不図示）を実装するための印刷回路５
２が本例では３層形成されている。また、印刷配線板５
１の両面の表層及び印刷回路５２の間における中層には
ベタパターンでなるグランド層５３が形成されている。2. Description of the Related Art FIGS. 4 to 6 show an example of a conventional printed wiring board. FIG. 4 is an external view of a main part of the printed wiring board in a state of being manufactured, and FIG. FIG. 6 is an enlarged sectional view taken along the line B, and FIG. 6 is an external view of a main part of the printed wiring board in a state after completion. 4 to 6, the printed wiring board 51
Has a multi-layer structure and has a high-speed circuit (not shown) inside.
Printed circuit 5 for mounting high-speed circuit components (not shown)
2 are formed in three layers in this example. In addition, the printed wiring board 5
A ground layer 53 having a solid pattern is formed in the middle layer between the printed circuit 52 and the surface layer on both sides of the first printed circuit.
【０００３】さらに、完成前の印刷配線板５１には、そ
の外端部分に、組立時に自動機で搬送及び位置決めする
等に使用されるダミー部５４が設けられており、組立
後、このダミー部５４を切り離すための細長い切断用穴
５５が線状に並べて点在された状態で形成されている。
また、組立後は、この切断用穴５５の間の部分を、仮想
線５６に沿って切断し、ダミー部５４を切り離して廃棄
する。図６はダミー部５４を廃棄した後の印刷配線板５
１を示しており、符号５７で示す部分が切断された部分
であり、符号（５５）で示す部分が切断用穴５５の跡と
なる切欠部分である。そして、このように構成された印
刷配線板５１では、上下両面の表層及び印刷回路５２の
間における中層に設けたグランド層５３とにより、中層
に高速回路を形成してなる印刷回路５２（以下、これを
「信号層５２」と言う）からのＥＭＩノイズの放射を抑
制しようとしている。Further, the printed wiring board 51 before completion is provided at its outer end with a dummy portion 54 used for carrying and positioning by an automatic machine at the time of assembling. Elongated cutting holes 55 for cutting off the holes 54 are formed in a state of being scattered and arranged in a line.
After the assembly, the portion between the cutting holes 55 is cut along the imaginary line 56, and the dummy portion 54 is cut off and discarded. FIG. 6 shows the printed wiring board 5 after the dummy portion 54 has been discarded.
1, a portion indicated by reference numeral 57 is a cut portion, and a portion indicated by reference numeral (55) is a cutout portion which is a mark of the cutting hole 55. In the printed wiring board 51 configured as described above, a printed circuit 52 (hereinafter, referred to as a printed circuit) formed by forming a high-speed circuit in the middle layer by the surface layer on the upper and lower surfaces and the ground layer 53 provided in the middle layer between the printed circuits 52. This is called “signal layer 52”) to suppress the emission of EMI noise.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上述し
た従来の印刷配線板５１の構造では、信号層５２の高速
回路の垂直方向から放射されるＥＭＩノイズの抑制には
効果が得られるが、水平方向から放射されるＥＭＩノイ
ズの抑制効果が得られないと言う問題点があった。However, the structure of the conventional printed wiring board 51 described above is effective in suppressing EMI noise radiated from the vertical direction of the high-speed circuit of the signal layer 52, but is effective in the horizontal direction. There is a problem that the effect of suppressing the EMI noise radiated from the laser cannot be obtained.
【０００５】本発明は、上記問題点に鑑みてなされたも
のであり、その第１の目的は垂直方向に放射されるＥＭ
Ｉノイズと水平方向に放射されるＥＭＩノイズの何れも
抑制して、全体としてＥＭＩノイズの少ない印刷配線板
の構造を提供することにある。本発明の第２の目的は垂
直方向に放射されるＥＭＩノイズと水平方向に放射され
るＥＭＩノイズの何れも抑制して、全体としてＥＭＩノ
イズの少ない印刷配線板の製造方法を提供することにあ
る。[0005] The present invention has been made in view of the above problems, and a first object of the present invention is to provide a vertically radiated EM.
It is an object of the present invention to provide a structure of a printed wiring board having less EMI noise as a whole by suppressing both I noise and EMI noise radiated in the horizontal direction. It is a second object of the present invention to provide a method of manufacturing a printed wiring board having less EMI noise as a whole by suppressing both EMI noise radiated in the vertical direction and EMI noise radiated in the horizontal direction. .
【０００６】[0006]
【課題を解決するための手段】本発明は上記第１の目的
を達成するために、次の技術手段を講じたことを特徴と
する。すなわち、前記印刷配線板の外周部で内側にメッ
キ壁を設けて線状に点在して形成され、その後、その切
断用穴との間が切断されてなる面を有するとともに、前
記印刷配線板の表層のベタパターンと前記メッキ壁が電
気的に接続されてなる構成としたものである。The present invention is characterized by taking the following technical means in order to achieve the first object. That is, the printed wiring board has a surface formed by providing a plating wall on the inner side at the outer peripheral portion and scattered linearly, and then having a surface that is cut between the cut holes and the printed wiring board. And the plating wall is electrically connected.
【０００７】このようにして作られた電磁干渉シールド
型印刷配線板では、印刷配線板のベタパターンと切断用
穴の内壁に設けたメッキ壁を電気的に接続したことによ
り、中層に形成した高速回路の印刷回路から垂直方向に
放射するＥＭＩノイズを表層のベタパターンが抑制し、
水平方向に放射するＥＭＩノイズを表層のベタパターン
と電気的に接続された切断用穴のメッキ壁が抑制する。
これにより、垂直と水平の双方に放射されるＥＭＩノイ
ズの何れをも抑制することができる。In the electromagnetic interference shield type printed wiring board manufactured as described above, the solid pattern of the printed wiring board and the plating wall provided on the inner wall of the cutting hole are electrically connected to each other, so that the high speed formed in the middle layer is formed. The solid pattern on the surface suppresses the EMI noise radiated in the vertical direction from the printed circuit of the circuit,
The EMI noise radiated in the horizontal direction is suppressed by the plating wall of the cutting hole electrically connected to the solid pattern on the surface.
This makes it possible to suppress any of the EMI noise radiated both vertically and horizontally.
【０００８】また、本発明は上記第２の目的を達成する
ために、次の技術手段を講じたことを特徴とする。すな
わち、表層と中層にパターンを有する多層構造の印刷配
線板の製造方法において、前記印刷配線板の外周部に複
数の切断用穴を線状に点在させて設けるとともに、前記
切断用穴の内側にメッキ壁を前記印刷配線板の表層のベ
タパターンと電気的に接続して設け、その後、前記切断
用穴間の前記印刷配線板の部分を切断してなるようにし
たものである。Further, the present invention is characterized by taking the following technical means in order to achieve the second object. That is, in the method of manufacturing a printed wiring board having a multilayer structure having a pattern on a surface layer and a middle layer, a plurality of cutting holes are provided in the outer peripheral portion of the printed wiring board so as to be linearly dotted, and the inside of the cutting hole is provided. And a plating wall electrically connected to the solid pattern on the surface layer of the printed wiring board, and thereafter, the portion of the printed wiring board between the cutting holes is cut.
【０００９】この製造方法によれば、上記電磁干渉シー
ルド型印刷配線板を簡単に形成することができる。According to this manufacturing method, the electromagnetic interference shield type printed wiring board can be easily formed.
【００１０】[0010]
【発明の実施の形態】以下、本発明の実施の形態を図面
を用いて詳細に説明する。図１乃至図３は本発明に係る
印刷配線板の一形態例を示すもので、図１は図２のＡ−
Ａ線に沿う拡大断面図、図２はその印刷配線板を製造途
中の状態で示す要部外観図、図３はその印刷配線板を完
成後の状態で示す要部外観図である。図１乃至図３にお
いて、印刷配線板１は多層構造となっており、内部（中
層）には高速回路（不図示）や高速回路部品（不図
示）、及び電源回路を実装するための印刷回路２が本形
態例では３層形成されている。また、印刷配線板１の両
面の表層及び印刷回路２の間における中層にはベタパタ
ーンでなるグランド層３が形成されている。Embodiments of the present invention will be described below in detail with reference to the drawings. 1 to 3 show an embodiment of a printed wiring board according to the present invention. FIG.
FIG. 2 is an enlarged sectional view taken along the line A, FIG. 2 is an external view of a main part of the printed wiring board in a state of being manufactured, and FIG. 3 is an external view of a main part of the printed wiring board in a state after completion. 1 to 3, a printed wiring board 1 has a multilayer structure, and a high-speed circuit (not shown) and a high-speed circuit component (not shown) and a printed circuit for mounting a power supply circuit are provided inside (middle layer). 2 is formed in three layers in this embodiment. In addition, a ground layer 3 having a solid pattern is formed in a surface layer on both surfaces of the printed wiring board 1 and an intermediate layer between the printed circuits 2.
【００１１】さらに、完成前の印刷配線板１には、その
外端部分に、組立時に自動機で搬送及び位置決めする等
に使用されるダミー部４が設けられており、組立後、こ
のダミー部４を切り離すための細長い切断用穴５が線状
に並べて点在された状態で形成されている。なお、本形
態例の場合では、切断用穴５の長さＬ１（図２参照）は
約５０〜１００ミリ、隣接し合う切断用穴５と切断用穴
５の間隔Ｌ２は約１〜２ミリである。加えて、切断用穴
５の内壁には、この切断用穴５が加工された後からメッ
キ壁１１が設けられている。このメッキ壁１１は、グラ
ンド層３と同じ材質であり、銅を下地として半田メッキ
されているとともに、グランド層３と電気的に接続さ
れ、導通性を有している。また、組立後は、この切断用
穴５の間の連結部分２１を、図２中の仮想線（切断線）
２２に沿って切断し、ダミー部４を切り離して廃棄す
る。図３は、こうしてダミー部４を廃棄した後の印刷配
線板１を示しており、符号７で示す部分が切断された部
分（面）であり、符号（５）で示す部分が切断用穴５の
跡となる切欠部分である。この構造では、切欠部分
（５）はメッキ壁１１で被われているが、切断された部
分７はメッキ壁で被われていない。Further, the printed wiring board 1 before completion is provided at its outer end with a dummy portion 4 which is used for carrying and positioning by an automatic machine at the time of assembling. Elongated cutting holes 5 for separating the holes 4 are formed in a state of being arranged in a line and scattered. In the case of this embodiment, the length L1 (see FIG. 2) of the cutting hole 5 is about 50 to 100 mm, and the interval L2 between the adjacent cutting holes 5 is about 1 to 2 mm. It is. In addition, a plating wall 11 is provided on the inner wall of the cutting hole 5 after the cutting hole 5 is processed. The plating wall 11 is made of the same material as the ground layer 3, is solder-plated with copper as a base, is electrically connected to the ground layer 3, and has conductivity. After assembling, the connecting portion 21 between the cutting holes 5 is replaced with a virtual line (cutting line) in FIG.
Then, the dummy section 4 is cut off and discarded. FIG. 3 shows the printed wiring board 1 after the dummy portion 4 has been discarded in this manner. A portion indicated by reference numeral 7 is a cut portion (surface), and a portion indicated by reference numeral (5) is a cutting hole 5. It is a notch part which becomes a mark of. In this structure, the cutout portion (5) is covered with the plating wall 11, but the cut portion 7 is not covered with the plating wall.
【００１２】こうして完成された印刷配線板１では、上
下面の表層がグランド層３で形成され、印刷配線板１の
端面は切断用穴５に設けたメッキ壁１１で形成されて、
印刷配線板１の表面と端面がグランド層３とメッキ壁１
１で被われた構造となる。そして、印刷配線板１のグラ
ンド層３と切断用穴５の内壁に設けたメッキ壁１１を電
気的に接続したことにより、中層に形成した高速回路の
印刷回路２から放射するＥＭＩノイズのうち、垂直方向
に放射するノイズを表層のグランド層３で抑制し、水平
方向に放射するノイズを表層のグランド層３と電気的に
接続された切断用穴５のメッキ壁１１で抑制する。これ
により、垂直と水平の双方から放射するＥＭＩノイズを
抑制することができる。In the printed wiring board 1 thus completed, the upper and lower surface layers are formed by the ground layer 3, and the end face of the printed wiring board 1 is formed by the plating wall 11 provided in the cutting hole 5.
The surface and the end surface of the printed wiring board 1 are the ground layer 3 and the plating wall 1
The structure is covered by 1. Then, by electrically connecting the ground layer 3 of the printed wiring board 1 and the plating wall 11 provided on the inner wall of the cutting hole 5, of the EMI noise radiated from the printed circuit 2 of the high-speed circuit formed in the middle layer, Noise radiated in the vertical direction is suppressed by the ground layer 3 on the surface, and noise radiated in the horizontal direction is suppressed by the plating wall 11 of the cutting hole 5 electrically connected to the ground layer 3 on the surface. This makes it possible to suppress EMI noise radiated from both the vertical and horizontal directions.
【００１３】なお、上記形態例では、グランド層（ベタ
パターン）３とメッキ壁１１を接続させた場合について
説明したが、グランド層３に変えて電源層（ベタパター
ン）とした場合でも同様の効果が得られるものである。In the above embodiment, the case where the ground layer (solid pattern) 3 is connected to the plating wall 11 has been described. However, the same effect can be obtained even when the ground layer 3 is replaced with a power supply layer (solid pattern). Is obtained.
【００１４】[0014]
【発明の効果】以上説明したとおり、本発明によれば、
印刷配線板のベタパターンと切断用穴の内壁に設けたメ
ッキ壁を電気的に接続したことにより、中層に形成した
高速回路の印刷回路から垂直方向に放射されるＥＭＩノ
イズを表層のベタパターンで抑制し、水平方向に放射さ
れるＥＭＩノイズを表層のベタパターンと電気的に接続
された切断用穴のメッキ壁が抑制することになるので、
垂直と水平の双方に放射されるＥＭＩノイズの何れをも
抑制することができる等の効果が期待できる。As described above, according to the present invention,
By electrically connecting the solid pattern of the printed wiring board and the plating wall provided on the inner wall of the cutting hole, the EMI noise radiated in the vertical direction from the printed circuit of the high-speed circuit formed in the middle layer by the solid pattern on the surface layer Since the EMI noise radiated in the horizontal direction is suppressed by the plating wall of the cutting hole electrically connected to the solid pattern on the surface layer,
Effects such as suppression of both EMI noise radiated both vertically and horizontally can be expected.
【図１】図２のＡ−Ａ線に沿う拡大断面図である。FIG. 1 is an enlarged sectional view taken along the line AA of FIG.
【図２】本発明に係る印刷配線板を製造途中の状態で示
す要部外観図である。FIG. 2 is an external view of a main part of the printed wiring board according to the present invention in a state in which the printed wiring board is being manufactured.
【図３】本発明に係る印刷配線板を完成後の状態で示す
要部外観図である。FIG. 3 is an external view of a main part showing a printed wiring board according to the present invention in a state after completion.
【図４】従来の印刷配線板を製造途中の状態で示す要部
外観図である。FIG. 4 is an external view of a main part showing a conventional printed wiring board in a state of being manufactured.
【図５】図４のＢ−Ｂ線に沿う拡大断面図である。FIG. 5 is an enlarged sectional view taken along line BB of FIG. 4;
【図６】従来の印刷配線板を完成後の状態で示す要部外
観図である。FIG. 6 is an external view of a main part showing a conventional printed wiring board in a state after completion.
１ 印刷配線板 ２ 印刷回路 ３ グランド層（ベタパターン） ５ 切断用穴 １１ メッキ壁 ２１ 連結部分 DESCRIPTION OF SYMBOLS 1 Printed wiring board 2 Printed circuit 3 Ground layer (solid pattern) 5 Cutting hole 11 Plating wall 21 Connecting part
Claims (4)
の印刷配線板において、 前記印刷配線板の外周部で内側にメッキ壁を設けて線状
に点在して形成され、その後、その切断用穴との間が切
断されてなる面を有するとともに、 前記印刷配線板の表層のベタパターンと前記メッキ壁が
電気的に接続されていることを特徴とする電磁干渉シー
ルド型印刷配線板。1. A printed wiring board having a multilayer structure having a pattern on a surface layer and an intermediate layer, wherein the printed wiring board is formed so as to be linearly scattered by providing a plating wall on an inner periphery at an outer peripheral portion thereof, and thereafter, for cutting the printed wiring board. An electromagnetic interference shield type printed wiring board having a surface cut between holes and a solid pattern on a surface layer of the printed wiring board and the plating wall being electrically connected to each other.
ッキ壁と電気的に接続したことを特徴とする請求項１に
記載の電磁干渉シールド型印刷配線板。2. The electromagnetic interference shield type printed wiring board according to claim 1, wherein the solid pattern is provided in a middle layer and is electrically connected to the plating wall.
の印刷配線板の製造方法において、 前記印刷配線板の外周部に複数の切断用穴を線状に点在
させて設けるとともに、 前記切断用穴の内側にメッキ壁を前記印刷配線板の表層
のベタパターンと電気的に接続して設け、 その後、前記切断用穴間の前記印刷配線板の部分を切断
してなることを特徴とする電磁干渉シールド型印刷配線
板の製造方法。3. A method for manufacturing a printed wiring board having a multilayer structure having a pattern on a surface layer and a middle layer, wherein a plurality of cutting holes are provided in the outer peripheral portion of the printed wiring board so as to be linearly scattered. An electromagnetic wave, wherein a plating wall is provided inside the hole so as to be electrically connected to a solid pattern on the surface layer of the printed wiring board, and thereafter, the portion of the printed wiring board between the cutting holes is cut. Manufacturing method of interference shield type printed wiring board.
断用穴内の前記メッキ壁と電気的に接続させてなること
を特徴とする請求項３に記載の電磁干渉シールド型印刷
配線板の製造方法。4. The method for manufacturing an electromagnetic interference shield type printed wiring board according to claim 3, wherein the solid pattern is provided in a middle layer, and is electrically connected to the plating wall in the cutting hole. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19714496A JPH1041677A (en) | 1996-07-26 | 1996-07-26 | Electromagnetic interference shield type printed wiring board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19714496A JPH1041677A (en) | 1996-07-26 | 1996-07-26 | Electromagnetic interference shield type printed wiring board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1041677A true JPH1041677A (en) | 1998-02-13 |
Family
ID=16369497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19714496A Pending JPH1041677A (en) | 1996-07-26 | 1996-07-26 | Electromagnetic interference shield type printed wiring board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1041677A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6674015B2 (en) | 2001-09-18 | 2004-01-06 | Fujitsu Limited | Multi-layer interconnection board |
| US9001486B2 (en) | 2005-03-01 | 2015-04-07 | X2Y Attenuators, Llc | Internally overlapped conditioners |
| US9019679B2 (en) | 1997-04-08 | 2015-04-28 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
| US9036319B2 (en) | 1997-04-08 | 2015-05-19 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
| US9054094B2 (en) | 1997-04-08 | 2015-06-09 | X2Y Attenuators, Llc | Energy conditioning circuit arrangement for integrated circuit |
-
1996
- 1996-07-26 JP JP19714496A patent/JPH1041677A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9019679B2 (en) | 1997-04-08 | 2015-04-28 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
| US9036319B2 (en) | 1997-04-08 | 2015-05-19 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
| US9054094B2 (en) | 1997-04-08 | 2015-06-09 | X2Y Attenuators, Llc | Energy conditioning circuit arrangement for integrated circuit |
| US9373592B2 (en) | 1997-04-08 | 2016-06-21 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
| US6674015B2 (en) | 2001-09-18 | 2004-01-06 | Fujitsu Limited | Multi-layer interconnection board |
| US9001486B2 (en) | 2005-03-01 | 2015-04-07 | X2Y Attenuators, Llc | Internally overlapped conditioners |
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