JPH1040173A - メモリ・モジュール管理方法 - Google Patents

メモリ・モジュール管理方法

Info

Publication number
JPH1040173A
JPH1040173A JP9102827A JP10282797A JPH1040173A JP H1040173 A JPH1040173 A JP H1040173A JP 9102827 A JP9102827 A JP 9102827A JP 10282797 A JP10282797 A JP 10282797A JP H1040173 A JPH1040173 A JP H1040173A
Authority
JP
Japan
Prior art keywords
memory
management
memory module
byte
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9102827A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1040173A5 (https=
Inventor
Michael B Raynham
マイケル・ビー・ライナン
Myron R Tuttle
マイロン・アール・タトル
Yu Andy Kim-Sang
アンディ・キン・サン・ユ
Brian E Dionne
ブライアン・イー・ディオン
James K Gendreau
ジェームズ・ケイ・ジェンドリュー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH1040173A publication Critical patent/JPH1040173A/ja
Publication of JPH1040173A5 publication Critical patent/JPH1040173A5/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/20Initialising; Data preset; Chip identification
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/006Identification
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766Error or fault reporting or storing
    • G06F11/0772Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1024Identification of the type of error
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/835Timestamp
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402Internal storage of test result, quality data, chip identification, repair information

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Detection And Correction Of Errors (AREA)
JP9102827A 1996-05-15 1997-04-21 メモリ・モジュール管理方法 Pending JPH1040173A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US649,752 1984-09-12
US08/649,752 US5774647A (en) 1996-05-15 1996-05-15 Management of memory modules

Publications (2)

Publication Number Publication Date
JPH1040173A true JPH1040173A (ja) 1998-02-13
JPH1040173A5 JPH1040173A5 (https=) 2004-08-19

Family

ID=24606085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9102827A Pending JPH1040173A (ja) 1996-05-15 1997-04-21 メモリ・モジュール管理方法

Country Status (4)

Country Link
US (1) US5774647A (https=)
JP (1) JPH1040173A (https=)
DE (1) DE19714952C2 (https=)
GB (1) GB2313217B (https=)

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US8479071B2 (en) 2006-12-22 2013-07-02 Fujitsu Limited Information processing apparatus, history management method

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US6185718B1 (en) * 1998-02-27 2001-02-06 International Business Machines Corporation Memory card design with parity and ECC for non-parity and non-ECC systems
US6516429B1 (en) * 1999-11-04 2003-02-04 International Business Machines Corporation Method and apparatus for run-time deconfiguration of a processor in a symmetrical multi-processing system
US6647517B1 (en) * 2000-04-27 2003-11-11 Hewlett-Packard Development Company, L.P. Apparatus and method for providing error ordering information and error logging information
US6701451B1 (en) * 2000-08-11 2004-03-02 Emc Corporation Selective correction of data errors
US20030051193A1 (en) * 2001-09-10 2003-03-13 Dell Products L.P. Computer system with improved error detection
US7028213B2 (en) * 2001-09-28 2006-04-11 Hewlett-Packard Development Company, L.P. Error indication in a raid memory system
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KR100512982B1 (ko) * 2002-09-05 2005-09-07 삼성전자주식회사 무선 화상형성장치 및 방법
US20040148455A1 (en) * 2002-10-15 2004-07-29 Normand John W. Method and apparatus for passively recording product quality, employment and reliability
US7266786B2 (en) 2002-11-05 2007-09-04 Sonics, Inc. Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems
US7143236B2 (en) * 2003-07-30 2006-11-28 Hewlett-Packard Development Company, Lp. Persistent volatile memory fault tracking using entries in the non-volatile memory of a fault storage unit
US7251748B2 (en) * 2003-09-12 2007-07-31 Sun Microsystems, Inc. System and method for determining a global ordering of events using timestamps
DE10345978A1 (de) * 2003-10-02 2005-04-28 Infineon Technologies Ag Speichervorrichtung mit Redundanz und Verfahren zur Datenspeicherung
US7162594B2 (en) * 2003-11-19 2007-01-09 Buffalo Inc. Memory module indicator device
US7802145B1 (en) * 2004-05-18 2010-09-21 Cisco Technology, Inc. Approach for facilitating analysis of computer software errors
US20060077750A1 (en) * 2004-10-07 2006-04-13 Dell Products L.P. System and method for error detection in a redundant memory system
US7308527B2 (en) * 2005-01-24 2007-12-11 International Business Machines Corporation System for indicating a plug position for a memory module in a memory system
US7620855B2 (en) * 2006-06-30 2009-11-17 Seagate Technology Llc Self-defining counters
US7793043B2 (en) * 2006-08-24 2010-09-07 Hewlett-Packard Development Company, L.P. Buffered memory architecture
KR20090087077A (ko) * 2006-11-21 2009-08-14 프리스케일 세미컨덕터, 인크. Ecc-유닛 및 부가 프로세싱 장치를 갖는 메모리 시스템
US20080148109A1 (en) * 2006-12-18 2008-06-19 Bashor Paul D Implicating multiple possible problematic components within a computer system using indicator light diagnostics
US9373362B2 (en) * 2007-08-14 2016-06-21 Dell Products L.P. System and method for implementing a memory defect map
US7949913B2 (en) * 2007-08-14 2011-05-24 Dell Products L.P. Method for creating a memory defect map and optimizing performance using the memory defect map
US7694195B2 (en) 2007-08-14 2010-04-06 Dell Products L.P. System and method for using a memory mapping function to map memory defects
US7945815B2 (en) 2007-08-14 2011-05-17 Dell Products L.P. System and method for managing memory errors in an information handling system
US8560907B1 (en) * 2007-09-06 2013-10-15 Altera Corporation Debugging external interface
TWI381389B (zh) * 2008-09-18 2013-01-01 Inventec Corp 效能計算裝置及效能計算方法
CN102203742B (zh) * 2008-10-29 2014-09-17 惠普开发有限公司 组件安装引导
US8261136B2 (en) * 2009-06-29 2012-09-04 Sandisk Technologies Inc. Method and device for selectively refreshing a region of a memory of a data storage device
US8724408B2 (en) 2011-11-29 2014-05-13 Kingtiger Technology (Canada) Inc. Systems and methods for testing and assembling memory modules
US9117552B2 (en) 2012-08-28 2015-08-25 Kingtiger Technology(Canada), Inc. Systems and methods for testing memory
US9575834B2 (en) 2014-05-16 2017-02-21 International Business Machines Corporation Detecting single event upsets and stuck-at faults in RAM-based data path controllers
TWI570555B (zh) * 2015-12-30 2017-02-11 宇帷國際股份有限公司 動態隨機存取記憶體發光控制系統
TWI570714B (zh) * 2015-12-30 2017-02-11 宇帷國際股份有限公司 固態硬碟發光控制系統
US20240070007A1 (en) * 2022-08-31 2024-02-29 Micron Technology, Inc. Memory with fail indicators, including memory with led fail indicators, and associated systems, devices, and methods
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CN120997028B (zh) * 2025-10-24 2026-01-27 苏州元脑智能科技有限公司 一种图形处理器可纠正错误的处理方法、电子设备

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8479071B2 (en) 2006-12-22 2013-07-02 Fujitsu Limited Information processing apparatus, history management method

Also Published As

Publication number Publication date
GB2313217B (en) 2000-09-13
GB9709280D0 (en) 1997-06-25
GB2313217A (en) 1997-11-19
US5774647A (en) 1998-06-30
DE19714952A1 (de) 1997-11-20
DE19714952C2 (de) 2001-04-19

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