JPH10335796A - Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof - Google Patents

Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof

Info

Publication number
JPH10335796A
JPH10335796A JP14040797A JP14040797A JPH10335796A JP H10335796 A JPH10335796 A JP H10335796A JP 14040797 A JP14040797 A JP 14040797A JP 14040797 A JP14040797 A JP 14040797A JP H10335796 A JPH10335796 A JP H10335796A
Authority
JP
Japan
Prior art keywords
electronic circuit
circuit board
electrode
circuit element
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP14040797A
Other languages
Japanese (ja)
Inventor
Tetsuo Yoshizawa
徹夫 吉沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP14040797A priority Critical patent/JPH10335796A/en
Publication of JPH10335796A publication Critical patent/JPH10335796A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide such a circuit board that junctions of an electronic circuit device made by joining an electronic circuit element and the circuit board can be easily inspected by a visual inspection or mechanical and physical inspection and a method for manufacture thereof, provide an electronic circuit device which has an improved junction reliability and a method for manufacture thereof, and provide an easy and non-destructive method for inspecting the junctions of the electronic circuit device. SOLUTION: In a circuit board 16 which has electrode sections in such places as to correspond to many electrode sections of an electronic circuit element and which constitutes an electronic circuit device, by being joined by the electrode sections of the electronic circuit element, the shape of soldering lands 150 is nearly polygon, in other words, either tetragon, pentagon, hexagon, heptagon, or octagon.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、少なくとも一部に
電子回路素子を接合させて電子回路装置を構成する回路
基板とその電子回路装置、及びその製造方法、及びその
接合部の検査方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board which forms an electronic circuit device by bonding an electronic circuit element to at least a part thereof, an electronic circuit device thereof, a method of manufacturing the same, and a method of inspecting a bonded portion thereof. It is.

【0002】[0002]

【従来の技術】従来、電子回路素子を回路基板に電気的
に接合することにより構成される電子回路装置の製造技
術としては、ワイヤボンディングによる方法、TAB(T
ape Automated Bonding)による方法、CCB(Controlle
d Collapsed Bonding)による方法、BGA(Ball Grid A
rray) による接合方法、CSP(Chip Size Package) の
接合方法等が公知になっている。この中で、最近、多ピ
ン接合で注目されているものにCCB,BGA,CSP
による方法がある。
2. Description of the Related Art Conventionally, as a manufacturing technique of an electronic circuit device constituted by electrically joining an electronic circuit element to a circuit board, a method by wire bonding, a TAB (T
ape Automated Bonding), CCB (Controlle
d Collapsed Bonding), BGA (Ball Grid A
rray), a CSP (Chip Size Package) bonding method, and the like are known. Among them, CCB, BGA, and CSP have recently attracted attention in multi-pin bonding.
There is a method.

【0003】CCBによる方法は、例えば、USP3,
292,240、USP3,303,393に記載され
ている。このCCBによる方法を、図5の(a)(b)
の例で説明する。図5の(a)は接合される電子回路素
子の断面を示している。電極102上にバリヤ層103
を介して半田バンプ104を設けた上記電子回路素子1
01を用意する。次に、電子回路素子101の電極10
2と対抗した位置に電極111を有する回路基板110
を用意する。その後、電子回路素子101の電極102
と回路基板110の電極111とを位置決めし、半田1
12で半田付けを行う。この際、半田バンプ104の融
点が半田112の融点より高く、また半田付けの温度は
半田バンプ104の融点と半田112の融点との間とす
るために、半田112は溶融するが半田バンプ104は
溶融しない。図5の(b)に接合後の断面図を示す。
[0003] The method using CCB is disclosed, for example, in USP3,
292,240, USP 3,303,393. This CCB method is shown in FIGS.
An example will be described. FIG. 5A shows a cross section of an electronic circuit element to be joined. Barrier layer 103 on electrode 102
Electronic circuit element 1 provided with solder bumps 104 through
01 is prepared. Next, the electrode 10 of the electronic circuit element 101
Circuit board 110 having electrode 111 at a position opposed to 2
Prepare After that, the electrode 102 of the electronic circuit element 101
And the electrode 111 of the circuit board 110 are positioned.
At 12, soldering is performed. At this time, the melting point of the solder bump 104 is higher than the melting point of the solder 112, and the soldering temperature is between the melting point of the solder bump 104 and the melting point of the solder 112. Does not melt. FIG. 5B shows a cross-sectional view after bonding.

【0004】BGAによる方法は、例えば、USP5,
239,198、USP5,285,352、USP
5,381,307、USP5,397,921に記載
されている。これらの代表例を図6に示す。まず図6の
(a)に示すように、回路基板120上にICチップ1
21をダイボンディング、ワイヤボンディング、封止
し、回路基板120上でICチップ121の搭載面と反
対側の面の電極121には半田ボール122を接合し
て、電子回路素子BGA123を組み立てる。次に、電
子回路素子BGA123の電極121と対応する位置に
電極125を有する回路基板124を用意する。図7に
拡大して電極125側から見た回路基板124を示す。
この例では、10×10個の電極125を有し、外周2
列は表面にパターンがあるがその他の電極はスルーホー
ル(図示していない)を通して内層あるいは裏面に導通
している。電極部125以外は半田レジストで絶縁され
ている。
[0004] The BGA method is disclosed, for example, in US Pat.
239,198, USP 5,285,352, USP
5,381,307 and USP 5,397,921. FIG. 6 shows representative examples of these. First, as shown in FIG. 6A, the IC chip 1 is mounted on the circuit board 120.
21 is die-bonded, wire-bonded, and sealed, and a solder ball 122 is bonded to the electrode 121 on the surface opposite to the mounting surface of the IC chip 121 on the circuit board 120 to assemble the electronic circuit element BGA123. Next, a circuit board 124 having an electrode 125 at a position corresponding to the electrode 121 of the electronic circuit element BGA 123 is prepared. FIG. 7 is an enlarged view of the circuit board 124 viewed from the electrode 125 side.
In this example, there are 10 × 10 electrodes 125 and the outer circumference 2
The rows have a pattern on the front surface, but the other electrodes are electrically connected to the inner layer or the back surface through through holes (not shown). The parts other than the electrode part 125 are insulated by the solder resist.

【0005】次に、回路基板124の電極125上に所
望のクリーム半田を塗布し、回路基板124の電極12
5と電子回路素子123の電極121とを位置決めし、
半田付けを行う。半田付け後の断面を図6の(b)に示
す。CSPによる方法は、例えば、USP5,346,
861に記載されている。この方法は、半導体チップ上
にある電極ランドとほぼ同じ大きさのランドと、対抗す
る回路基板のランドとを接続する方法である。月刊Semi
conductor Word1995.5.PP103−131の特
集「本流となるのはCSPかベアチップか」に、各社の
CSPが紹介されている。
Next, a desired cream solder is applied on the electrodes 125 of the circuit board 124,
5 and the electrode 121 of the electronic circuit element 123 are positioned,
Perform soldering. The cross section after soldering is shown in FIG. The method using the CSP is described, for example, in US Pat.
861. In this method, a land having substantially the same size as an electrode land on a semiconductor chip is connected to an opposing land on a circuit board. Monthly Semi
conductor Word 1995.5. The CSPs of each company are introduced in the special feature of PP103-131 "Which is the mainstream CSP or bare chip?"

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記従
来例の電子回路素子を回路基板へ接合することによって
構成される電子回路装置に関しては、次のような問題点
がある。 <CCBによる方法の問題点>図5の(b)で、電子回
路素子101と回路基板110とを半田接合させた電子
回路装置の接合部113の半田付けの良し悪しを検査す
るには、目視または機械的物理的な方法と電気による方
法とがある。ところが、前者による方法は、接合部11
3が電子回路素子と回路基板とに遮られて検査すること
が難しい。特に、接合部113が微細であったり、電子
回路素子と回路基板との間のギャップ量Δgが小さかっ
たり、また接合部113が電子回路素子の内側(図示し
ていない)に存在していると検査しずらい。そのため、
軟X線透過させることにより画像を観察する方法が知ら
れている。ところが、軟X線透過観察では、接合部11
3の半田が不足している場合や、隣接した接合部113
が半田でブリッジしている場合は、比較的観察しやすい
が、接合部113の金属同士が半田で濡れていなかった
り、適正な拡散接合が行われてなかった場合、所謂いも
半田の場合等は、観察するのが難しい。
However, there are the following problems in the electronic circuit device constructed by joining the above-mentioned conventional electronic circuit element to a circuit board. <Problems of the Method Using CCB> In FIG. 5B, visual inspection is performed to check the quality of soldering at the joint 113 of the electronic circuit device in which the electronic circuit element 101 and the circuit board 110 are soldered. Alternatively, there are a mechanical physical method and an electric method. However, the former method uses the joint 11
3 is blocked by the electronic circuit element and the circuit board, and it is difficult to inspect. In particular, if the bonding portion 113 is fine, the gap amount Δg between the electronic circuit element and the circuit board is small, or if the bonding portion 113 exists inside the electronic circuit element (not shown). It is hard to inspect. for that reason,
A method of observing an image by transmitting soft X-rays is known. However, in soft X-ray transmission observation, the joint 11
No. 3 solder is insufficient or the adjacent joint 113
Is relatively easy to observe when the bridge is formed by soldering, but when the metals of the joint 113 are not wet with solder or when proper diffusion bonding is not performed, so-called solder , Difficult to observe.

【0007】<BGAによる方法の問題点>BGAによ
る方法にも、上述と同様な課題がある。図8に、図6の
(b)の接合部126の拡大図を示す。図9は、図8の
A1〜A5のスライス面で切断したときの接合部126
の断面形状を示している。A1は、電子回路素子BGA
123のレジスト127からの電極121開口形状を示
している。A5は、回路基板124のレジスト128か
らの電極125の開口形状を示している。一般に、A1
とA5とは円形状を示している。A2はA1より若干大
きくなり、A3で最大の大きさになる。同様に、A4は
A5より若干大きくなっている。ところが、半田ボール
122の半田と回路基板124の電極125が半田で濡
れなかったり、適正な拡散接合が行われなかったりする
と、A5からA4への形状がほぼ連続的に大きくなるの
ではなく、不連続になったり、不規則になったり、A4
の形状が小さくなり過ぎたりする。この現象は、外から
の目視での観察が難しい。図8をX線で紙に対し上から
下に照射し下方のセンサで検知すると、A1とA5の何
れか小さい方の形状内はほぼ同一な濃度だが、その外側
は徐々にX線が多くなっていく。これを濃淡で表現する
と内から外へ徐々に薄くなっていく。しかし、X線でも
A5とA4間の上記現象をモニタすることは難しい。
<Problems of the BGA method> The BGA method has the same problems as described above. FIG. 8 is an enlarged view of the joint 126 shown in FIG. FIG. 9 is a cross-sectional view of the joint 126 when cut along the slice planes A1 to A5 in FIG.
2 shows a cross-sectional shape of the hologram. A1 is an electronic circuit element BGA
The shape of the opening of the electrode 121 from the resist 127 is shown. A5 indicates an opening shape of the electrode 125 from the resist 128 of the circuit board 124. Generally, A1
And A5 show a circular shape. A2 is slightly larger than A1 and has the largest size at A3. Similarly, A4 is slightly larger than A5. However, if the solder of the solder ball 122 and the electrode 125 of the circuit board 124 are not wetted by the solder or the appropriate diffusion bonding is not performed, the shape from A5 to A4 does not increase almost continuously, but becomes improper. Continuous, irregular, A4
May be too small. This phenomenon is difficult to observe visually from the outside. In FIG. 8, when the paper is irradiated with X-rays from above to below and detected by the lower sensor, the density is almost the same in the smaller one of A1 and A5, but the amount of X-rays gradually increases outside the smaller one. To go. When this is expressed in shades, it gradually fades from inside to outside. However, it is difficult to monitor the above phenomenon between A5 and A4 even with X-rays.

【0008】上記ではCCBとBGAの場合について述
べたが、CSP等のフェイスダウン接合による場合も、
上述のような問題が生ずる。本発明の目的は、電子回路
素子と回路基板とを接合させた電子回路装置の接合部を
目視または機械的物理的方法で検査し易い回路基板を提
供することにある。本発明の他の目的は、電子回路素子
と回路基板とを接合させた電子回路装置の接合部を目視
または機械的物理的方法で検査し易くし、且つ接合の信
頼性をより高めた電子回路装置を提供することにある。
Although the case of CCB and BGA has been described above, the case of face-down joining such as CSP may also be used.
The above-described problem occurs. SUMMARY OF THE INVENTION It is an object of the present invention to provide a circuit board in which a junction of an electronic circuit device in which an electronic circuit element and a circuit board are joined can be easily inspected visually or by a mechanical and physical method. Another object of the present invention is to provide an electronic circuit in which a joint of an electronic circuit device in which an electronic circuit element and a circuit board are joined is easily inspected visually or by a mechanical and physical method, and the joining reliability is further improved. It is to provide a device.

【0009】本発明の更に他の目的は、電子回路素子と
回路基板とを接合させた電子回路装置の接合部を目視ま
たは機械的物理的方法で検査し易くし、且つ接合の信頼
性をより高めた電子回路装置の製造方法を提供すること
にある。本発明の更に他の目的は、電子回路素子と回路
基板とを接合させた電子回路装置の接合部を非破壊で容
易に検査する検査方法を提供することにある。
Still another object of the present invention is to make it easier to visually inspect or visually inspect a joint of an electronic circuit device in which an electronic circuit element and a circuit board are joined, and to improve the reliability of the joint. It is an object of the present invention to provide an improved method for manufacturing an electronic circuit device. Still another object of the present invention is to provide an inspection method for easily and non-destructively inspecting a joint of an electronic circuit device in which an electronic circuit element and a circuit board are joined.

【0010】[0010]

【課題を解決するための手段】この課題を解決するため
に、本発明の回路基板は、電子回路素子の多数の電極部
に対応する位置に電極部を有する回路基板であって、前
記電子回路素子の電極部と接続されて電子回路装置を構
成する回路基板において、多数の電極のうち、少なくと
も1つの電極の形状が略多角形であることを特徴とす
る。ここで、前記略多角形は、四角形、五角形、六角
形、七角形、八角形のいずれかである。
In order to solve this problem, a circuit board according to the present invention is a circuit board having an electrode portion at a position corresponding to a large number of electrode portions of an electronic circuit element. In a circuit board which is connected to an electrode portion of an element to constitute an electronic circuit device, at least one of a large number of electrodes is substantially polygonal in shape. Here, the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.

【0011】又、本発明の電子回路装置は、多数の電極
部を有する電子回路素子と、該電子回路素子の電極部に
対応する位置に電極部を有する回路基板とを対向させ、
前記電子回路素子の電極部と前記回路基板の電極部とを
接続して構成される電子回路装置において、接続された
前記多数の電極の接合部のうち、少なくとも1つの接合
部の前記回路基板側の断面形状が略多角形であることを
特徴とする。ここで、前記略多角形は、四角形、五角
形、六角形、七角形、八角形のいずれかである。
Further, in the electronic circuit device of the present invention, an electronic circuit element having a large number of electrode parts is opposed to a circuit board having an electrode part at a position corresponding to the electrode part of the electronic circuit element.
In an electronic circuit device configured by connecting an electrode portion of the electronic circuit element and an electrode portion of the circuit board, at least one of the connected portions of the plurality of connected electrodes is closer to the circuit board. Is characterized in that its cross-sectional shape is substantially polygonal. Here, the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.

【0012】又、本発明の電子回路装置の製造方法は、
多数の電極部を有する電子回路素子と、該電子回路素子
の電極部に対応する位置に電極部を有する回路基板とを
対向させ、前記電子回路素子の電極部と前記回路基板の
電極部とを接続する電子回路装置の製造方法において、
前記回路基板が、略多角形の少なくとの1つの電極を含
むことを特徴とする。ここで、前記略多角形は、四角
形、五角形、六角形、七角形、八角形のいずれかであ
る。
Further, a method of manufacturing an electronic circuit device according to the present invention
An electronic circuit element having a large number of electrode parts and a circuit board having an electrode part at a position corresponding to the electrode part of the electronic circuit element are opposed to each other, and the electrode part of the electronic circuit element and the electrode part of the circuit board are formed. In a method of manufacturing an electronic circuit device to be connected,
The circuit board includes at least one electrode having a substantially polygonal shape. Here, the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.

【0013】又、本発明の接合部の検査方法は、多数の
電極部を有する電子回路素子と、該電子回路素子の電極
部に対応する位置に電極部を有する回路基板とを対向さ
せ、前記電子回路素子の電極部と前記回路基板の電極部
とを接続して構成される電子回路装置の接合部を検査す
る接合部の検査方法であって、電極の形状が略多角形で
ある回路基板を使用して、前記電子回路素子の電極部と
前記回路基板の電極部とを接続し、接合部の軸方向の透
過画像に基づいて、該接合部の接合の良し悪しを判断す
ることを特徴とする。ここで、前記透過画像が回路基板
の電極の略多角形と同様の略多角形であれば接合を良し
とし、前記透過画像が回路基板の電極の略多角形と同様
の略多角形でなければ欠陥とする。また、前記略多角形
は、四角形、五角形、六角形、七角形、八角形のいずれ
かである。
Further, according to the present invention, there is provided a method for inspecting a joint portion, wherein an electronic circuit element having a large number of electrode parts is opposed to a circuit board having an electrode part at a position corresponding to the electrode part of the electronic circuit element. A method for inspecting a joint of an electronic circuit device configured by connecting an electrode of an electronic circuit element and an electrode of the circuit board, wherein the electrode has a substantially polygonal shape. And connecting the electrode part of the electronic circuit element and the electrode part of the circuit board, and judging the quality of the bonding of the bonding part based on an axial transmission image of the bonding part. And Here, if the transmission image is a substantially polygonal shape similar to the substantially polygonal shape of the electrodes on the circuit board, the bonding is good, and the transmissionable image is not a substantially polygonal shape similar to the substantially polygonal shape of the electrodes on the circuit board. Defect. Further, the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.

【0014】[0014]

【発明の実施の形態】以下、添付図面を参照して、本発
明の実施の形態を詳細に説明する。 (第1の実施の形態)図1、図2に、第1の実施の形態
の回路基板と電子回路装置、及びその製造方法を示す。
図1は、第1の実施の形態のBGA接合用回路基板16
0の半田付けランド150の形状、配置を示している。
図2は、BGA164を回路基板160に半田接合させ
た断面図である。
Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. (First Embodiment) FIGS. 1 and 2 show a circuit board, an electronic circuit device, and a method of manufacturing the same according to a first embodiment.
FIG. 1 shows a circuit board 16 for BGA bonding according to the first embodiment.
0 shows the shape and arrangement of the soldering lands 150.
FIG. 2 is a cross-sectional view in which the BGA 164 is soldered to the circuit board 160.

【0015】回路基板160は多数の電極164を有し
ており、電極164の形状はレジストで略正6角形の半
田付けランド150にしてある。半田付けランド150
の大きさは2つの頂点を結ぶ距離の最大値が従来の円形
ランドの径に相当し、ピッチは電子回路素子の電極のピ
ッチに対応し、電極および配線パターンは銅箔からなっ
ている。配線パターンは特に必要性はないので省略して
ある。回路基板材料は、FR−4、4層基板である。
The circuit board 160 has a large number of electrodes 164, and the shape of the electrodes 164 is a substantially hexagonal solder land 150 made of a resist. Soldering land 150
The maximum value of the distance connecting the two vertices corresponds to the diameter of the conventional circular land, the pitch corresponds to the pitch of the electrodes of the electronic circuit element, and the electrodes and the wiring pattern are made of copper foil. The wiring pattern is omitted because it is not particularly necessary. The circuit board material is FR-4, 4-layer board.

【0016】まず、回路基板160の半田付けランド1
50上に半田ペーストを印刷した後、回路基板160の
半田付けランド150と半田ホールを有したBGA16
4の電極とを位置決めし、リフローにて半田付けを行
う。図2に、リフロー後の接合図を示す。 (第2の実施の形態)図4に第2の実施の形態の回路基
板を示す。製造された電子回路装置及びその製造方法に
ついては、第1の実施の形態と同様である。
First, the soldering lands 1 on the circuit board 160
After the solder paste is printed on the BGA 50, the BGA 16 having the solder lands 150 and the solder holes of the circuit board 160 is formed.
4 is positioned, and soldering is performed by reflow. FIG. 2 shows a bonding diagram after reflow. (Second Embodiment) FIG. 4 shows a circuit board according to a second embodiment. The manufactured electronic circuit device and its manufacturing method are the same as in the first embodiment.

【0017】図4は、第2の実施の形態のBGA接合用
回路基板160の半田付けランド150の形状、配置を
示している。第2の実施の形態の回路基板が第1の実施
の形態の回路基板と異なる点は、電極164の形状はレ
ジストで略正5角形の半田付けランド150であり、電
子回路素子BGAのピン数に対応して、回路基板のピン
数が減り、その配置が周辺3列となっていることであ
り、他は同じである。
FIG. 4 shows the shape and arrangement of the soldering lands 150 of the circuit board 160 for BGA bonding according to the second embodiment. The circuit board according to the second embodiment is different from the circuit board according to the first embodiment in that the shape of the electrode 164 is a substantially pentagonal soldering land 150 made of resist, and the number of pins of the electronic circuit element BGA is different. In response to this, the number of pins on the circuit board is reduced and the arrangement is in three rows around the periphery.

【0018】本実施の形態でも、第1の実施の形態と同
様に電子回路装置が製造される。以下に、上記実施の形
態を構成する材料について詳細に説明する。本実施の形
態の回路基板としては、例えば樹脂回路基板、セラミッ
ク回路基板、メタルコア回路基板、シリコン回路基板、
フレキシブル回路基板等が挙げられる。表面に多数の電
極と配線パターンを有しており、両面基板の場合はスル
ーホール、ビアホールにて接続されるパターン層を有
し、多層基板の場合はさらに内部に配線パターンを有し
ている。本実施の形態では、電子回路素子の電極の数が
多いほど、またその電極の配置が電子回路素子の内側に
存在するほど、効果が顕著となる。
In this embodiment, an electronic circuit device is manufactured in the same manner as in the first embodiment. Hereinafter, the materials constituting the above embodiment will be described in detail. As the circuit board of the present embodiment, for example, a resin circuit board, a ceramic circuit board, a metal core circuit board, a silicon circuit board,
And a flexible circuit board. It has a large number of electrodes and wiring patterns on its surface. In the case of a double-sided substrate, it has a pattern layer connected by through holes and via holes. In the case of a multilayer substrate, it further has a wiring pattern inside. In this embodiment, the effect becomes more remarkable as the number of electrodes of the electronic circuit element is larger and the arrangement of the electrodes is located inside the electronic circuit element.

【0019】本実施の形態の電子回路素子としては、I
C,LSI等の半導体素子、それらをパッケージングし
たBGA,CSP,MCM等が挙げられる。これら電子
回路素子は、いずれも外部との電気接続を行う電極を有
しており、2以上の多数の電極をもっている。本実施の
形態は、回路基板の電極と電子回路素子の電極とを半田
付けで接続するものである。半田は予め回路基板の電極
か電子回路素子の電極のいずれか一方または両方に有し
てもよく、半田はボール状が好ましいがボール状のバン
プになっていなくとも良い。また、回路基板の電極部に
半田ペーストまたはフラックスを印刷したり、ディスペ
ンサー等の方法で塗布した後、電子回路素子を搭載して
も良い。半田付けは公知の方法でよく、温度は共晶スズ
ー鉛半田の場合190〜280℃の範囲で半田を溶融さ
せて接合する。
As the electronic circuit element of the present embodiment, I
Semiconductor devices such as C and LSI, and BGA, CSP, MCM and the like in which they are packaged. Each of these electronic circuit elements has an electrode for making an electrical connection to the outside, and has two or more electrodes. In this embodiment, an electrode of a circuit board and an electrode of an electronic circuit element are connected by soldering. The solder may be provided in advance on one or both of the electrodes of the circuit board and the electrodes of the electronic circuit element. The solder is preferably in a ball shape, but does not have to be a ball-shaped bump. Alternatively, the electronic circuit element may be mounted after printing a solder paste or a flux on the electrode portion of the circuit board or applying the solder paste or the flux by a method such as a dispenser. The soldering may be performed by a known method, and in the case of eutectic tin-lead solder, the solder is melted and joined in the range of 190 to 280 ° C.

【0020】(接合部の検査例)通常、半田接合させた
電子回路装置の接合部を検査する。前述したように、フ
ェイスダウン接合させた接合部を検査するには、軟X線
透過により画像を観察する方法が知られている。軟X線
は半田の厚みによりX線の透過具合が異なる。即ち、半
田が厚いとX線透過量が少なくなり、逆に薄いと多くな
り、半田の厚みにより濃淡の画像が得られる。
(Example of Inspection of Joint) Usually, the joint of an electronic circuit device joined by soldering is inspected. As described above, a method of observing an image by soft X-ray transmission is known for inspecting a joint part formed by face-down joining. Soft X-rays have different X-ray transmission conditions depending on the thickness of the solder. That is, when the solder is thicker, the amount of X-ray transmission decreases, and when the solder is thinner, the X-ray transmission amount increases.

【0021】図8で、回路基板124の電極125の半
田付けランド(半田付けが可能な領域の形状で、電極を
大きくしてレジストで開口する場合と電極形状がそのま
ま半田付けランドになる場合がある)がn角形(nは3
以上、望ましくは4〜8)の場合には、適正な半田付け
の場合、A4面が電極125に近いほど電極125の半
田付けランドに近い形状となる。逆に濡れなかったり適
正な拡散接合が行われなかったりする場合、半田ボール
122の半田の表面張力が半田が電極を濡らす力より大
きくなり、表面張力は表面積を小さくするように働くた
め、A4近傍で略円形状になったり、不規則不連続な形
状となる。
In FIG. 8, the soldering lands of the electrodes 125 on the circuit board 124 (the shape of the area where soldering is possible, the electrodes are enlarged and opened with a resist, or the electrode shape becomes the soldering lands as they are) There is an n-gon (n is 3
As described above, preferably, in the case of 4 to 8), in the case of proper soldering, the shape closer to the soldering land of the electrode 125 is closer to the A4 surface as the surface is closer to the electrode 125. On the other hand, if the solder ball 122 is not wet or proper diffusion bonding is not performed, the surface tension of the solder of the solder ball 122 becomes larger than the force of the solder to wet the electrode, and the surface tension acts to reduce the surface area. To form a substantially circular shape or an irregularly discontinuous shape.

【0022】従って、X線でも同様な画像が得られる。
ただし、図8の場合、A3が大きいためX線源または電
子回路装置のいずれか一方または両方を任意の角度で動
かして、X線画像を複数枚取り画像処理をする方法を行
うと、さらに顕著な画像が得られる。回路基板124の
電極125の半田付けランドが3角形の場合、接合部が
鋭角になるため接合の信頼性が悪くなり、また9角形以
上の場合、円に近づくためX線での画像処理で円か多角
形かを判断することが難しくなる。
Therefore, a similar image can be obtained with X-rays.
However, in the case of FIG. 8, since A3 is large, it is more conspicuous if one or both of the X-ray source and the electronic circuit device are moved at an arbitrary angle to take a plurality of X-ray images and perform image processing. Image is obtained. If the soldering lands of the electrodes 125 of the circuit board 124 are triangular, the bonding portion becomes acute and the reliability of the bonding is deteriorated. Or a polygon.

【0023】尚、半田付けランドを略正6角形及び略正
5角形としたが、正4〜正8角形でも同様にX線で接合
の良し悪しが検査可能である。また、形状は正多角形に
限らず、円形と区別可能であり且つ接合状態に悪い影響
のない範囲の多角形であれば、本発明の目的を達成し得
る。また、本実施の形態の説明では、BGA164と回
路基板160(150)とが1対1に対応する例を示し
たが、回路基板上に複数のBGAを搭載したものであっ
ても、同様の効果を奏することは明らかである。
Although the soldering lands are substantially regular hexagons and substantially regular pentagons, it is also possible to inspect the bonding quality with X-rays in the case of regular octagons as well. In addition, the shape is not limited to a regular polygon, and the object of the present invention can be achieved as long as the polygon can be distinguished from a circle and has a range that does not adversely affect the joining state. Further, in the description of the present embodiment, an example is shown in which the BGA 164 and the circuit board 160 (150) correspond one-to-one, but the same applies to a case where a plurality of BGAs are mounted on a circuit board. It is clear that it works.

【0024】[0024]

【実施例】【Example】

(第1の実施の形態に対応する実施例)上記図1乃至図
3を参照して、第1の実施例を示す。ここで、図3はX
線透過像(画像処理をした)を示すものである。回路基
板160は、10×10の100個の電極164を有
し、電極164の形状はレジストで略正6角形の半田付
けランド150にしたものを使用した。半田付けランド
150の大きさは2つの頂点を結ぶ距離の最大値でφ
0.64mmであり、半田付けランド150のピッチは
1.27mm、電極および配線パターンは銅箔とした。
回路基板160の半田付けランド150は、100ピン
のBGA164の電極165に対応した位置に配置され
ている。回路基板材料はFR−4、4層基板である。
(Example Corresponding to First Embodiment) A first embodiment will be described with reference to FIGS. Here, FIG.
It shows a line transmission image (image processed). The circuit board 160 has 100 electrodes 164 of 10.times.10, and the shape of the electrodes 164 is a substantially hexagonal soldering land 150 made of a resist. The size of the soldering land 150 is the maximum value of the distance connecting the two vertices and φ
The pitch of the soldering lands 150 was 1.27 mm, and the electrodes and wiring patterns were copper foil.
The soldering lands 150 of the circuit board 160 are arranged at positions corresponding to the electrodes 165 of the BGA 164 having 100 pins. The circuit board material is FR-4, 4-layer board.

【0025】まず、回路基板160の半田付けランド1
50上に半田ペーストを印刷した後、回路基板160の
半田付けランド150と半田ホールを有したBGA16
4の電極とを位置決めし、リフローにて半田付けを行っ
た。図2にリフロー後の接合図を示す。接合後の接合状
態は良好で、半田付け強度も満足の行くものであり、信
頼性のある電子回路装置が得られた。
First, the solder lands 1 on the circuit board 160
After the solder paste is printed on the BGA 50, the BGA 16 having the solder lands 150 and the solder holes of the circuit board 160 is formed.
4 was positioned, and soldering was performed by reflow. FIG. 2 shows a bonding diagram after reflow. The bonding state after the bonding was good, the soldering strength was satisfactory, and a reliable electronic circuit device was obtained.

【0026】その後、接合状態をX線を用いて検査を行
った。検査装置は、島津製作所の島津マイクロフォーカ
スX線テレビ検査装置:SMX−30&CTシステムを
用いた。この装置は、CTスキャンと3次元画像処理と
を用いて断面像が観察できるものである。図3の(a)
に、1個の接合部のX線透過図を示す、図3の(b)
に、図3の(a)の画像をさらに画像処理し、あるスレ
ショルドレベルを設定した図である。図3の(c)は、
回路基板160の半田付けランドの銅箔をリフロー前に
酸化させたことが異なるが、他の条件は同様で接合を行
った結果のX線透過図を示している。図3の(c)で行
ったサンプルの接合強度を測定したが、図3の(a)の
半分以下の引き剥がし強度を示していた。また、その破
断面が半田付けランド150全体でなく、接合されてい
たと思われる部分が僅かであった。このことから、半田
付けランドを略正6角形にすると接合の良し悪しが非破
壊で検査可能であることが分かった。すなわち、X線透
過図で回路基板160の半田付けランドの略正6角形が
明瞭に観察できる場合(図3の(a)(b)参照)は良
好、明瞭に観察でない(円形と区別できない:図3の
(c)参照)場合は欠陥ありと判断できる。
Thereafter, the bonding state was inspected using X-rays. The inspection apparatus used was a Shimadzu microfocus X-ray television inspection apparatus: SMX-30 & CT system of Shimadzu Corporation. This apparatus can observe a cross-sectional image using a CT scan and three-dimensional image processing. FIG. 3 (a)
FIG. 3B shows an X-ray transmission diagram of one joint.
FIG. 4 is a diagram in which the image of FIG. 3A is further subjected to image processing to set a certain threshold level. (C) of FIG.
The X-ray transmission diagram shows the result of bonding performed under the same conditions except that the copper foil of the soldering land of the circuit board 160 was oxidized before reflow. When the bonding strength of the sample performed in FIG. 3 (c) was measured, the peel strength was less than half that of FIG. 3 (a). Also, the fractured surface was not the entire soldering land 150 but a small portion considered to have been joined. From this fact, it was found that if the soldering lands were substantially regular hexagons, the quality of the bonding could be inspected nondestructively. That is, when a substantially regular hexagonal shape of the soldering land of the circuit board 160 can be clearly observed in the X-ray transmission diagram (see FIGS. 3A and 3B), it is good and not clearly observed (indistinguishable from a circle): In the case of FIG. 3C), it can be determined that there is a defect.

【0027】(第2の実施の形態に対応する実施例)図
4に示すような、電極164の形状がレジストで略正5
角形の半田付けランド150であり、電子回路素子BG
Aのピン数に対応して、回路基板のピン数が84ピン
で、その配置が周辺3列となっている場合について、第
1の実施例と同様な接合処理及びその接合部の検査を行
った。
(Example Corresponding to the Second Embodiment) As shown in FIG.
It is a rectangular soldering land 150 and is an electronic circuit element BG
In the case where the number of pins of the circuit board is 84 pins corresponding to the number of pins A and the arrangement is three rows around, the same bonding processing and the inspection of the bonding part as in the first embodiment are performed. Was.

【0028】本実施例も、第1も実施例と同様に良好な
電子回路装置が得られたと共に、X線で接合の良し悪し
が検査可能であることが確認された。尚、半田付けラン
ドを略正6角形及び略正5角形としたが、正4〜正8角
形でも同様な観察結果が得られたことにより、X線で接
合の良し悪しが検査可能であることが確認された。
In this embodiment, as in the first embodiment, a good electronic circuit device was obtained as in the first embodiment, and it was confirmed that the quality of the bonding could be inspected by X-rays. The soldering lands were made into a regular hexagon and a regular pentagon, but the same observation result was obtained with a regular octagon to a regular octagon, so that the bonding quality can be inspected by X-rays. Was confirmed.

【0029】[0029]

【発明の効果】以上説明したように、本発明により、電
子回路素子と回路基板とを接合させた電子回路装置の接
合部を目視または機械的物理的方法で検査し易い回路基
板を提供できる。又、電子回路素子と回路基板とを接合
させた電子回路装置の接合部を目視または機械的物理的
方法で検査し易くし、且つ接合の信頼性をより高めた電
子回路装置を提供できる。
As described above, according to the present invention, it is possible to provide a circuit board in which the joint of an electronic circuit device in which an electronic circuit element and a circuit board are joined can be easily inspected visually or by a mechanical and physical method. Further, it is possible to provide an electronic circuit device in which the joint of the electronic circuit device in which the electronic circuit element and the circuit board are joined can be easily inspected visually or by a mechanical and physical method, and the joining reliability is further improved.

【0030】又、電子回路素子と回路基板とを接合させ
た電子回路装置の接合部を目視または機械的物理的方法
で検査し易くし、且つ接合の信頼性をより高めた電子回
路装置の製造方法を提供できる。又、電子回路素子と回
路基板とを接合させた電子回路装置の接合部を非破壊で
容易に検査する検査方法を提供でき。
In addition, it is easy to inspect the joint of the electronic circuit device in which the electronic circuit element and the circuit board are joined by a visual or mechanical physical method, and to manufacture an electronic circuit device in which the joining reliability is further improved. We can provide a method. Further, it is possible to provide an inspection method for easily and nondestructively inspecting a joint of an electronic circuit device in which an electronic circuit element and a circuit board are joined.

【0031】すなわち、電子回路素子を回路基板にフェ
イスダウンにより接合させた電子回路装置において、回
路基板の半田付けランド形状を多角形にすると回路基板
の半田付けランドで適正な半田付けが行われていること
がX線透過装置で認識できるため、非破壊で検査出来る
ことから信頼性のある回路基板と電子回路装置、及びそ
の製造方法を提供できる。
That is, in an electronic circuit device in which electronic circuit elements are joined face-down to a circuit board, if the shape of the soldering land of the circuit board is polygonal, proper soldering is performed with the soldering lands of the circuit board. Since the X-ray transmission apparatus can recognize the presence of the circuit board, the circuit board and the electronic circuit device having high reliability can be provided because the inspection can be performed nondestructively.

【0032】本効果は、電子回路素子の接合部が微細で
あればある程、また電子回路素子の接合部が内側にあれ
ばあるほど効果が顕著となる。
This effect becomes more remarkable as the junction of the electronic circuit element is finer and as the junction of the electronic circuit element is located inside.

【図面の簡単な説明】[Brief description of the drawings]

【図1】第1の実施の形態の回路基板を説明するための
図である。
FIG. 1 is a diagram for explaining a circuit board according to a first embodiment.

【図2】本実施の形態の接合後の電子回路装置を説明す
るための図である。
FIG. 2 is a diagram illustrating an electronic circuit device after bonding according to the present embodiment.

【図3】第1の実施の形態の接合後の接合部のX線透過
図の概略を示す図である。
FIG. 3 is a diagram schematically illustrating an X-ray transmission diagram of a bonded portion after bonding according to the first embodiment.

【図4】第2の実施の形態の回路基板を説明するための
図である。
FIG. 4 is a diagram illustrating a circuit board according to a second embodiment.

【図5】従来のCCBによる方法を説明するための図で
ある。
FIG. 5 is a diagram for explaining a conventional CCB method.

【図6】従来のBGAによる方法を説明するための図で
ある。
FIG. 6 is a diagram for explaining a conventional BGA method.

【図7】回路基板の表面を説明するための図である。FIG. 7 is a diagram for explaining a surface of a circuit board.

【図8】図6の(b)の接合部を拡大して示した図であ
る。
FIG. 8 is an enlarged view of a joint shown in FIG. 6 (b).

【図9】図8のA1〜A5面の断面形状の概略を示した
図である。
FIG. 9 is a diagram schematically showing a cross-sectional shape of the A1-A5 plane in FIG. 8;

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 電子回路素子の多数の電極部に対応する
位置に電極部を有する回路基板であって、前記電子回路
素子の電極部と接続されて電子回路装置を構成する回路
基板において、 多数の電極のうち、少なくとも1つの電極の形状が略多
角形であることを特徴とする回路基板。
1. A circuit board having an electrode portion at a position corresponding to a number of electrode portions of an electronic circuit element, wherein the circuit board is connected to the electrode portion of the electronic circuit element to form an electronic circuit device. Wherein at least one of the electrodes has a substantially polygonal shape.
【請求項2】 前記略多角形は、四角形、五角形、六角
形、七角形、八角形のいずれかであることを特徴とする
請求項1記載の回路基板。
2. The circuit board according to claim 1, wherein the substantially polygon is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.
【請求項3】 多数の電極部を有する電子回路素子と、
該電子回路素子の電極部に対応する位置に電極部を有す
る回路基板とを対向させ、前記電子回路素子の電極部と
前記回路基板の電極部とを接続して構成される電子回路
装置において、 接続された前記多数の電極の接合部のうち、少なくとも
1つの接合部の前記回路基板側の断面形状が略多角形で
あることを特徴とする電子回路装置。
3. An electronic circuit device having a large number of electrode parts,
In an electronic circuit device configured by facing a circuit board having an electrode portion at a position corresponding to the electrode portion of the electronic circuit element and connecting the electrode portion of the electronic circuit element and the electrode portion of the circuit board, An electronic circuit device, wherein a cross-sectional shape of at least one of the connected portions of the plurality of connected electrodes on the circuit board side is substantially polygonal.
【請求項4】 前記略多角形は、四角形、五角形、六角
形、七角形、八角形のいずれかであることを特徴とする
請求項3記載の電子回路装置。
4. The electronic circuit device according to claim 3, wherein said substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.
【請求項5】 多数の電極部を有する電子回路素子と、
該電子回路素子の電極部に対応する位置に電極部を有す
る回路基板とを対向させ、前記電子回路素子の電極部と
前記回路基板の電極部とを接続する電子回路装置の製造
方法において、 前記回路基板が、略多角形の少なくとの1つの電極を含
むことを特徴とする電子回路装置の製造方法。
5. An electronic circuit device having a number of electrode portions,
In a method for manufacturing an electronic circuit device, a circuit board having an electrode portion is opposed to a position corresponding to an electrode portion of the electronic circuit element, and the electrode portion of the electronic circuit element is connected to the electrode portion of the circuit board. A method for manufacturing an electronic circuit device, wherein the circuit board includes at least one electrode having a substantially polygonal shape.
【請求項6】 前記略多角形は、四角形、五角形、六角
形、七角形、八角形のいずれかであることを特徴とする
請求項5記載の電子回路装置の製造方法。
6. The method according to claim 5, wherein the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.
【請求項7】 多数の電極部を有する電子回路素子と、
該電子回路素子の電極部に対応する位置に電極部を有す
る回路基板とを対向させ、前記電子回路素子の電極部と
前記回路基板の電極部とを接続して構成される電子回路
装置の接合部を検査する接合部の検査方法であって、 電極の形状が略多角形である回路基板を使用して、前記
電子回路素子の電極部と前記回路基板の電極部とを接続
し、 接合部の軸方向の透過画像に基づいて、該接合部の接合
の良し悪しを判断することを特徴とする電子回路装置の
接合部の検査方法。
7. An electronic circuit element having a large number of electrode parts,
A circuit board having an electrode portion at a position corresponding to the electrode portion of the electronic circuit element is opposed to the circuit board, and the electrode portion of the electronic circuit element is connected to the electrode portion of the circuit board. A method for inspecting a joint for inspecting a part, comprising: using a circuit board whose electrode shape is substantially polygonal, connecting an electrode part of the electronic circuit element and an electrode part of the circuit board, A method for inspecting a joint of an electronic circuit device, comprising: judging the quality of the joint at the joint based on the transmission image in the axial direction.
【請求項8】 前記透過画像が回路基板の電極の略多角
形と同様の略多角形であれば接合を良しとし、前記透過
画像が回路基板の電極の略多角形と同様の略多角形でな
ければ欠陥とすることを特徴とする請求項8記載の電子
回路装置の接合部の検査方法。
8. If the transmission image is a substantially polygonal shape similar to the substantially polygonal shape of the electrodes of the circuit board, the bonding is good, and the transmission image is a substantially polygonal shape similar to the substantially polygonal shape of the electrodes of the circuit board. 9. The method according to claim 8, wherein a defect is provided if there is no defect.
【請求項9】 前記略多角形は、四角形、五角形、六角
形、七角形、八角形のいずれかであることを特徴とする
請求項7または8記載の電子回路装置の接合部の検査方
法。
9. The method according to claim 7, wherein the substantially polygonal shape is any one of a quadrangle, a pentagon, a hexagon, a heptagon, and an octagon.
JP14040797A 1997-05-29 1997-05-29 Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof Withdrawn JPH10335796A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14040797A JPH10335796A (en) 1997-05-29 1997-05-29 Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14040797A JPH10335796A (en) 1997-05-29 1997-05-29 Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof

Publications (1)

Publication Number Publication Date
JPH10335796A true JPH10335796A (en) 1998-12-18

Family

ID=15268045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14040797A Withdrawn JPH10335796A (en) 1997-05-29 1997-05-29 Circuit board and electronic circuit device and manufacture thereof, and inspection of junction thereof

Country Status (1)

Country Link
JP (1) JPH10335796A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008102326A2 (en) * 2007-02-23 2008-08-28 Alcatel Lucent In-grid decoupling for ball grid array (bga) devices
US8233288B2 (en) 2007-04-24 2012-07-31 Panasonic Corporation Electronic component package, electronic component mounted apparatus, method of inspecting bonding portion therein, and circuit board
JP2017092438A (en) * 2015-11-13 2017-05-25 サムソン エレクトロ−メカニックス カンパニーリミテッド. Printed circuit board
JP2022016281A (en) * 2020-07-08 2022-01-21 北京小米移動軟件有限公司 Chip, circuit board, and electronic device
US11600584B2 (en) 2020-03-26 2023-03-07 Beijing Xiaomi Mobile Software Co., Ltd. Chip, circuit board and electronic device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008102326A2 (en) * 2007-02-23 2008-08-28 Alcatel Lucent In-grid decoupling for ball grid array (bga) devices
WO2008102326A3 (en) * 2007-02-23 2008-11-06 Alcatel Lucent In-grid decoupling for ball grid array (bga) devices
US7602615B2 (en) 2007-02-23 2009-10-13 Alcatel Lucent In-grid decoupling for ball grid array (BGA) devices
US8233288B2 (en) 2007-04-24 2012-07-31 Panasonic Corporation Electronic component package, electronic component mounted apparatus, method of inspecting bonding portion therein, and circuit board
JP2017092438A (en) * 2015-11-13 2017-05-25 サムソン エレクトロ−メカニックス カンパニーリミテッド. Printed circuit board
US11600584B2 (en) 2020-03-26 2023-03-07 Beijing Xiaomi Mobile Software Co., Ltd. Chip, circuit board and electronic device
JP2022016281A (en) * 2020-07-08 2022-01-21 北京小米移動軟件有限公司 Chip, circuit board, and electronic device

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