JPH1031229A - Active matrix liquid crystal display device and its drive method - Google Patents

Active matrix liquid crystal display device and its drive method

Info

Publication number
JPH1031229A
JPH1031229A JP18468996A JP18468996A JPH1031229A JP H1031229 A JPH1031229 A JP H1031229A JP 18468996 A JP18468996 A JP 18468996A JP 18468996 A JP18468996 A JP 18468996A JP H1031229 A JPH1031229 A JP H1031229A
Authority
JP
Japan
Prior art keywords
liquid crystal
pixel
electrode
electrode line
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18468996A
Other languages
Japanese (ja)
Other versions
JP3243185B2 (en
Inventor
Takeshi Watanabe
猛志 渡辺
Masatoshi Wakagi
政利 若木
Masahiko Ando
正彦 安藤
Tetsuo Minemura
哲郎 峯村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP18468996A priority Critical patent/JP3243185B2/en
Publication of JPH1031229A publication Critical patent/JPH1031229A/en
Application granted granted Critical
Publication of JP3243185B2 publication Critical patent/JP3243185B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide an active matrix liquid crystal display device with a high numerical aperture and high picture quality without causing a vertical smear display fault by forming an electric field applied to a liquid crystal with a potential difference between two pixel electrodes connected to two adjacent switching transistor elements connected to the same signal electrode line. SOLUTION: A electric field to be applied to the liquid crystal is formed by the potential difference between two pixel electrodes 5, 6 connected to two adjacent switching transistor elements 11', 11" connected to the same signal electrode line 4. This voltage application is performed so that voltage signals inputted from two adjacent switching transistor elements 11', 11" connected to the same signal electrode line 4 to respective pixel electrodes are made AC voltages that positive/negative are inverted between the pixel electrodes 5, 6 adjacent in the direction of the signal electrode line using a fixed positive bias potential as a reference for off level potential of a gate voltage applied to a scan electrode line.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、視野角が広く、か
つ、低消費電力のアクティブマトリクス型液晶表示装置
とその駆動方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device having a wide viewing angle and low power consumption, and a driving method thereof.

【0002】[0002]

【従来の技術】液晶に印加する電界の方向を基板界面に
ほぼ平行な方向とする表示方式(横電界方式と云う)
は、広視野角,低負荷容量等の特長を有し、アクティブ
マトリクス型液晶表示装置として有望な技術である。
2. Description of the Related Art A display system in which the direction of an electric field applied to a liquid crystal is substantially parallel to a substrate interface (referred to as a lateral electric field system).
Is a promising technology as an active matrix type liquid crystal display device having features such as a wide viewing angle and a low load capacity.

【0003】こうした横電界方式に関しては、特公昭6
3−21907号公報中で、次段の行電極に基準電極を
兼用させた例がある。この構成は、寄生容量を低減で
き、低負荷,低消費電力のアクティブマトリクス型液晶
表示装置を得ることができ、かつ、配置電極数が少なく
画素領域の開口率を向上できる。
[0003] Such a lateral electric field system is disclosed in
In JP-A-3-21907, there is an example in which a row electrode in the next stage is also used as a reference electrode. According to this configuration, a parasitic capacitance can be reduced, an active matrix type liquid crystal display device with low load and low power consumption can be obtained, and the aperture ratio of the pixel region can be improved with a small number of arranged electrodes.

【0004】しかし、通常のトランジスタ素子の特性で
は、液晶に印加する電圧が常に片極(基準電極電位に対
して表示用電極電位が常に正)性である直流駆動しか行
うことができない。しかし、液晶は直流駆動すると劣化
が激しく、耐用時間が著しく低下する。更に、残留電荷
が蓄積され残像現象が生じて画質が劣化すると云う問題
がある。
However, according to the characteristics of ordinary transistor elements, only DC driving in which the voltage applied to the liquid crystal is always unipolar (the display electrode potential is always positive with respect to the reference electrode potential) can be performed. However, when the liquid crystal is driven by a direct current, the liquid crystal is greatly deteriorated, and the service life is significantly reduced. Furthermore, there is a problem that the residual charge is accumulated and an afterimage phenomenon occurs to deteriorate the image quality.

【0005】このため、特公昭63−21907号公報
の基本的な構成は、基準電極線を設け、これに接続され
る電極に対して正負の交流駆動を行うものである。
For this reason, the basic configuration of Japanese Patent Publication No. Sho 63-21907 is to provide a reference electrode line and to perform positive and negative AC driving on the electrode connected thereto.

【0006】[0006]

【発明が解決しようとする課題】横電界方式の基本的な
問題は、電界の方向が基板界面にほぼ垂直な方向とする
縦電界方式に比べて、電極間の間隔が広い点にある。
The basic problem of the horizontal electric field method is that the distance between the electrodes is wider than that of the vertical electric field method in which the direction of the electric field is almost perpendicular to the substrate interface.

【0007】横電界方式で、液晶の配向方向を変化させ
るに十分な電界を得るためには、信号電圧振幅を大きく
し、かつ、電極間間隔を比較的狭く設定せざるを得な
い。このため、特公昭63−21907号公報のよう
に、基準電極に対向する画素電極に信号電位を入力する
構成では、画素に占める電極配線の割合が大きく、開口
率が低くなると云う問題がある。
In order to obtain an electric field sufficient to change the alignment direction of the liquid crystal in the horizontal electric field method, the signal voltage amplitude must be increased and the distance between the electrodes must be set relatively small. For this reason, the configuration in which the signal potential is input to the pixel electrode facing the reference electrode as in Japanese Patent Publication No. 63-21907 has a problem that the ratio of the electrode wiring to the pixel is large and the aperture ratio is low.

【0008】また、信号線方向の他の画素の表示信号の
飛込みによる画素電極電位の変動が、液晶に印加される
電界に直結しており、縦スメアと呼ばれる表示不良が発
生し易いと云う問題がある。
Further, the fluctuation of the pixel electrode potential due to the jump of the display signal of another pixel in the signal line direction is directly connected to the electric field applied to the liquid crystal, and a display defect called vertical smear tends to occur. There is.

【0009】本発明の目的は、耐用時間が長く残像現象
が発生せず、かつ、縦スメア表示不良が発生しない高開
口率、高画質のアクティブマトリクス型液晶表示装置の
提供にある。
An object of the present invention is to provide an active matrix type liquid crystal display device having a high aperture ratio and high image quality which has a long service life, does not cause an afterimage phenomenon, and does not cause a vertical smear display defect.

【0010】本発明の他の目的は、上記液晶表示装置の
駆動方法の提供にある。
Another object of the present invention is to provide a method for driving the above-mentioned liquid crystal display device.

【0011】[0011]

【課題を解決するための手段】前記目的を達成する本発
明の要旨は次のとおりである。
The gist of the present invention to achieve the above object is as follows.

【0012】(1) 第一と第二の基板間に液晶が挿入
され、前記第一の基板には、マトリクス状に配置された
複数の走査電極線と信号電極線により複数の画素部が構
成されており、前記画素部に設けたスイッチング素子と
前記電極の入力信号により、前記液晶の配向状態の変調
と偏向手段により入射光の透過率または反射率を変調す
るアクティブマトリクス型液晶表示装置において、前記
スイッチング素子には画素電極が接続され、前記画素電
極と、同一の信号電極線に接続された隣接する他のスイ
ッチング素子に接続された画素電極とが、基板面にほぼ
平行な電界を印加するように配置され、前記両画素電極
による電界により液晶分子の長軸方向を基板面とほぼ平
行に動作させるよう構成されていることを特徴とするア
クティブマトリクス型液晶表示装置。
(1) A liquid crystal is inserted between the first and second substrates, and a plurality of pixel portions are formed on the first substrate by a plurality of scanning electrode lines and signal electrode lines arranged in a matrix. An active matrix type liquid crystal display device in which the switching element provided in the pixel portion and the input signal of the electrode are used to modulate the alignment state of the liquid crystal and modulate the transmittance or reflectance of incident light by a deflecting unit. A pixel electrode is connected to the switching element, and the pixel electrode and a pixel electrode connected to another adjacent switching element connected to the same signal electrode line apply an electric field substantially parallel to a substrate surface. An active matrix, wherein the liquid crystal molecules are operated in such a manner that the major axis direction of the liquid crystal molecules is operated substantially parallel to the substrate surface by an electric field generated by the two pixel electrodes. Liquid crystal display device.

【0013】(2) 前記スイッチング素子に接続され
た画素電極は、該当するスイッチング素子の走査電極線
に隣接する走査電極線に絶縁層を介して重なることによ
り蓄積容量を形成すると共に、前記隣接する走査電極線
を乗り越えて隣接する画素に延長され、前記隣接する画
素の一方の画素電極を構成している前記アクティブマト
リクス型液晶表示装置。
(2) The pixel electrode connected to the switching element forms a storage capacitor by overlapping a scanning electrode line adjacent to the scanning electrode line of the corresponding switching element via an insulating layer, and forms a storage capacitor. The active matrix type liquid crystal display device, wherein the active matrix type liquid crystal display device is extended to an adjacent pixel over a scanning electrode line and constitutes one pixel electrode of the adjacent pixel.

【0014】(3) 前記画素電極は信号電極線方向に
隣接する画素電極と同一のパターンを構成している前記
アクティブマトリクス型液晶表示装置。
(3) The active matrix liquid crystal display device, wherein the pixel electrodes form the same pattern as pixel electrodes adjacent in the signal electrode line direction.

【0015】(4) 前記画素電極に印加される信号電
圧は、走査電極線に印加される電圧のオフレベルの電位
に対して一定の正のバイアス電位を基準にし、信号電極
線方向に隣接する画素電極間の電位の正負が反転し、か
つ、フレーム表示周期でも前記電位の正負が反転して、
前記液晶の配向状態を変調し、偏向手段により入射光の
透過率または反射率を変調することを特徴とするアクテ
ィブマトリクス型液晶表示装置の駆動方法。
(4) The signal voltage applied to the pixel electrode is adjacent to the signal electrode line direction with reference to a constant positive bias potential with respect to the off-level potential of the voltage applied to the scanning electrode line. The polarity of the potential between the pixel electrodes is inverted, and the polarity of the potential is also inverted in the frame display cycle,
A method for driving an active matrix type liquid crystal display device, comprising modulating an alignment state of the liquid crystal and modulating transmittance or reflectance of incident light by a deflecting unit.

【0016】[0016]

【発明の実施の形態】アクティブマトリクス型液晶表示
装置の駆動は、液晶に印加する電圧をアクティブ素子を
スイッチとし、表示用電極(以下、画素電極と云う)に
電圧を充電,保持することによって駆動する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An active matrix type liquid crystal display device is driven by applying a voltage applied to liquid crystal to an active element as a switch and charging and holding a voltage to a display electrode (hereinafter, referred to as a pixel electrode). I do.

【0017】従来の、アクティブマトリクス型液晶表示
装置の横電界方式の構成では、液晶を交流駆動するため
に、画素電極に充電される電位は、基準電極に対してフ
レーム表示周波数で交流波形となるよう、スイッチング
トランジスタ素子のドレイン電極から映像信号を充電す
る。従って、液晶に印加される電界は画素電極電位と基
準電極電位の差によって形成される。
In a conventional active-matrix-type liquid crystal display device of a horizontal electric field type, a potential charged in a pixel electrode becomes an alternating waveform at a frame display frequency with respect to a reference electrode in order to drive the liquid crystal by alternating current. Thus, the video signal is charged from the drain electrode of the switching transistor element. Therefore, the electric field applied to the liquid crystal is formed by the difference between the pixel electrode potential and the reference electrode potential.

【0018】本発明においては、図1に例示するよう
に、液晶に印加する電界を、同一の信号電極線(4)に
接続された隣接する二つのスイッチングトランジスタ素
子(11',11'')に接続された、二つの画素電極
(5,6)間の電位差によって形成する。
In the present invention, as shown in FIG. 1, an electric field applied to the liquid crystal is applied to two adjacent switching transistor elements (11 ', 11'') connected to the same signal electrode line (4). Is formed by a potential difference between two pixel electrodes (5, 6) connected to the pixel electrodes (5, 6).

【0019】この電圧印加は、同一の信号電極線(4)
に接続された隣接する二つのスイッチングトランジスタ
素子(11',11'')から、それぞれの画素電極に入
力する電圧信号を、走査電極線に印加されるゲート電圧
のオフレベルの電位に対して一定の正のバイアス電位を
基準にし、信号電極線方向に隣接する画素電極(5,
6)間で正負が反転する交流電圧とすることによって実
現される。
This voltage is applied to the same signal electrode line (4).
A voltage signal input to each pixel electrode from two adjacent switching transistor elements (11 ′, 11 ″) connected to the scan electrode is fixed with respect to the off-level potential of the gate voltage applied to the scan electrode line. Of the pixel electrodes (5, 5) adjacent in the signal electrode line direction with respect to the positive bias potential of
This is realized by using an AC voltage whose polarity is inverted between 6) and 6).

【0020】この場合、画素電極(5,6'')間距離
が、従来構成の画素電極−基準電極間距離に等しい場合
は、同一の映像信号振幅に対し液晶に印加される電界は
従来構成の二倍となるので、上記画素電極間距離を従来
の二倍にすることができる。これにより、画素(イ)に
占める電極配線の割合が低減でき、開口率を増大するこ
とが可能となる。
In this case, when the distance between the pixel electrodes (5, 6 ″) is equal to the distance between the pixel electrode and the reference electrode in the conventional configuration, the electric field applied to the liquid crystal for the same video signal amplitude is the same as that in the conventional configuration. Therefore, the distance between the pixel electrodes can be doubled as compared with the related art. Thereby, the ratio of the electrode wiring to the pixel (a) can be reduced, and the aperture ratio can be increased.

【0021】各画素電極(5,6)は、信号電極線
(4)の方向に隣接する二つの画素(イ、ロ)のそれぞ
れ一方の画素電極を構成するが、接続されるスイッチン
グトランジスタ素子の走査電極線に隣接するオフ状態の
走査電極線(1)を、絶縁膜(11')を介して重なり
乗り越える画素電極線(6')部分が蓄積容量(13)
となるので、この容量部を利用して、各画素電極に映像
信号電位を1フレーム時間保持することができる。
Each of the pixel electrodes (5, 6) forms one pixel electrode of each of two pixels (a, b) adjacent in the direction of the signal electrode line (4). The pixel electrode line (6 ') that overlaps and passes over the scanning electrode line (1) in the OFF state adjacent to the scanning electrode line via the insulating film (11') is the storage capacitor (13).
Therefore, the video signal potential can be held in each pixel electrode for one frame time by utilizing this capacitance portion.

【0022】各画素電極は、信号電極線方向に隣接する
画素(イ,ロ)間で同一の形状(6−6'−6''で示さ
れる)とする。こうすることにより信号線方向の他の画
素の表示信号の飛込みによる画素電極電位の変動の影響
は、隣接する画素電極間で同一となる。
Each pixel electrode has the same shape (indicated by 6-6'-6 '') between adjacent pixels (a, b) in the signal electrode line direction. By doing so, the influence of the fluctuation of the pixel electrode potential due to the jump of the display signal of another pixel in the signal line direction becomes the same between adjacent pixel electrodes.

【0023】即ち、液晶に印加される電界を、同一の信
号電極線に接続された隣接する二つのスイッチングトラ
ンジスタ素子(11',11'')に接続された二つの画
素電極(5,6'')間の電位差によって形成するので、
前記の信号線方向の他の画素の表示信号の飛込みによる
画素電極電位の変動はキャンセルされ、液晶に印加され
る電界にはその影響が現われない。従って縦スメアと呼
ばれる表示不良が発生しにくい。
That is, the electric field applied to the liquid crystal is applied to two pixel electrodes (5, 6 ') connected to two adjacent switching transistor elements (11', 11 '') connected to the same signal electrode line. ') Formed by the potential difference between
The fluctuation of the pixel electrode potential due to the jump of the display signal of the other pixel in the signal line direction is canceled, and the electric field applied to the liquid crystal has no influence. Therefore, a display defect called vertical smear hardly occurs.

【0024】前記ように、各画素電極に印加される信号
電圧は、走査電極線(1,2,3)に印加されるゲート
電圧のオフレベルの電位に対して一定の正のバイアス電
位を基準にして、信号電極線方向に隣接する画素電極
(5,6)間で、正負が反転する交流電圧とするが、同
一画素に印加される信号電圧は、走査電極線に印加され
るゲート電圧のオフレベルの電位に対して、一定の正の
バイアス電位を基準にし、1フレーム時間毎に正負が反
転する交流電圧とすることで、液晶を交流駆動すること
ができる。
As described above, the signal voltage applied to each pixel electrode is based on a constant positive bias potential with respect to the off-level potential of the gate voltage applied to the scanning electrode lines (1, 2, 3). In this case, an alternating voltage is applied between the pixel electrodes (5, 6) adjacent to each other in the signal electrode line direction. The signal voltage applied to the same pixel is equal to the gate voltage applied to the scan electrode line. The liquid crystal can be AC-driven by setting an AC voltage in which the polarity is inverted every frame time based on a constant positive bias potential with respect to the OFF-level potential.

【0025】これによって、耐用時間が長く、残像現象
が発生せず、かつ、縦スメア表示不良が発生しない高開
口率、高画質の横電界方式のアクティブマトリクス型液
晶表示装置を得ることができる。
As a result, it is possible to obtain a high aperture ratio, high image quality, horizontal electric field type active matrix liquid crystal display device which has a long service life, does not cause an afterimage phenomenon, and does not cause a vertical smear display defect.

【0026】[0026]

【実施例】本発明を実施例により更に具体的に説明す
る。
EXAMPLES The present invention will be described more specifically with reference to examples.

【0027】厚さ1.1mmの表面を研磨した透明なガ
ラス基板を二枚用意する。一方の基板上に薄膜トランジ
スタ(以下、TFTと云う)を形成し、さらにその上の
最表面に液晶配向膜を形成する。本実施例では、ポリイ
ミド配向膜を用い、その表面にラビング処理を施した。
他方の基板面にも同様にポリイミド配向膜を形成し、そ
の表面にラビング処理を施した。
Two transparent glass substrates having a thickness of 1.1 mm and having a polished surface are prepared. A thin film transistor (hereinafter, referred to as a TFT) is formed on one substrate, and a liquid crystal alignment film is further formed on an uppermost surface thereof. In this embodiment, a rubbing treatment was performed on the surface of a polyimide alignment film.
A polyimide alignment film was similarly formed on the other substrate surface, and its surface was subjected to a rubbing treatment.

【0028】上下基板の配向膜面を対向し、それぞれの
ラビング方向が互いにほぼ平行に、かつ、印加電界方向
との角度を85度に構成して、その基板間に誘電率異方
性(Δε)が正でその値が14.8(1kHz)、屈折
率異方性Δnが0.0865(589nm,20℃)の
ネマチック液晶組成物を封入,挾持した液晶パネルを作
製した。
The rubbing directions of the upper and lower substrates are opposed to each other, the rubbing directions are substantially parallel to each other, and the angle with the direction of the applied electric field is 85 degrees. ) Is positive, the value is 14.8 (1 kHz), and the liquid crystal panel is filled and sandwiched with a nematic liquid crystal composition having a refractive index anisotropy Δn of 0.0865 (589 nm, 20 ° C.).

【0029】なお、基板間ギャップ(d)は球状ポリマ
ビーズを分散,挾持し、液晶封入状態で3.6μmとし
た。これによってΔn・dは0.311μmとなった。
The gap (d) between the substrates was 3.6 μm in a state in which liquid crystal was sealed, with spherical polymer beads dispersed and sandwiched. Thereby, Δn · d became 0.311 μm.

【0030】上記液晶パネルを二枚の偏光板で挾み、一
方の偏光板の偏光透過軸方向を前記配向膜のラビング方
向から5°小さい角度に設定し、もう一方の偏光板をこ
れに直交配置した。
The above liquid crystal panel is sandwiched between two polarizing plates, the direction of the polarization transmission axis of one of the polarizing plates is set at an angle smaller by 5 ° from the rubbing direction of the alignment film, and the other polarizing plate is perpendicular to this. Placed.

【0031】これにより、液晶層に電界を印加し、光強
度を変調する電極間ギャップを12μmとしたとき、電
極間電位差が0Vで暗状態、5.2Vで明状態となるノ
ーマリクローズ特性が得られた。
Thus, when an electric field is applied to the liquid crystal layer and the gap between the electrodes for modulating the light intensity is set to 12 μm, the normally closed characteristic in which the potential difference between the electrodes is 0 V and the dark state and 5.2 V is a bright state. Obtained.

【0032】次に、TFTおよび各種電極の基本構成を
図1に示す。図1(a)は基板面に垂直な方向から見た
正面図、図1(b)はA−A’、図1(c)はB−B’
の側断面図を示す。
Next, FIG. 1 shows the basic structure of the TFT and various electrodes. 1A is a front view as viewed from a direction perpendicular to the substrate surface, FIG. 1B is AA ′, and FIG. 1C is BB ′.
FIG.

【0033】TFT11は走査(ゲート)電極1の上に
ゲート絶縁膜9を介して形成されるアモルファスシリコ
ン8、信号(ドレイン)電極4、および画素(ソース)
電極5で構成される。このTFT11は逆スタガ構造で
あり、走査電極線1を最下層に形成し、ゲート絶縁膜9
を介して、上層に信号電極線4および画素電極線5を同
一の金属層をパターン化して構成している。
The TFT 11 includes an amorphous silicon 8 formed on the scanning (gate) electrode 1 via a gate insulating film 9, a signal (drain) electrode 4, and a pixel (source).
It is composed of electrodes 5. The TFT 11 has an inverted staggered structure, in which the scanning electrode line 1 is formed in the lowermost layer, and the gate insulating film 9 is formed.
, The signal electrode line 4 and the pixel electrode line 5 are formed in the upper layer by patterning the same metal layer.

【0034】図1において、2は前段の走査電極線,3
は後段の走査電極線であり、5は前段の画素(イ)の画
素電極線、6は後段の画素(ロ)の画素電極線,7はさ
らに後段の画素における画素電極線である。
In FIG. 1, reference numeral 2 denotes a scanning electrode line at the previous stage;
Is a scanning electrode line at the subsequent stage, 5 is a pixel electrode line of the preceding pixel (a), 6 is a pixel electrode line of the succeeding pixel (b), and 7 is a pixel electrode line of a further later pixel.

【0035】画素電極線5はゲート絶縁膜9を介して前
段の走査電極線2に乗り越えて重なり、蓄積容量素子1
2を形成し、TFT11からの信号電位を保持する。
The pixel electrode line 5 goes over the scanning electrode line 2 in the previous stage via the gate insulating film 9 and overlaps therewith.
2 is formed to hold the signal potential from the TFT 11.

【0036】同様に、後段のTFT11'からの信号電
位は蓄積容量素子13に、さらに後段のTFT11''か
らの信号電位は蓄積容量素子14に保持される。後段の
画素電極線6は、画素電極線6'において走査電極線1
を乗り越え、画素電極線5と対向するよう画素電極線
6''として画素(イ)が構成される。
Similarly, the signal potential from the subsequent TFT 11 ′ is held in the storage capacitor 13, and the signal potential from the subsequent TFT 11 ″ is held in the storage capacitor 14. The pixel electrode line 6 at the subsequent stage is the scanning electrode line 1 in the pixel electrode line 6 '.
And the pixel (a) is configured as the pixel electrode line 6 ″ so as to face the pixel electrode line 5.

【0037】各蓄積容量素子12,13,14,…に、
蓄積する信号電位がVb+Vi,Vb−Vi+1,Vb
i+2,…となるように、基準電位Vbに対して正負が反
転する表示信号を入力すると、画素電極線5と画素電極
線6''との間には|Vi+Vi+1|の電位差による電界E
が、また、画素電極線6と画素電極線7との間には|V
i+ 1+Vi+2|の電位差による電界E'が印加され、液晶
層の液晶分子の配向が制御される。
Each of the storage capacitors 12, 13, 14,...
Signal potential accumulated V b + V i, V b -V i + 1, V b +
When a display signal whose sign is inverted with respect to the reference potential Vb is input so that V i + 2 ,..., | V i + V i + is applied between the pixel electrode line 5 and the pixel electrode line 6 ″. Electric field E due to 1 | potential difference
│V between the pixel electrode lines 6 and 7
An electric field E ′ due to the potential difference of i + 1 + Vi + 2 | is applied to control the alignment of the liquid crystal molecules in the liquid crystal layer.

【0038】この電極間電位差は、正負の電界印加によ
り従来構成の二倍となるから、電極間間隔を従来構成の
二倍としても液晶層に加わる電界強度は同等となる。
Since the potential difference between the electrodes is twice as large as that of the conventional configuration by applying the positive and negative electric fields, the intensity of the electric field applied to the liquid crystal layer is the same even if the interval between the electrodes is twice as large as that of the conventional configuration.

【0039】各電極間の液晶層に入射された光は変調さ
れ、電極間間隔を広げることは高開口率化につながる。
Light incident on the liquid crystal layer between the electrodes is modulated, and increasing the distance between the electrodes leads to a higher aperture ratio.

【0040】なお、前記の信号入力方式では、各画素の
表示信号は2画素信号の平均となるが、画素配置を交互
に信号線の方向に画素ピッチの1/2ずらした表示装置
と比較すると大きな遜色はない。
In the above-described signal input method, the display signal of each pixel is an average of two pixel signals. However, when compared with a display device in which the pixel arrangement is alternately shifted by half the pixel pitch in the direction of the signal line. There is no big difference.

【0041】但し、信号線方向の画素ピッチを1/2に
して、信号線方向に連続する各蓄積容量素子に蓄積する
信号電位が、Vb+Vi,Vb−Vi,Vb+Vi+1,Vb
i+1,Vb+Vi+2,Vb−Vi+2,…となるように表示
信号を入力すれば、各電極間の電位差は|2・Vi|,
|Vi+Vi+1|,|2・Vi+1|,|Vi+1+Vi+2|,
|2・Vi+2|,…になり、より高品位の表示を行うこ
とも可能である。
[0041] However, with the pixel pitch of the signal line direction to 1/2, the signal potential to accumulate in the storage capacitor element contiguous to the signal line direction, V b + V i, V b -V i, V b + V i +1 , V b
If a display signal is input so that V i + 1 , V b + V i + 2 , V b −V i + 2 ,..., The potential difference between the electrodes becomes | 2 · V i |
| V i + V i + 1 |, | 2 · V i + 1 |, | V i + 1 + V i + 2 |,
| 2 · V i + 2 |,..., And higher quality display can be performed.

【0042】この場合、走査電極線が増加する分だけ開
口率が低下するが、カラー表示装置の場合の画素は、走
査電極線方向の画素幅が信号線方向の画素幅の1/3で
あるので、従来構成と比較すればより高開口率となる。
In this case, the aperture ratio is reduced by an amount corresponding to the increase in the number of scanning electrode lines. However, in the case of a color display device, the pixel width in the scanning electrode line direction is 1/3 of the pixel width in the signal line direction. Therefore, the aperture ratio becomes higher as compared with the conventional configuration.

【0043】また、同一画素電極線に印加される信号電
圧を、走査電極線に印加されるゲート電圧のオフレベル
の電位に対して一定の正のバイアス電位(Vb)を基準
にして交流電圧とすると、液晶を交流駆動することがで
きる。
Further, the signal voltage applied to the same pixel electrode line is converted from an AC voltage based on a constant positive bias potential (V b ) with respect to the off-level potential of the gate voltage applied to the scan electrode line. Then, the liquid crystal can be AC driven.

【0044】図2に本発明の駆動波形を示す。i−1,
i,i+1番目の走査電極電圧を図(a),(b),
(c)に、i,i+1番目の走査電極線に接続されるT
FTへの信号電極電圧を(d),(e)に、i,i+1
番目の走査電極線に接続されるTFTからの画素電極電
圧(ソース電圧)を(f),(g)に、i,i+1番目
の走査電極線に接続されるTFTからの画素電極電圧に
よって、液晶層に印加される電圧を(h)に示す。
FIG. 2 shows a driving waveform of the present invention. i-1,
(a), (b),
(C) shows the T connected to the (i, i + 1) th scanning electrode line.
The signal electrode voltage to the FT is (d), (e), i, i + 1
The pixel electrode voltage (source voltage) from the TFT connected to the i-th scan electrode line is changed to (f) and (g), and the pixel electrode voltage from the TFT connected to the (i, i + 1) -th scan electrode line is used for liquid crystal. The voltage applied to the layer is shown in (h).

【0045】走査電極電圧VGは、パルス幅34.5μs
で繰返し周期は16.6msの矩形波で、パルスのオン
電圧(ハイレベル)はVGH,オフ電圧(ローレベル)は
GLに設定する。
The scan electrode voltage V G has a pulse width of 34.5 μs.
The repetition period is a rectangular wave of 16.6 ms, the ON voltage (high level) of the pulse is set to V GH , and the OFF voltage (low level) is set to V GL .

【0046】信号電極電圧VDは、ゲート電圧のオフレ
ベルの電位VGLに対し一定の正のバイアス電位Vbを中
心電圧VD-Cとして、表示階調に従い1フレーム時間毎
に、正負が反転する信号電圧Voff〜Vonを入力する。
この信号電圧は走査電極電圧VGがオン電圧(ハイレベ
ル)の時に画素電極に入力され、走査電極電圧VGがオ
フ電圧(ローレベル)の時に保持されるが、バイアス電
位Vbを信号電極電圧VDの最低電位VDLがVGLよりも高
くなるように設定すれば、ゲート電圧がオフレベルのと
きはTFTのゲート電圧は常に負となり、TFTは非導
通となって、画素電極電圧VSの最低電位VSLも保持さ
れる。
The signal electrode voltage V D has a positive bias potential Vb which is constant with respect to the off-level potential V GL of the gate voltage as a center voltage V DC , and the polarity is inverted every frame time according to the display gradation. to enter the signal voltage V off ~V on.
This signal voltage is input to the pixel electrode when the scan electrode voltage V G is on-voltage (high level), but the scan electrode voltage V G is held at the off-voltage (low level), the signal electrode a bias potential V b If the minimum potential V DL of the voltage V D is set to be higher than V GL , the gate voltage of the TFT is always negative when the gate voltage is at the off level, the TFT becomes non-conductive, and the pixel electrode voltage V The lowest potential V SL of S is also held.

【0047】本発明の構成では液晶層に印加される電圧
LCはi,i+1番目の走査電極線に接続されるTFT
からの画素電極電圧によって液晶層に印加される電圧V
S(i)とVS(i+1)との差となるので、液晶層には
信号電圧Voff〜Vonの二倍の電圧が印加される。この
電圧は従来構成の二倍であるから、電極間間隔を従来構
成の二倍としても液晶層に加わる電界強度は同等とな
る。
In the structure of the present invention, the voltage VLC applied to the liquid crystal layer is the same as that of the TFT connected to the (i, i + 1) th scanning electrode line.
Voltage V applied to the liquid crystal layer by the pixel electrode voltage from
Since the difference between S (i) and V S (i + 1), the liquid crystal layer twice the voltage of the signal voltage V off ~V on is applied. Since this voltage is twice that of the conventional configuration, the electric field intensity applied to the liquid crystal layer is the same even if the distance between the electrodes is twice that of the conventional configuration.

【0048】なお、画素電極電圧VSには、図2
(f),(g)に示すように、前段走査電極からのオン
電圧パルスVGHの飛込みがあるが、液晶層に印加される
電圧VLCでは、このオン電圧パルスVGHの飛込みは、次
段のオン電圧パルスVGHの飛込みによって相殺されるの
で大きな問題にはならない。
It should be noted that the pixel electrode voltage V S
As shown in (f) and (g), there is a jump of the on-voltage pulse V GH from the preceding scanning electrode, but with the voltage V LC applied to the liquid crystal layer, the jump of the on-voltage pulse V GH is as follows. This is not a serious problem because the offset is offset by the on-voltage pulse VGH of the stage.

【0049】図1(a)の構成で、各画素電極線5,
6,7,…の形状は信号線方向と同じである。各画素電
極線5,6,7,…には信号電極線4および後段の信号
電極線10からの他の表示信号の飛込みがある。
In the configuration shown in FIG. 1A, each of the pixel electrode lines 5,
The shape of 6, 7, ... is the same as the signal line direction. Each of the pixel electrode lines 5, 6, 7,... Has another display signal from the signal electrode line 4 and the subsequent signal electrode line 10.

【0050】しかし、各画素電極線5,6,7,…の方
向は信号線方向と同じであるから、他の表示信号の飛込
みによる画素電極電位の変動は、隣接する画素電極間で
同じになる。これらの画素電極電位の変動は、前記した
信号入力方式を用いれば、液晶層にかかる電界Eに対し
てはキャンセルされ、縦スメア表示不良が発生しない。
However, since the direction of each pixel electrode line 5, 6, 7,... Is the same as the signal line direction, the fluctuation of the pixel electrode potential due to the jump of another display signal is the same between adjacent pixel electrodes. Become. If the above-described signal input method is used, these fluctuations in the pixel electrode potential are canceled by the electric field E applied to the liquid crystal layer, and no vertical smear display failure occurs.

【0051】図1に示した基本的構成は、電気回路とし
ては図3に示す構成となる。図3で、1はi段目の走査
電極線、2は(i−1)段目の走査電極線、3は(i+
1)段目の走査電極線、4はj段目の信号電極線、10
は(j+1)段目の信号電極線を示す。
The basic configuration shown in FIG. 1 has the configuration shown in FIG. 3 as an electric circuit. In FIG. 3, reference numeral 1 denotes the i-th scanning electrode line, 2 denotes the (i-1) -th scanning electrode line, and 3 denotes (i +
1) scanning electrode lines at the stage 4, 4 are signal electrode lines at the j-th stage, 10
Indicates a (j + 1) -th stage signal electrode line.

【0052】各TFT11のゲート電極は、各走査電極
線1,2,3に接続され、各TFT11のドレイン電極
は各信号電極線4,10に接続されている。各TFT1
1のソース電極は各表示電極線5,6,7に接続され、
各表示電極線は前段の走査電極線との間に各蓄積容量素
子12,13,…を形成している。
The gate electrode of each TFT 11 is connected to each scanning electrode line 1, 2, 3, and the drain electrode of each TFT 11 is connected to each signal electrode line 4, 10. Each TFT1
One source electrode is connected to each display electrode line 5, 6, 7,
Each storage capacitor element 12, 13,... Is formed between each display electrode line and the preceding scanning electrode line.

【0053】液晶層に対する電界の印加は、表示電極線
5,6間、表示電極線6,7間等で行う。
An electric field is applied to the liquid crystal layer between the display electrode lines 5 and 6, between the display electrode lines 6 and 7, and the like.

【0054】本発明の基本的構成は、図3に示す電気回
路構成を満足すればよいので、より実際的な構成として
は図4に示すような構成が採用される。
The basic configuration of the present invention only needs to satisfy the electric circuit configuration shown in FIG. 3, so that a more practical configuration as shown in FIG. 4 is employed.

【0055】図4では表示電極線5,6,7の形状が図
1と異なる以外は図1と同じであり、表示電極線間距離
は図1の場合の約1/2に構成されている。
FIG. 4 is the same as FIG. 1 except that the shape of the display electrode lines 5, 6, 7 is different from that of FIG. 1, and the distance between the display electrode lines is configured to be about 1/2 of that in FIG. .

【0056】複数画素から構成されるパネルの部分の電
気回路を図5に示す。コントローラ15、垂直走査回路
16、映像信号駆動回路17を有し、液晶表示パネル1
8を構成している。
FIG. 5 shows an electric circuit of a part of a panel composed of a plurality of pixels. A liquid crystal display panel 1 having a controller 15, a vertical scanning circuit 16, and a video signal driving circuit 17;
8.

【0057】画素ピッチは水平方向(信号電極線間)は
110μm,垂直方向(走査電極線間)は330μmと
した。電極線幅は、走査電極線,信号電極線をそれぞれ
10μm,9μmとした。表示電極線幅は8μmとし、
表示電極線と信号電極線の間隔は6μmとした。
The pixel pitch was 110 μm in the horizontal direction (between signal electrode lines) and 330 μm in the vertical direction (between scanning electrode lines). The electrode line width was 10 μm and 9 μm for the scanning electrode line and the signal electrode line, respectively. The display electrode line width is 8 μm,
The distance between the display electrode lines and the signal electrode lines was 6 μm.

【0058】図4の構成は画素を2分割しているが、3
分割あるいは4分割することも可能である。特に、奇数
分割が可能であるのは本発明の特長である。
In the configuration shown in FIG. 4, the pixel is divided into two parts.
It is also possible to divide or divide into four. In particular, it is a feature of the present invention that odd division is possible.

【0059】コントラストを向上するために、表示電極
線間以外の間隙部に絶縁性のブラックマトリクスを形成
した。画素数は640×3本の信号電極線と、480本
の走査電極線とにより640×3×480個とし、R
(赤)、G(緑)、B(青)の三色のカラーフィルタを
TFT素子群を有する基板と対向する基板上に、縦スト
ライプ状に形成しカラー表示を可能とした。
In order to improve the contrast, an insulating black matrix was formed in a gap other than between the display electrode lines. The number of pixels is 640 × 3 × 480 by using 640 × 3 signal electrode lines and 480 scanning electrode lines.
Color filters of three colors (red), G (green), and B (blue) were formed in a vertical stripe shape on a substrate facing the substrate having the TFT element group to enable color display.

【0060】カラーフィルタの上には表面を平坦化する
透明樹脂からなる平坦化層を形成してある。映像信号駆
動回路17から信号電極線4への映像信号の入力は、通
常のライン反転駆動方式またはドット反転駆動方式が利
用できる。
A flattening layer made of a transparent resin for flattening the surface is formed on the color filter. The input of the video signal from the video signal drive circuit 17 to the signal electrode line 4 can use a normal line inversion drive system or a dot inversion drive system.

【0061】なお、本実施例では垂直方向の画素ピッチ
は水平方向の3倍としたが、この比を下げて、より高周
波のライン反転駆動またはドット反転駆動を行えば、よ
り高品位の表示が可能となる。
In this embodiment, the pixel pitch in the vertical direction is three times that in the horizontal direction. However, if this ratio is reduced and higher frequency line inversion driving or dot inversion driving is performed, higher quality display can be achieved. It becomes possible.

【0062】[0062]

【発明の効果】本発明のアクティブマトリクス型液晶表
示装置によれば、画素電極間距離が、従来構成の画素電
極−基準電極間距離と同じ場合は、同一の映像信号振幅
に対して、液晶に印加される電界は従来の二倍となるの
で、画素電極間距離を従来の画素電極−基準電極間距離
の二倍とすることができる。従って、画素に占める電極
配線の割合が低減できるので、開口率を増大することが
できる。
According to the active matrix type liquid crystal display device of the present invention, when the distance between the pixel electrodes is the same as the distance between the pixel electrode and the reference electrode in the conventional configuration, the liquid crystal is not affected by the same video signal amplitude. Since the applied electric field is twice as large as the conventional one, the distance between the pixel electrodes can be twice as large as the conventional distance between the pixel electrode and the reference electrode. Therefore, the ratio of the electrode wiring to the pixel can be reduced, so that the aperture ratio can be increased.

【0063】また、信号電極線から画素電極への飛込み
電圧は、液晶に印加される電界ではキャンセルされるた
め、縦スメアが発生しない。
Further, the jump voltage from the signal electrode line to the pixel electrode is canceled by the electric field applied to the liquid crystal, so that vertical smear does not occur.

【0064】更にまた、低負荷であり耐用時間が長く、
残像現象や縦スメア表示が発生しない高画質の交流駆動
方式の表示装置を得ることができる。
Further, the load is low and the service life is long,
It is possible to obtain a high-quality AC-driven display device that does not cause an afterimage phenomenon or vertical smear display.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の画素部の基本的構成を示す説明図。FIG. 1 is an explanatory diagram showing a basic configuration of a pixel portion of the present invention.

【図2】本発明の駆動波形を示す説明図。FIG. 2 is an explanatory diagram showing a drive waveform according to the present invention.

【図3】本発明の画素部の基本的電気回路構成を示す説
明図。
FIG. 3 is an explanatory diagram showing a basic electric circuit configuration of a pixel portion of the present invention.

【図4】本発明の実施例の画素部の構成を示す説明図。FIG. 4 is an explanatory diagram illustrating a configuration of a pixel unit according to an embodiment of the present invention.

【図5】本発明の複数画素から構成されるパネルの部分
の電気回路図。
FIG. 5 is an electric circuit diagram of a portion of a panel including a plurality of pixels of the present invention.

【符号の説明】[Explanation of symbols]

1,2,3…走査電極線、4,10…信号電極線、5,
6,7…画素電極線、8…アモルファスシリコン、9…
ゲート絶縁膜、11…TFT、12,13,14…蓄積
容量素子、15…コントローラ、16…垂直走査回路、
17…映像信号駆動回路、18…液晶表示パネル。
1, 2, 3 ... scanning electrode lines, 4, 10 ... signal electrode lines, 5,
6, 7 ... pixel electrode line, 8 ... amorphous silicon, 9 ...
Gate insulating film, 11 TFT, 12, 13, 14 storage capacitor element, 15 controller, 16 vertical scanning circuit,
17: video signal drive circuit, 18: liquid crystal display panel.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 峯村 哲郎 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Tetsuro Minemura 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 第一と第二の基板間に液晶が挿入され、
前記第一の基板には、マトリクス状に配置された複数の
走査電極線と信号電極線により複数の画素部が構成され
ており、前記画素部に設けたスイッチング素子と前記電
極の入力信号により、前記液晶の配向状態の変調と偏向
手段により入射光の透過率または反射率を変調するアク
ティブマトリクス型液晶表示装置において、 前記スイッチング素子には画素電極が接続され、前記画
素電極と、同一の信号電極線に接続された隣接する他の
スイッチング素子に接続された画素電極とが、基板面に
ほぼ平行な電界を印加するように配置され、前記両画素
電極による電界により液晶分子の長軸方向を基板面とほ
ぼ平行に動作させるよう構成されていることを特徴とす
るアクティブマトリクス型液晶表示装置。
1. A liquid crystal is inserted between a first substrate and a second substrate,
On the first substrate, a plurality of pixel portions are configured by a plurality of scanning electrode lines and signal electrode lines arranged in a matrix, and by a switching element provided in the pixel portion and an input signal of the electrode, In an active matrix liquid crystal display device that modulates the transmittance or reflectance of incident light by modulating the alignment state of the liquid crystal and deflecting means, a pixel electrode is connected to the switching element, and the same signal electrode as the pixel electrode is used. A pixel electrode connected to another adjacent switching element connected to the line is disposed so as to apply an electric field substantially parallel to the substrate surface. An active matrix type liquid crystal display device characterized by being configured to operate substantially parallel to a surface.
【請求項2】 前記スイッチング素子に接続された画素
電極は、該当するスイッチング素子の走査電極線に隣接
する走査電極線に絶縁層を介して重なることにより蓄積
容量を形成すると共に、前記隣接する走査電極線を乗り
越えて隣接する画素に延長され、前記隣接する画素の一
方の画素電極を構成している請求項1に記載のアクティ
ブマトリクス型液晶表示装置。
2. A pixel electrode connected to the switching element overlaps a scanning electrode line adjacent to a scanning electrode line of the corresponding switching element via an insulating layer to form a storage capacitor and form a storage capacitor. 2. The active matrix type liquid crystal display device according to claim 1, wherein the active matrix type liquid crystal display device is extended to an adjacent pixel over an electrode line and constitutes one pixel electrode of the adjacent pixel.
【請求項3】 前記画素電極は信号電極線方向に隣接す
る画素電極と同一のパターンを構成している請求項1ま
たは2に記載のアクティブマトリクス型液晶表示装置。
3. The active matrix type liquid crystal display device according to claim 1, wherein the pixel electrode has the same pattern as a pixel electrode adjacent in the signal electrode line direction.
【請求項4】 前記画素にカラーフィルタを備えた請求
項1,2または3に記載のアクティブマトリクス型液晶
表示装置。
4. The active matrix type liquid crystal display device according to claim 1, wherein the pixel is provided with a color filter.
【請求項5】 第一と第二の基板間に液晶が挿入され、
前記第一の基板には、マトリクス状に配置された複数の
走査電極線と信号電極線により複数の画素部が構成され
ており、 前記スイッチング素子には画素電極が接続され、前記画
素電極と、同一の信号電極線に接続された隣接する他の
スイッチング素子に接続された画素電極とが、基板面に
ほぼ平行な電界を印加するように配置され、前記両画素
電極による電界により液晶分子の長軸方向を基板面とほ
ぼ平行に動作させるよう構成されており、 前記画素電
極に印加される信号電圧は、走査電極線に印加される電
圧のオフレベルの電位に対して一定の正のバイアス電位
を基準にし、信号電極線方向に隣接する画素電極間の電
位の正負が反転し、かつ、フレーム表示周期でも前記電
位の正負が反転して、前記液晶の配向状態を変調し、偏
向手段により入射光の透過率または反射率を変調するこ
とを特徴とするアクティブマトリクス型液晶表示装置の
駆動方法。
5. A liquid crystal is inserted between the first and second substrates,
On the first substrate, a plurality of pixel portions are configured by a plurality of scanning electrode lines and signal electrode lines arranged in a matrix, a pixel electrode is connected to the switching element, the pixel electrode, A pixel electrode connected to another adjacent switching element connected to the same signal electrode line is disposed so as to apply an electric field substantially parallel to the substrate surface. The signal voltage applied to the pixel electrode is a constant positive bias potential with respect to the off-level potential of the voltage applied to the scanning electrode line. With reference to the above, the polarity of the potential between the pixel electrodes adjacent in the signal electrode line direction is inverted, and the polarity of the potential is also inverted during the frame display cycle, modulating the alignment state of the liquid crystal, and deflecting means. The driving method of an active matrix type liquid crystal display device characterized by modulating a transmittance or reflectance of the incident light Ri.
【請求項6】 前記画素電極間に印加する電位が交流で
ある請求項5に記載のアクティブマトリクス型液晶表示
装置の駆動方法。
6. The driving method of an active matrix liquid crystal display device according to claim 5, wherein a potential applied between said pixel electrodes is an alternating current.
JP18468996A 1996-07-15 1996-07-15 Active matrix type liquid crystal display device and driving method thereof Expired - Lifetime JP3243185B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18468996A JP3243185B2 (en) 1996-07-15 1996-07-15 Active matrix type liquid crystal display device and driving method thereof

Publications (2)

Publication Number Publication Date
JPH1031229A true JPH1031229A (en) 1998-02-03
JP3243185B2 JP3243185B2 (en) 2002-01-07

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550289A2 (en) * 1992-01-02 1993-07-07 Amdahl Corporation A mechanism to detect stores into the instruction stream
KR100342123B1 (en) * 1998-07-24 2002-06-26 가네코 히사시 Liquid crystal display panel
JP2006293362A (en) * 2005-04-06 2006-10-26 Lg Phillips Lcd Co Ltd Liquid crystal panel and liquid crystal display device having the same
JP2012230169A (en) * 2011-04-25 2012-11-22 Japan Display Central Co Ltd Liquid crystal display device
KR101298402B1 (en) * 2005-04-06 2013-08-20 엘지디스플레이 주식회사 Liquid Crystal Panel and Liquid Crystal Display Device having the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550289A2 (en) * 1992-01-02 1993-07-07 Amdahl Corporation A mechanism to detect stores into the instruction stream
EP0550289A3 (en) * 1992-01-02 1993-11-10 Amdahl Corp A mechanism to detect stores into the instruction stream
KR100342123B1 (en) * 1998-07-24 2002-06-26 가네코 히사시 Liquid crystal display panel
JP2006293362A (en) * 2005-04-06 2006-10-26 Lg Phillips Lcd Co Ltd Liquid crystal panel and liquid crystal display device having the same
US8416163B2 (en) 2005-04-06 2013-04-09 Lg Display Co., Ltd. Liquid crystal panel and liquid crystal display device having the same
KR101298402B1 (en) * 2005-04-06 2013-08-20 엘지디스플레이 주식회사 Liquid Crystal Panel and Liquid Crystal Display Device having the same
JP2012230169A (en) * 2011-04-25 2012-11-22 Japan Display Central Co Ltd Liquid crystal display device
US9046719B2 (en) 2011-04-25 2015-06-02 Japan Display Inc. Liquid crystal display device
US9817284B2 (en) 2011-04-25 2017-11-14 Japan Display Inc. Liquid crystal display device

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