JPH10312175A - Liquid crystal display device and liquid crystal drive semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device and a liquid crystal drive semiconductor device reducing power consumption and a cost by reducing memory capacity storing the image data. SOLUTION: This liquid crystal display device is provided with an active matrix type display matrix substrate 1 and a drive circuit 2a, and the drive circuit 2a is provided with a controller 12a and plural signal line drive ICs 11a. Switching elements 7, 31 interlocked with each other and switch controlled are provided respectively on the display matrix substrate 1 and the signal line drive ICs 11a. The required pixel data among the digital pixel data from the outside are selected by the switching element 31 through a high speed memory 13 and a low speed memory 14 in the signal line drive IC 11a to be converted to an analog voltage by a D/A converter 15. This analog voltage is supplied to signal lines 4 of answering pixels through the switching elements 7 in the display matrix substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device which individually drives switching elements provided in pixel units.

[0002]

2. Description of the Related Art A matrix type display device represented by a liquid crystal display device is widely used as a display device of a personal computer, a word processor or the like because of its features such as thinness, light weight and low power consumption. Above all,
Active matrix display devices provided with a switching element for each pixel are being actively researched and developed because a clear image can be obtained without crosstalk between adjacent pixels.

FIG. 8 is a block diagram showing an example of a conventional active matrix type liquid crystal display device. The liquid crystal display device shown in FIG. 8 includes a display matrix substrate 1 and a drive circuit 2 for driving switching elements on the display matrix substrate 1. The drive circuit 2 and the display matrix substrate 1
And the number of connection lines for connecting to and is reduced.

The display matrix substrate 1 includes a plurality of pixel electrodes 3 two-dimensionally arranged on a glass substrate, signal lines 4 arranged in one direction between the pixel electrodes 3, and a direction substantially orthogonal to the signal lines 4. A gate line 5 arranged between the pixel electrodes 3 of
The switching device includes a switching element disposed at an intersection of the signal line and the gate line, and a switching element connected to one end of each signal line and selecting one of the plurality of signal lines. Switching element 6 and switching element 7
Is, for example, a polysilicon TFT (Thin Film Transis
tor).

On the other hand, the driving circuit 2 includes a plurality of signal line driving ICs 11 for outputting analog voltages corresponding to pixel data,
Controller 1 for controlling these signal line driving ICs 11
2 is provided. Each of the signal line driving ICs 11 includes a high-speed memory 13, a low-speed memory 14, and a plurality of D / A converters 15.

The high-speed memory 13 and the low-speed memory 14 have a memory capacity capable of storing half of pixel data for one horizontal line. The controller 12 has four types of high-speed memories 16
And switches 20a and 20b for controlling data writing to the high-speed memories 16 to 19;
A switch 21 for controlling the reading of data from
The load signal for controlling the low-speed memory 14 in the signal line driving IC 11 and the switching element 7 in the display matrix substrate 1
Control signal generation circuit 22 for generating a selection signal for controlling
And

Although the drive circuit 2 also controls the gate lines 5 in the display matrix substrate 1, it is not shown in FIG.

FIG. 9 is an operation timing chart of the liquid crystal display device shown in FIG. 8, and the operation of FIG. 8 will be described with reference to FIG. Digital pixel data is input to the drive circuit 2 in the order in which display pixels are arranged. These pixel data are stored in switch 2
0a and 20b, the high-speed memories 16 to 20 are divided into data at odd pixel positions and data at even pixel positions.
19 is stored.

More specifically, high-speed memories 16 and 18 store pixel data at odd-numbered (odd) pixel positions of one horizontal line, and high-speed memories 17 and 19 store pixel data at even-numbered pixel positions of one horizontal line. Are respectively stored. The switches 20a and 20b and the switch 21 operate in conjunction with each other, and while the pixel data for one horizontal line is stored in the high-speed memories 16 and 17, the pixel data stored in the high-speed memories 18 and 19 are stored. Is read, and conversely, the high-speed memory 18,
While one horizontal line of pixel data is stored in the pixel 19, the pixel data stored in the high-speed memories 16 and 17 is read. That is, the high-speed memories 16 and 17 and the high-speed memories 18 and 19 perform writing and reading alternately for each horizontal line.

For example, among the pixel data for one horizontal line input to the controller 12 between the times T1 and T3 in FIG.
The data at the even pixel position is input to the high-speed memory 17.

On the other hand, during the time T1 to T2, the data of the odd pixel position of the immediately preceding line stored in the high-speed memory 18 is output via the switch 21 and the high-speed memory in the signal line driving IC 11 is output. 13 is stored. Between times T2 and T3, the data of the even-numbered (even) pixel position of the immediately preceding line stored in the high-speed memory 19 is stored in the switch 2.
1 and is stored in the high-speed memory 13 in the signal line driving IC 11.

At time T4, the load signal output from the controller 12 changes from the high level to the low level, and the data stored in the high-speed memory 13 is collectively stored in the low-speed memory 14 for one horizontal line.

Thereafter, between times T5 and T6, the data of the next horizontal line is stored in the high-speed memories 18 and 19 while being divided into odd-numbered (odd) pixel positions and even-numbered (even) pixel positions. , And 17 are stored in the high-speed memory 13 in the signal line driving IC 11 via the switch 21.

In the conventional active matrix type display device shown in FIG. 8, a switching element 7 is provided on a display matrix substrate 1 so as to distribute analog pixel data output from a D / A converter 15.
And the total number of connection lines connecting the display matrix substrate 1 to
It can be reduced to half of the total number of signal lines 4 on the display matrix substrate 1. Thereby, the number of output terminals of the signal line driving IC 11 can be reduced, and the required signal line driving IC 11
The number of 11 also decreases.

[0015]

However, the device shown in FIG. 8 has a high-speed memory 16 to 1 inside the controller 12.
9 for a total of two horizontal lines, and a high-speed memory 13 in the signal line driving IC 11 in total.
And the low-speed memory 14 for each half horizontal line. As the memory capacity inside the drive circuit 2 increases, the power consumption increases, an extra mounting area is required, the cost increases, and it is difficult to reduce the size of the device.

The present invention has been made in view of such a point, and an object of the present invention is to reduce the capacity of a memory for storing image data as much as possible to reduce power consumption, cost, and size. A liquid crystal display device and a liquid crystal driving semiconductor device are provided.

[0017]

According to a first aspect of the present invention, there is provided a liquid crystal display device comprising: a plurality of pixel electrodes arranged on a substrate; and a signal line disposed between the pixel electrodes. And a plurality of gate lines respectively arranged between the pixel electrodes in a direction different from the signal line, and a plurality of gate lines arranged between the pixel electrode and the signal line and controlled on / off by the gate line. A switching element, a storage device for temporarily storing digital pixel data of a plurality of pixels input from the outside, and a plurality of digital pixel data stored in the storage device are provided for each of the plurality of digital pixel data, among these data First switching means for selecting and outputting one of them, and a D / A converter for converting the digital pixel data output from the first switching means into analog pixel data , Provided for each of the D / A converters, provided for each of the plurality of signal lines, and switched in conjunction with the first switching means to supply the analog pixel data to the corresponding signal line. 2 switching means.

According to a second aspect of the present invention, in the liquid crystal display device according to the first aspect, the first switching means includes digital pixel data corresponding to n (n is a natural number) pixels arranged adjacent to each other. And the second switching means selects one of the plurality of signal lines corresponding to the n pixels to be switched by the first switching means. The signal line for the same pixel as the digital pixel data is selected.

According to a third aspect of the present invention, in the liquid crystal display device according to the second aspect, the first switching means converts one of digital pixel data corresponding to an odd pixel position and an even pixel position adjacent thereto. And the second switch selects the signal line corresponding to the digital pixel data selected by the first switch.

According to a fourth aspect of the present invention, in the liquid crystal display device according to any one of the first to third aspects, the storage device includes:
For each pixel, digital pixel data for a red (R) signal, a green (G) signal, and a blue (B) signal are stored, and digital pixel data for a red (R) signal, a green (G) signal, and a blue (B) signal are stored. 3) three signal lines for signals are provided for each pixel, the first switching means switches all of the digital pixel data corresponding to the same pixel in an interlocked manner, and the second switching means All of the signal lines corresponding to the pixels selected by the first switching unit are switched in an interlocked manner.

According to a fifth aspect of the present invention, in the liquid crystal display device according to any one of the first to fourth aspects, the digital pixel data is constituted by a plurality of bits representing a gradation for each pixel, and The switching means switches each bit of the digital pixel data corresponding to the same pixel in conjunction with each other.

According to a sixth aspect of the present invention, in the liquid crystal display device according to any one of the first to fifth aspects, the storage device can store the digital pixel data for one horizontal line determined by the total number of the signal lines. First and second storage units having different memory capacities, the first storage unit sequentially stores the digital pixel data input from the outside in pixel units, and the second storage unit The digital image data stored in the first storage unit is stored collectively for one horizontal line.

According to a seventh aspect of the present invention, in the liquid crystal display device according to the sixth aspect, a first control for controlling a timing of storing digital pixel data stored in the first storage section in the second storage section. And a control signal generating circuit for generating a second control signal for controlling the switching timing of the first and second switching means. The digital image signal input from the outside is the first digital signal. Is first stored in the storage unit.

According to an eighth aspect of the present invention, in the liquid crystal display device according to any one of the first to seventh aspects, the liquid crystal includes the storage device, and an arbitrary number of the first switching means and the D / A converter. A liquid crystal driving semiconductor device, comprising: a driving semiconductor device; and a display matrix substrate having the plurality of pixel electrodes, the signal lines, the gate lines, the switching element, and the second switching unit. And the number of the signal lines is provided, and the digital pixel data is externally input to each of the liquid crystal driving semiconductor devices.

According to a ninth aspect of the present invention, in the liquid crystal display device according to the eighth aspect, when the number of the signal lines to be switched by each of the second switching means is n, the entirety of the liquid crystal driving semiconductor device is provided. A predetermined number of the D / A converters are provided inside each of the liquid crystal driving semiconductor devices so that the total number of the analog pixel data transmitted to the display matrix substrate becomes 1 / n.

According to a tenth aspect, in the liquid crystal display device according to any one of the first to seventh aspects, the storage device comprises:
A liquid crystal driving semiconductor device having an arbitrary number of the first switching means, the second switching means, and the D / A converter; and a plurality of the pixel electrodes, the signal lines, the gate lines, and the switching elements. A display matrix substrate, wherein the number of the liquid crystal driving semiconductor devices is provided in accordance with the number of the D / A converters and the total number of the signal lines. Digital pixel data is input, and predetermined for each of the liquid crystal driving semiconductor devices so that the total number of the analog pixel data transmitted from all of the liquid crystal driving semiconductor devices to the display matrix substrate matches the number of the signal lines. A number of said D / A converters are provided.

According to an eleventh aspect of the present invention, in the liquid crystal display device according to any one of the first to tenth aspects, each of the switching elements is a polysilicon type TFT (Thin Fi
lm Transistor).

According to a twelfth aspect of the present invention, there are provided a plurality of pixel electrodes arranged on a substrate, a signal line disposed between the pixel electrodes, and a signal line disposed between the pixel electrodes in a direction different from the signal line. Gate lines, a plurality of first switching elements respectively arranged between the pixel electrode and the signal line, and controlled to be turned on and off by the gate line, and provided for each of the plurality of signal lines. A liquid crystal drive semiconductor device for controlling a voltage of said signal line of a display matrix substrate, comprising: a second switching element for selecting one of signal lines, wherein a plurality of externally input digital pixels are provided. A storage device for temporarily storing data, and a plurality of digital pixel data stored in the storage device, each of which is provided and selected by the second switching element. A third switching element that selects and outputs the digital pixel data corresponding to the signal line, and converts the digital pixel data output from the third switching element into analog pixel data and outputs the digital pixel data to the second switching element. And a D / A converter for supplying.

According to a thirteenth aspect of the present invention, there are provided a plurality of pixel electrodes arranged on a substrate, a signal line disposed between the pixel electrodes, and a signal line disposed between the pixel electrodes in a direction different from the signal line. Voltage of the signal line of the display matrix substrate, comprising: a gate line provided; and a plurality of first switching elements respectively disposed between the pixel electrode and the signal line and controlled on / off by the gate line. A storage device for temporarily storing digital pixel data of a plurality of pixels input from the outside, and a storage device provided for each of the plurality of signal lines, and one of the signal lines. And a second switching element for selecting one of them, and a second switching element for each of a plurality of digital pixel data stored in the storage device, the second switching element being selected by the second switching element. A third switching element that selects and outputs the digital pixel data corresponding to the signal line, and converts the digital pixel data output from the third switching element into analog pixel data and outputs the digital pixel data to the second switching element. And a D / A converter for supplying.

The invention of claim 1 will be described with reference to FIG. 1, for example. The "switching element" is the switching element 6, and the "storage device" is the high-speed memory 13 and the low-speed memory 1
4, the “first switching means” includes a switching element 31;
"Second switching means" corresponds to the switching elements 7, respectively.

The invention of claim 6 will be described with reference to FIG. 1, for example.
The “second storage unit” corresponds to the low-speed memory 14, respectively.

The invention of claim 7 will be described with reference to FIG. 1, for example.
corresponds to a.

The invention according to claim 8 will be described with reference to FIG. 1, for example. The "liquid crystal driving semiconductor device" is a signal line driving IC.
11a.

The tenth aspect of the present invention will be described with reference to FIG. 7, for example.
Corresponds to C11c.

The invention according to claim 11 will be described with reference to FIG. 1, for example. The "first switching element" corresponds to the switching element 6, the "second switching element" corresponds to the switching element 7, and the "third switching element". Is the switching element 3
1 respectively. The invention of claim 13 will be described with reference to FIG. 7, for example.
Corresponds to the switching element 6, the "second switching element" corresponds to the switching element 7, and the "third switching element" corresponds to the switching element 31, respectively.

[0036]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a liquid crystal display device to which the present invention is applied will be specifically described with reference to the drawings.

[First Embodiment] FIG. 1 is a block diagram of a first embodiment of the liquid crystal display device according to the present invention. FIG.
Is an active matrix type liquid crystal display device as in FIG. 8, and the same components as those in FIG. 8 are denoted by the same reference numerals.

The liquid crystal display device shown in FIG. 1 includes a display matrix substrate 1 and a drive circuit 2a. The configuration of the display matrix substrate 1 is the same as that shown in FIG. 8, and a plurality of pixel electrodes 3 arranged vertically and horizontally on a glass substrate, and signal lines 4 and gate lines 5 arranged vertically and horizontally between the pixel electrodes 3.
And a switching element 6 disposed between the pixel electrode 3 and the signal line 4 and controlled to be turned on / off by the voltage of the gate line 5, and one of two adjacent signal lines 4 is selected. And a switching element 7. The switching element 7 is, for example, a polysilicon TFT (Thin Film T).
ransistor). Polysilicon type TFT
Is characterized in that it can operate at high speed, has a clear liquid crystal display, and consumes little power.

It is to be noted that the display matrix substrate 1 may be constituted by using a switching element (for example, an amorphous silicon type TFT) other than the polysilicon type TFT.

The driving circuit 2a includes a plurality of signal line driving ICs 1
1a and a controller 12a. Signal line drive I
C11a is a high-speed memory 13 and a low-speed memory 1
4, switching element 31, D / A converter 15
And Each of the high-speed memory 13 and the low-speed memory 14 has a memory capacity capable of storing pixel data for one horizontal line of the display matrix substrate 1. In addition, the total number of the switching elements 31 included in each of the signal line driving ICs 11a is reduced to half of the total number of the signal lines 4 of the display matrix substrate 1, and similarly, the total number of the D / A converters 15 is also reduced. It is half of the total number.

The order of the data stored in the high-speed memory 13 and the low-speed memory 14 matches the display order of the pixels on the display matrix substrate 1. The data at the odd pixel position and the even number adjacent to the pixel are displayed. (even) The data of the pixel position is stored alternately.

The switching elements 31 are provided corresponding to the switching elements 7 in the display matrix substrate 1, respectively, and the corresponding switching elements 7, 31 are controlled to switch in conjunction with each other. Each switching element 7,
31 selects one of adjacent odd-numbered (odd) pixels and even-numbered (even) pixels. For example, when the switching element 31 selects data of an odd-numbered (odd) pixel, the switching element 7 is connected to the signal line 4 of the same pixel. Select the switching element 3
When 1 selects data of an even pixel, the switching element 7 selects the signal line 4 of the same pixel.

As described above, the switching elements 3 are provided on both the signal line driving IC 11a and the display matrix substrate 1.
By providing 1, 7 the number of data lines sent from the drive circuit 2a to the display matrix substrate 1 can be reduced, and the number of signal line drive ICs 11a can be reduced.

For example, if the number of signals output from each of the signal line driving ICs 11a is n (n is a natural number),
The required number of signal line driving ICs 11a is one (2 × n) of the total number of signal lines 4. SVGA (Super Vid
In the case of the eo Graphics Array) display standard, the total number of signal lines 4 is 800 × 3 = 2400. The reason for multiplying "3" is
This is because the signal line 4 is required for each color of RGB.
Therefore, if the number of outputs of the signal line driving IC 11a is 3
If the number of signal line driving ICs 11a is 00, each output terminal of the signal line driving IC 11a switches between the two signal lines 4. Therefore, the required number of signal line driving ICs 11a is 2400 ÷ (2 × 3
00) = 4.

XGA (Extended Graphics Array)
In the case of the display standard, the total number of signal lines 4 is 1024 × 3 = 30.
It becomes 72. Therefore, if the signal line drive IC 11
Assuming that the number of outputs of a is 384, the number of required signal line driving ICs 11a is 3072 ÷ (2 × 384) = 4.

The controller 12a shown in FIG. 1 controls a load signal for controlling the low-speed memory 14 in the signal line driving IC 11a and controls switching between the signal line driving IC 11a and the switching elements 31 and 7 in the display matrix substrate 1. Is output. Although not shown in FIG. 1, the controller 12a outputs selection signals at different timings for each of the corresponding switching elements 31 and 7.

Although the gate drive circuit for controlling the voltage of the gate line 5 of the display matrix substrate 1 is omitted in FIG. 1, this gate drive circuit is provided inside or outside the display matrix substrate 1, Controls the voltage of each gate line 5 in accordance with a control signal from the CPU.

FIG. 2 is a timing chart of the liquid crystal display device shown in FIG. 1, and the operation of FIG. 1 will be described with reference to FIG.
Digital pixel data input from the outside is stored in the high-speed memory 13 in the signal line driving IC 11a in pixel units. The writing speed of the high-speed memory 13 is determined by the number of pixels per horizontal line of the display matrix substrate 1. Since the high-speed memory 13 has a memory capacity of only one horizontal line, every time data of a new line is stored,
The original line data is erased.

For example, consider a case where digital pixel data of line 1 is stored in the high-speed memory 13 between times T1 and T2 in FIG. As shown in the drawing, the high-speed memory 13 stores odd pixel data and odd pixel data in the order of display pixels.
Pixel data is stored alternately.

At time T3, the load signal from the controller 12a changes from high level to low level,
Pixel data in the high-speed memory 13 is collectively stored in the low-speed memory 1
4 is stored. The contents of the low-speed memory 14 are held until time T7 when the load signal falls next.

At time T4, the data of line 2 starts to be stored in the high-speed memory, and at time T6, the storage of the data of the second line ends.

On the other hand, at about the same time as the time T3, the selection signal from the controller 12a changes to the high level, maintains the high level until the time T5, and thereafter, the time T5 to the time T5.
It becomes low level during 7.

The switching element 31 switches in accordance with the logic of the selection signal. When the selection signal is at a high level, odd-numbered (odd) pixel data in the low-speed memory 14 is stored. It is input to the D / A converter 15. That is, the logic of the selection signal is switched every half of one horizontal line period, and during this half horizontal line period, the odd pixel data or the even pixel data of one horizontal line is provided. Is output from the low-speed memory 14.

The switching element 31 of the signal line driving IC 11a and the switching element 7 of the display matrix substrate 1 are switched in conjunction with each other.
dd) When the pixel data is output, the switching element 7 selects the signal line 4 at the odd pixel position, and conversely,
When the even-numbered pixel data is output from the low-speed memory 14, the switching element 7 selects the signal line 4 at the even-numbered pixel position. Pixel data from the low-speed memory 14 is converted into an analog voltage (analog pixel data) by a D / A converter 15 and applied to the signal line 4 through the switching element 7.

As described above, in the first embodiment, the digital pixel data input from the outside is stored in the high-speed memory 13 in the signal line driving IC 11a without rearranging the data. It is no longer necessary to store digital pixel data once, so that one horizontal line of memory can be saved in the entire liquid crystal display device as compared with the conventional circuit configuration shown in FIG. By saving memory, power consumption and cost can be reduced, and miniaturization is also possible.

In the first embodiment, a signal line driving IC
In order to switch the switching element 31 in conjunction with the switching element 7 in the display matrix substrate 1 by providing a switching element 31 in the
The number of data lines sent to the display matrix substrate 1 from 1a can be reduced, and the number of signal line drive ICs 11a can be reduced accordingly.

In FIG. 1, one pixel corresponds to one signal line 4.
In the case of a color liquid crystal, signal lines 4 are provided corresponding to the respective colors of RGB, and these three signal lines 4 constitute one pixel.

FIG. 3 is a schematic configuration diagram of a liquid crystal display device for color display. One pixel is constituted by three signal lines 4 adjacent to each other, and each of the signal lines 4 is provided with a switching element 7 separately. Each of these switching elements 7 selects one of the adjacent signal lines 4. Similarly, a switching element 31 corresponding to the switching element 7 is provided in the signal line driving IC 11a.

In the case of a liquid crystal display device capable of gradation display, each pixel needs to be represented by a plurality of bits. FIG. 4 is a schematic configuration diagram of a liquid crystal display device capable of gradation display. FIG. 4 shows an example in which digital pixel data input from the outside is composed of 6 bits each. FIG. 4 shows only one switching element 31 for one pixel. However, in practice, a switching element 31 is provided for each bit, and each switching element 31 constituting the same pixel is provided.
Are all switched in tandem. When each of the R, G, and B color signals is composed of a plurality of bits representing gradation, all the bits are switched in conjunction with each of these colors.

[Second Embodiment] In the second embodiment, the signal line driving IC 11b and the display matrix substrate 1 are internally provided.
A switching element for switching three or more pixels is provided.

FIG. 5 is a block diagram of a second embodiment of the liquid crystal display device. The liquid crystal display device of FIG. 5 includes a display matrix substrate 1 and a driving circuit 2b, as in the first embodiment.
The configuration of b is almost the same as that of the first embodiment except that the number of switching signals of the switching elements 7 and 31 is different.

The switching elements 7 in the display matrix substrate 1 are provided for every adjacent n (n is a natural number) signal lines 4, and select one of the n signal lines 4. The switching elements 31 in the signal line driving IC 11b are provided corresponding to the switching elements 7 in the display matrix substrate 1, respectively.
1 selects one of n digital pixel data output from the low-speed memory 14. Note that the type of pixel selected by the switching element 31 and the type of pixel selected by the switching element 7 correspond to the type.

A selection signal for instructing switching of the switching elements 7 and 31 is output from the controller 12a, and the selection signal has a bit number corresponding to the switching number of the switching elements 7 and 31. For example, when the switching elements 7 and 31 switch three pixels, the number of bits of the selection signal is 2 bits.

FIG. 6 is a timing chart of the liquid crystal display device shown in FIG. 5, and the operation of FIG. 5 will be described with reference to FIG.
FIG. 6 shows an example in which n = 3.

During the period from time T1 to T2, an external digital pixel signal is output from the high-speed memory 13 in the signal line driving IC 11b.
Are sequentially stored in pixel units. In FIG. 6, the input digital pixel data is sorted in the order of input into a1, a2, a3, b
1, b2, b3, c1, c2...

At time T3, the load signal from the controller 12a changes from high level to low level,
At this point, all data in the high-speed memory 13 is stored collectively in the low-speed memory 14.

Further, the controller 12a determines whether or not one horizontal line cycle is divided into three equal parts (time T3 to T4, T4 in FIG. 6).
To T5, T5 to T6), select signals having different logics are output. Thus, during the period from time T3 to T4, the data a1, b1, c1..., During the period from time T4 to T5, the data a2, b2, c2. are sent from the signal line driving IC 11b to the D / A converter 15 and are converted into analog voltages. Also, the D / A converter 15
The switching element 7 is connected to an output side of the switching element 31. The switching element 7 is switched and controlled in conjunction with the switching element 31 to select one of the n signal lines 4.

As described above, in the second embodiment, each of the switching elements 7 and 31 switches n pixels (n is a natural number of 3 or more), so that the total number of signal lines 4 in the display matrix substrate 1 is reduced. It is sufficient to provide D / A converters 15 in the drive circuit 2b by the number of 1 / n, and the signal line drive IC
Since the number of output terminals of the eleventh is sufficient, the high-resolution display matrix substrate 1 having a large number of signal lines 4 can be driven. Further, since the number of the switching elements 7 and 31 can be reduced, the circuit configurations of the drive circuit 2b and the display matrix substrate 1 can be simplified, and the product cost can be reduced.

[Third Embodiment] In the third embodiment, the D
The switching element 7 on the output side of the / A converter 15 is
It is provided in the signal line driving IC 11c.

FIG. 7 is a block diagram of a third embodiment of the liquid crystal display device. In the liquid crystal display device of FIG. 7, the switching element 7 in the display matrix substrate 1 of FIG.
It is characterized by being moved into C11c, and the other configuration is the same as that of the liquid crystal display device of FIG.

With this configuration, the signal line driving IC
Although there is a problem that the number of output terminals of 11c increases,
Since the switching element 7 need not be provided in the display matrix substrate 1, the present invention can be applied to a general-purpose display matrix substrate 1 having no switching element, and the cost can be reduced.

As a modification of the first embodiment, the switching elements 7 and D in the signal line driving IC 11c of FIG.
The / A converter 15 may be provided in the display matrix substrate 1. Accordingly, although the configuration of the display matrix substrate 1 is complicated, the signal line driving IC 1
1c can be simplified.

Further, the low-speed memory 14 in the signal line driving IC 11 a of FIG. 1 may be moved to the display matrix substrate 1. Alternatively, the function of the signal line driving IC 11a in FIG. 1 may be entirely transferred to the display matrix substrate 1, whereby the signal line driving IC 11a becomes unnecessary, and the liquid crystal display device can be constituted only by the display matrix substrate 1.
By the way, in FIGS.
Although the signal line 4 and the like are switched by 1, the specific configuration of the switching elements 7 and 31 is not particularly limited. For example,
It may be constituted by a single MOS transistor or a combination thereof, or may be constituted by a combination of a logic gate and the like.

In each of the above-described embodiments, the memory capacity of the high-speed memory 13 and the low-speed memory is set to one horizontal line in order to reduce the memory capacity. However, the memory capacity is not particularly limited. A memory capacity for a line may be provided.

[0075]

As described above in detail, according to the present invention, the first and second switching means for selecting one of a plurality of pixels are provided on the input side and the output side of the D / A converter, respectively. Therefore, there is no need to rearrange the digital pixel data input from the outside, and the memory capacity of the storage device for storing the digital pixel data can be reduced accordingly.
Further, since a plurality of pixels are switched by the first and second switching means, the number of D / A converters can be reduced, and the circuit configuration of the entire liquid crystal display device can be simplified. In particular, the first
When the switching means and the D / A converter are provided in the liquid crystal driving semiconductor device and the second switching means is provided in the display matrix substrate, the number of pixel data transmitted from the liquid crystal driving semiconductor device to the display matrix substrate is reduced. , And is less susceptible to noise.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is an operation timing chart of the liquid crystal display device shown in FIG.

FIG. 3 is a schematic configuration diagram of a liquid crystal display device for color display.

FIG. 4 is a schematic configuration diagram of a liquid crystal display device capable of gradation display.

FIG. 5 is a block diagram of a liquid crystal display device according to a second embodiment of the present invention.

6 is an operation timing chart of the liquid crystal display device shown in FIG.

FIG. 7 is a block diagram of a third embodiment of the liquid crystal display device according to the present invention.

FIG. 8 is a block diagram showing an example of a conventional active matrix liquid crystal display device.

9 is an operation timing chart of the liquid crystal display device shown in FIG.

[Explanation of symbols]

 Reference Signs List 1 display matrix substrate 2a, 2b, 2c drive circuit 3 pixel electrode 4 signal line 5 gate line 6, 7, 31 switching element 11a, 11b, 11c signal line drive IC 12a controller 13 high-speed memory 14 low-speed memory 15 D / A converter

Claims (13)

[Claims] A plurality of pixel electrodes arranged on a substrate; a signal line disposed between the pixel electrodes; and a gate line disposed between the pixel electrodes in a direction different from the signal line. And disposed between the pixel electrode and the signal line,
A plurality of switching elements on / off controlled by the gate line; a storage device for temporarily storing digital pixel data of a plurality of pixels input from the outside; a plurality of digital pixel data stored in the storage device A first switch for selecting and outputting one of these data, and a D / D converter for converting the digital pixel data output from the first switch into analog pixel data. An A converter, provided for each of the D / A converters, provided for each of the plurality of signal lines, and switched in conjunction with the first switching means to switch the analog pixel data to the corresponding signal line. A liquid crystal display device comprising: a second switching unit that supplies the liquid crystal display. 2. The method according to claim 1, wherein the first switching means selects one of digital pixel data corresponding to n (n is a natural number) pixels arranged adjacent to each other. The signal line related to the same pixel as the digital pixel data selected by the first switching unit is selected from the plurality of signal lines corresponding to the n pixels to be switched by the first switching unit. The liquid crystal display device according to claim 1. 3. The first switching means selects one of digital pixel data corresponding to an odd-numbered pixel position and an even-numbered pixel position adjacent thereto, and the second switching means selects the first switching. 3. The liquid crystal display device according to claim 2, wherein the signal line corresponding to the digital pixel data selected by the means is selected. 4. The storage device stores digital pixel data for a red (R) signal, a green (G) signal, and a blue (B) signal for each pixel, For green (G) signal and blue (B)
Three signal lines for signals are provided for each pixel, the first switching means switches all of the digital pixel data corresponding to the same pixel in conjunction with each other, and the second switching means 4. The liquid crystal display device according to claim 1, wherein the first switching unit switches all of the signal lines corresponding to the selected pixels in an interlocked manner. 5. The digital pixel data is composed of a plurality of bits representing a gradation for each pixel, and the first switching means operates each bit of the digital pixel data corresponding to the same pixel in conjunction with each other. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is switched. 6. The storage device includes first and second storage units having a memory capacity capable of storing the digital pixel data for one horizontal line determined by the total number of the signal lines, wherein the first storage unit The unit sequentially stores the digital pixel data input from the outside in pixel units, and the second storage unit collectively stores the digital image data stored in the first storage unit for one horizontal line. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is stored. 7. A first control signal for controlling a timing of storing digital pixel data stored in said first storage section in said second storage section, and switching between said first and second switching means. And a control signal generating circuit for generating a second control signal for controlling timing, wherein the digital image data input from the outside is first stored in the first storage unit. 7. The liquid crystal display device according to 6. 8. A liquid crystal driving semiconductor device having the storage device, an arbitrary number of the first switching means and the D / A converter, the plurality of pixel electrodes, the signal lines, the gate lines, and the switching. And a display matrix substrate having the second switching means. The liquid crystal driving semiconductor device is provided in a number corresponding to the number of the D / A converters and the total number of the signal lines. The liquid crystal display device according to claim 1, wherein the digital pixel data is externally input to each of the devices. 9. When the number of said signal lines to be switched by each of said second switching means is n, the total number of said analog pixel data transmitted from all of said liquid crystal driving semiconductor devices to said display matrix substrate is: 9. The liquid crystal display device according to claim 8, wherein a predetermined number of the D / A converters are provided inside each of the liquid crystal driving semiconductor devices so as to be 1 / n. 10. A liquid crystal driving semiconductor device having the storage device, an arbitrary number of the first switching means, the second switching means, and the D / A converter, the plurality of pixel electrodes, and the signal lines. And a display matrix substrate having the gate lines and the switching elements. The liquid crystal driving semiconductor device is provided in a number corresponding to the number of the D / A converters and the total number of the signal lines. In each of the devices, the digital pixel data is input from the outside, and the total number of the analog pixel data transmitted from all of the liquid crystal driving semiconductor devices to the display matrix substrate matches the number of the signal lines. 8. The liquid according to claim 1, wherein a predetermined number of said D / A converters are provided in each of said liquid crystal driving semiconductor devices. Crystal display device. 11. A liquid crystal display device according to claim 1, wherein each of said switching elements is a polysilicon type TFT (Thin Film Transistor). 12. A plurality of pixel electrodes arranged on a substrate,
A signal line disposed between each of the pixel electrodes, a gate line disposed between the pixel electrodes in a direction different from the signal line, and a gate line disposed between the pixel electrode and the signal line. A display matrix substrate comprising: a plurality of first switching elements that are turned on / off by gate lines; and a second switching element that is provided for each of the plurality of signal lines and selects one of the signal lines. A liquid crystal drive semiconductor device for controlling the voltage of the signal line, comprising: a storage device for temporarily storing digital pixel data for a plurality of pixels input from the outside; and a plurality of digital pixels stored in the storage device. The digital pixel data provided for each data and corresponding to the signal line selected by the second switching element is selected and output. A liquid crystal driving semiconductor, comprising: a third switching element; and a D / A converter that converts the digital pixel data output from the third switching element into analog pixel data and supplies the analog pixel data to the second switching element. apparatus. 13. A plurality of pixel electrodes arranged on a substrate,
A signal line disposed between each of the pixel electrodes, a gate line disposed between the pixel electrodes in a direction different from the signal line, and a gate line disposed between the pixel electrode and the signal line. What is claimed is: 1. A liquid crystal driving semiconductor device for controlling a voltage of said signal line of a display matrix substrate comprising a plurality of first switching elements which are controlled to be turned on and off by gate lines, comprising: a plurality of externally input digital pixels A storage device for temporarily storing data, a second switching element provided for each of the plurality of signal lines and selecting one of the signal lines, and a plurality of digital pixels stored in the storage device The digital pixel data provided for each data and corresponding to the signal line selected by the second switching element is selected and output. A liquid crystal driving semiconductor, comprising: a third switching element; and a D / A converter that converts the digital pixel data output from the third switching element into analog pixel data and supplies the analog pixel data to the second switching element. apparatus.