JPH10308517A - Manufacture of thin-film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce off current and to decrease damages to a gate insulating film by performing the process for doping the first impurities to the lower concentration in a region, which becomes the channel of polycrystalline silicon thin film before forming the gate insulating film. SOLUTION: On an insulating transparent substrate 1-1, a non-added polycrystalline silicon thin film islands 1-2 and 1-3 are formed. Then, a resist mask 1-4 is formed, and boron is doped as a channel only in the island 1-3. Thereafter, the resist mask 1-4 is removed, and then a gate oxide film 1-6 is formed. For a gate electrode 1-7, n-type polycrystalline silicon is used. With the gate electrode 1-4 as a mask, boron or phosphor ions are implanted at the required parts, and boron doped regions 1-8 and phosphor doped regions 1-9 are formed. Then, an interlayer insulating film 1-12 is formed. Thereafter, the activating heat treatment of the boron doped regions 1-8 and the phosphor doped regions 1-9 is performed at about 1000 deg.C. At this time, hydrogen or plasma treatment or hydrogen-ion implanting treatment is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CMOS (Complementary-M) used for a switching element or a driving circuit of a pixel of an active matrix or an image sensor formed on an insulating transparent substrate.
eta1-Oxide-Semiconductor)
The present invention relates to a CMOS type polycrystalline silicon thin film transistor in which a large current can be obtained at a low driving voltage and the absolute values of threshold voltages (hereinafter, referred to as Vth) of both channel transistors match, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In polycrystalline silicon, it is generally considered that defects such as dangling bonds existing at crystal grain boundaries act as trap levels or barriers for carriers (John YW Seto, J, A
pp. Phys., 46, 5247 (1975)), and therefore, in order to improve the performance of polycrystalline silicon thin film transistors, it is necessary to reduce the defects.
(J. Appl. Phys., 53 (2), 1193.
(1982)) For this purpose, the above-mentioned defect is terminated by hydrogen.
Hydrogen plasma treatment (Japan Society of Applied Physics, Proceedings of the 1986 Autumn Meeting, Lecture No. 27p-Q-5 or Mate
r1s-Research-Society Symp. P
rc. Vol. 53, 419 (1986)) or a hydrogen ion implantation method (IEEE Electron-Device-Letters, Vol. EDL-7, N
o. 11, November (1986), 597 page) or formation of a plasma nitride film (see IEICE Technical Report SSD 83-75, page 23). By using these methods, the characteristics of the transistor can be significantly improved. However, while the characteristics are improved, the Nth transistor shifts greatly in the depletion direction and the P channel transistor shifts slightly in the enhancement direction.
This causes the problem of abnormal shift. It is believed that this is because, when the transistor is exposed to plasma, a positive fixed charge is formed in the gate oxide film, and the channel portion is always induced to be negative. (See IEICE Technical Report SSD 83-75, page 23) On the other hand, the shift amount of Vth due to the hydrogen plasma treatment is from -1 V to -2 V for the N-channel transistor, while the shift amount of Vth for the N-channel transistor is It is about minus 0.1 V (experimental result by the inventor). The cause of this phenomenon is not yet known.

[0003]

In the prior art, prior to the formation of the gate electrode, a method of channel doping boron by ion implantation over the entire surface of the wafer and a boron-doped polycrystalline silicon thin film as the polycrystalline silicon thin film are proposed. There are two methods of stacking and using. However, as described above, the shift amount of Vth due to the hydrogen plasma or hydrogen ion implantation method or the plasma nitride film forming step is different between the N-channel and the P-channel. The shift is excessive, and the absolute value of Vth of both channels cannot be equalized.

The present invention relates to the control of Vth of a CMOS type polycrystalline silicon thin film transistor by such a hydrogen plasma treatment, a hydrogen ion implantation method or a plasma nitride film forming step. The problem of a large shift in the enhancement direction was solved, and V
It is an object of the present invention to realize a CMOS type polycrystalline silicon thin film transistor in which the absolute value of th is small, the rise of the sub-threshold region is sharp, and the absolute value of Vth is substantially the same for both the P channel and the N channel.

[0005]

According to the present invention, there is provided a CMOS type polycrystalline silicon thin film transistor and a method of manufacturing the same, wherein a polycrystalline silicon thin film is formed on an insulating transparent substrate and a gate oxide formed by thermally oxidizing the polycrystalline silicon thin film. In a CMOS type polycrystalline silicon thin film transistor having an N channel polycrystalline silicon thin film transistor and a P channel polycrystalline silicon thin film transistor constituted by a film, a gate electrode and an impurity diffusion region, the N channel polycrystalline silicon thin film is formed before forming the gate electrode. The method is characterized by comprising a step of selectively channel-doping boron only in the thin film transistor, and a hydrogen plasma treatment step, a hydrogen ion implantation step, or a plasma nitride film formation step after the activation heat treatment of the impurity diffusion region.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 will be described with reference to FIG. In FIG. 1A, islands 1-2 and 1 of an undoped polycrystalline silicon thin film are formed on an insulating transparent substrate 11-1.
-3 is formed. The islands of the undoped polycrystalline silicon thin film are deposited by low pressure CVD or the like, and subsequently formed by photoetching. Next, as shown in FIG. 3B, a resist mask 1-4 is formed, and only the islands 1-3 are channel-doped with boron. Thus, only the islands 1-3 to be N-channel thin film transistors are made of P-type polycrystalline silicon doped with low concentration of boron. Reference numeral 1-5 denotes a boron beam. However, it is necessary to set a Vth shift amount of about 1 volt and a channel doping implantation amount such that the resistivity does not decrease. An appropriate value is about 10 ¹² cm ⁻² to 10 ¹³ cm ⁻² . Thereafter, the resist master 1-4 is peeled off. Subsequently, a gate oxide film 16 is formed by thermal acid as shown in FIG. FIGS. 1D and 1E show a general CMOS process. A gate electrode 1-7 is made of n-type polycrystalline silicon. Using the gate electrode 1-7 as a mask, boron or phosphorus is ion-implanted where necessary to form a boron-doped region 18 and a phosphorus-doped region 1-9. Thus, the P-channel polysilicon thin film transistor 1-1
0 and N lightly doped with boron by channel doping
A channel polycrystalline silicon thin film transistor 1-11 is manufactured. Next, an interlayer insulating film 1-12 is formed. The interlayer insulating film is formed using SiO ₂ by a CVD method (low-pressure CVD or normal pressure CVD). Subsequently, heat treatment for activating the boron-doped regions 1-8 and the phosphorus-doped regions 1-9 is performed at about 1000.degree. The TFT characteristics at this stage are as follows: P-channel polycrystalline silicon thin film transistor 1-1
Although 0 is a normal characteristic, the N-channel polycrystalline silicon thin film transistor 1-11, which is doped with boron at a low concentration, shifts in the enhancement direction. Here, hydrogen plasma processing or hydrogen ion implantation processing is performed. FIGS. 1 to 13 show highly reactive hydrogen radicals or hydrogen ion beams generated by hydrogen plasma. Hydrogen plasma can be easily obtained by using a general parallel plate type plasma device and hydrogen gas. Thereafter, the steps necessary for the devices, such as a contact hole forming step and an electrode forming step, are continued. When a metal (such as aluminum or chromium) is used as the electrode material, there is no problem if a hydrogen plasma treatment or a hydrogen ion implantation treatment is performed after the electrode is formed. However, ITO (I
In the case where a transparent conductive film such as ndium tin oxide (SnO ₂ ) or the like is used for the electrode material, the transparent conductive film is subjected to a reducing action, so that hydrogen plasma treatment or hydrogen ion implantation must be performed before the electrode is formed.

In the first embodiment, a method of performing selective channel doping before forming a gate oxide film is described. In a second embodiment, a method of performing selective channel doping after forming a gate oxide film will be described. As shown in FIG. 3A, islands 2-2 and 2-3 of an undoped polycrystalline silicon thin film are formed on an insulating transparent substrate 2-1 in the same manner as in the first embodiment.
Next, a gate oxide film 2-4 is formed by thermal oxidation as shown in FIG. Subsequently, FIG.
-5 is formed, and only the island 2-3 of the undoped polycrystalline silicon thin film is channel-doped with boron. In this way, only the islands 213 to be N-channel polycrystalline silicon thin film transistors are made of P-type polycrystalline silicon doped with boron at a low concentration through the gate oxide film 2-4. Reference numeral 216 denotes a boron beam. Since the amount of implanted channel doping has been described in the first embodiment, it is omitted here. Thereafter, the resist mask 2-5 is peeled off. Hereinafter, the steps shown in FIGS. 1D, 1E, and 1F are the same as those described with reference to FIGS. 1D, 1E, and 1F in the first embodiment, and thus description thereof will be omitted.

As described above, according to the present invention, the N-channel polycrystalline silicon thin film transistor generated by the conventional hydrogen plasma processing is changed from 1 V to 2 V in the depletion direction.
Abnormal shift problem of degree shifts, since the selected channel doping boron into the channel portion of the N-channel polycrystalline silicon thin film Toranjizuta only in a low concentration (10 ¹² cm ^-2 from 10 ¹³ cm ^-2 order), the enhancement direction It can be controlled and solved. Therefore, the advantage of reducing defects of polycrystalline silicon by hydrogen plasma treatment, hydrogen ion implantation treatment, or plasma nitride film formation can be used to the maximum. That is,
The rising of the sub-threshold region becomes steep, the absolute value of Vth is reduced, and N channel, P
Each channel has an excellent characteristic that the magnitudes of the absolute values of Vth coincide. A CMOS type polycrystalline silicon thin film transistor can be realized. FIG. 3 shows the effect of the present invention on a CMOS type polycrystalline silicon thin film transistor. FIG. 3A shows the effect of the present invention on an N-channel polycrystalline silicon thin film transistor. The figure shows data obtained by the inventor through experiments. The horizontal axis represents the voltage V _GS between the gate and the source, and the vertical axis represents the logarithm of the drain voltage I _DS .
The measurement was carried out by the voltage V _DS between the drain and the source to 5V fixed. In this figure, the curve indicated by a broken line 3-1 is a result obtained by the conventional method, and the curve indicated by a solid line 3-2 is a transistor characteristic of a thin film transistor selectively doped with boron. FIG. 3B similarly shows transistor characteristics of a P-channel polycrystalline silicon thin film transistor.
V _{DS is} -5V. Since the P-channel polycrystalline silicon thin film transistor is not channel-doped, the shift amount of Vth does not matter. As can be seen from these results, in the conventional method, an abnormal shift in the depletion direction of the N-channel due to hydrogen plasma treatment, hydrogen ion implantation treatment, plasma nitride film formation, etc. (hereinafter collectively referred to as hydrogen treatment) is entirely boron-free. Since the channel doping was performed in the direction, the P-channel polycrystalline silicon thin film transistor having a small abnormal shift due to the hydrogen treatment was abnormally shifted in the enhancement direction. In the present invention, boron is selectively channel-doped only in the N-channel polycrystalline silicon thin film transistor, so that Vth is controlled in the enhancement direction only in the N-channel, and after the hydrogen treatment, the absolute values of Vth in both channels almost match. It has become possible to realize an excellent CMOS polycrystalline silicon thin film transistor.

[0009]

When the present invention is applied to an active matrix substrate, an OFF current is small, so that a high-contrast active matrix substrate can be realized. In addition, since it has a CM0S structure, it can be applied to an image sensor in which a shift register circuit and a photoelectric conversion element are formed on the same substrate. Can be expected.
Since the OFF current is also reduced, it is useful for reducing power consumption.
Further, since the rise of the transistor characteristics becomes steep, the driving voltage of the element can be reduced, which leads to an improvement in the reliability of the element.

As described above, the requirements for high-speed operation, low power consumption, low drive voltage, and high reliability of devices such as an active matrix substrate or an image sensor are satisfied. The effect of the present invention is very large.

[Brief description of the drawings]

FIGS. 1A to 1F show a CMOS according to the present invention.
FIG. 6 is a process drawing of a type polycrystalline silicon thin film transistor, which is Example 1.

FIGS. 2A to 2F show a second embodiment of the present invention.
FIG.

FIGS. 3A and 3B are transistor characteristic diagrams showing the effect of the present invention on a CMOS type polycrystalline silicon thin film transistor. FIGS.

[Explanation of symbols]

1-4 and 2-5; resist masks for selective channel doping 1-5 and 2-6; boron beams 1-13 and 2-11; hydrogen radicals 3-1; N-channel transistor curves according to conventional examples 3- 2; N-channel transistor curve according to the present invention 3-3; P-channel transistor curve according to the present invention

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[Procedure amendment]

[Submission date] May 18, 1998

[Procedure amendment 1]

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[Claims]

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[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor used for a switching element or a driving circuit of a pixel of an active matrix or an image sensor formed on a substrate.

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[Correction target item name] 0005

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[0005]

According to the present invention, there is provided a method of manufacturing a thin film transistor for forming a thin film transistor on a substrate, wherein a step of doping a first impurity at a low concentration in a region to be a channel of the polycrystalline silicon thin film; Forming a gate electrode on the polycrystalline silicon thin film via the gate insulating film; and selectively forming a source / drain region by doping the polycrystalline silicon thin film with a second impurity at a high concentration. Hydrogen-treating the polycrystalline silicon thin film after forming the source / drain regions, and doping a region of the polycrystalline silicon thin film which becomes a channel with a first impurity at a low concentration, Before forming a gate insulating film.

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[Correction target item name] 0007

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In the first embodiment, a method of performing selective channel doping before forming a gate oxide film has been described. In a reference example, a method of performing selective channel doping after forming a gate oxide film will be described. As shown in FIG. 3A, islands 2-2 and 2-3 of an undoped polycrystalline silicon thin film are formed on an insulating transparent substrate 2-1 in the same manner as in the first embodiment. Next, the gate oxide film 2 is formed by thermal oxidation as shown in FIG.
-4 is formed. Subsequently, a resist master 2-5 is formed as shown in FIG. 3C, and boron is channel-doped only in the islands 2-3 of the non-added polycrystalline silicon thin film. In this way, only the islands 213 to be N-channel polycrystalline silicon thin film transistors are made of P-type polycrystalline silicon doped with boron at a low concentration through the gate oxide film 2-4. Reference numeral 216 denotes a boron beam. Since the amount of implanted channel doping has been described in the first embodiment, it is omitted here.
Thereafter, the resist mask 2-5 is peeled off. Hereinafter, the steps shown in FIGS. 1D, 1E, and 1F are the same as those described with reference to FIGS. 1D, 1E, and 1F in the first embodiment, and thus description thereof will be omitted.

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[0009]

According to the present invention, the following remarkable effects can be obtained. (A) By subjecting the polycrystalline silicon thin film to hydrogen treatment after forming the source / drain regions, defects such as dangling bonds in the silicon thin film can be reduced, and the transistor characteristics can be improved. (B) an abnormal shift in threshold value caused by hydrogen treatment of the polycrystalline silicon thin film can be controlled by doping the first impurity with a low concentration;
The off-state current can be reduced. (C) The step of doping the region of the polycrystalline silicon thin film which becomes a channel with the first impurity at a low concentration is before forming the gate insulating film, thereby reducing damage to the gate insulating film due to doping. be able to.

[Procedure amendment 6]

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[Brief description of the drawings]

FIGS. 1A to 1F show a CMOS according to the present invention.
FIG. 6 is a process drawing of a type polycrystalline silicon thin film transistor, which is Example 1.

FIGS. 2A to 2F are views showing a reference example of the present invention.

FIGS. 3A and 3B are transistor characteristic diagrams showing the effect of the present invention on a CMOS polycrystalline silicon thin film transistor. FIGS.

[Description of Signs] 1-4 and 2-5; Resist mask for selective channel doping 1-5 and 2-6; Boron beam 1-13 and 2-11; Hydrogen radical 3-1; N channel according to conventional example 3-2; N-channel transistor curve according to the present invention 3-3; P-channel transistor curve according to the present invention

Claims (1)

[Claims] 1. An N-channel polycrystalline silicon comprising a polycrystalline silicon thin film, a gate oxide film formed by thermally oxidizing the polycrystalline silicon thin film, a gate electrode, and an impurity diffusion region on an insulating transparent substrate. In the method of manufacturing a thin film transistor for forming a thin film transistor and a P-channel polycrystalline silicon thin film transistor, prior to forming the gate electrode, selectively channel-doping boron only to the N-channel polycrystalline silicon thin film transistor;
A method for manufacturing a thin film transistor, comprising: a hydrogen plasma treatment step, a hydrogen ion implantation step, or a plasma nitride film formation step after the activation heat treatment of the impurity diffusion region.