JPH10308362A - Metallization structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a metallization structure, which is small in resistivity, has excellent electricity transfer characteristics and at the same time, is textured to a high degree, and moreover, to prevent the formation of a hillock on the structure by a method wherein aluminium layers, aluminium alloy layers or both layers of the aluminium layers and the aluminum alloy layers, which come into contact electrically with tower group IVA metal layers having a thickness in a specified range, are formed. SOLUTION: Four or five-layer interconnected metallized layers are formed on interlayer stud connection layers 10, which are encircled with an insulator 8 and are connected with a silicon substratelike device substrate 6. Lower group IVA metal layers 13 consist of a titanium layer and the thickness of a metallization structure is about 90 to about 110 angstroms. By limiting this thickness, the structure of a metal layer, which is added afterwards, and the texture of the metal layer are controlled. Layers 15 to come into contact electrically with the lower layers 13 are aluminium layers or aluminium alloy layers. Titanium nitride layers 14 on the lower layers 13 prevent a reaction of the aluminium layers 15 with the lower layers 13 and capping layers consisting of titanium layers 18 and titanium nitride layers 19 perform an antireflection action.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a metallization structure, and more particularly to a structure having an aluminum layer and / or an aluminum alloy layer exhibiting excellent electromigration characteristics. Further, the structure of the present invention provides a highly textured aluminum <111> layer. The structure of the present invention is particularly useful for forming electrical connections or wiring, such as between active and / or passive devices of an integrated circuit structure.

[0002]

BACKGROUND OF THE INVENTION Aluminum and aluminum alloys are used to make various electrical connections or wiring in electronic devices, such as in integrated circuit structures. Aluminum or aluminum alloys are used to make electrical connections between active and / or passive devices in an integrated circuit structure. It is customary to use aluminum or an alloy electrically connected to the underlying substrate, such as silicon. Aluminum and silicon are electrically connected to each other, but an intermediate conductive material between silicon and aluminum to improve the electrical connection to silicon and to form a physical (metaradi) barrier between silicon and aluminum. It is customary to insert layers. This is to prevent electromigration and spiking of aluminum into silicon. The migration of aluminum atoms into the underlying silicon can impair the performance and reliability of the resulting integrated circuit structure.

In addition to electromigration, the problem of hillock growth also arises. These problems are particularly noticeable at the submicron level. As the demands on reducing interconnect line size and increasing current density increase, it is essential to overcome or at least minimize electromigration and hillock growth.

In an attempt to overcome the problems encountered with pure aluminum, aluminum has been alloyed with, for example, copper. However, relatively high proportions of aluminum copper (greater than 2%) are known to be difficult to dry etch and corrode relatively easily.

In an effort to improve the use of aluminum copper as an interconnect metallization,
Aluminum copper is taught to be layered with refractory metals, such as in US Pat. No. 4,017,890. This patent application discloses a method of forming a narrow intermetallic strip carrying large currents on a body such as a semiconductor or an integrated circuit, wherein the conductive strip comprises aluminum or aluminum copper together with at least one transition metal and the structure obtained thereby. Has been proposed. Although aluminum copper and transition metal structures improve the electromigration problems associated with aluminum copper, the problems of etching and corrosion and the complete removal of hillocks have not been solved.

Hillocks are formed, for example, because of the large difference in the coefficient of thermal expansion between the metal interconnect and the substrate. To eliminate and minimize hillock formation, it has been proposed to use a multilayer structure instead of a single layer of interconnect metallization. Hillock formation is effectively reduced by using a multilayer structure of aluminum or aluminum intermetallics with a layer of refractory metal. A typical interconnect metallization structure includes a layered structure of an aluminum silicon compound with a layer of a refractory metal such as titanium deposited thereon ("Ho").
mogenousand Layered Films
of Aluminum / Silicon with
Titanium for Multi-Level
Interconnects ", 1988, IEEE
E, V-MIC Conference, June 2
5-26, 1985).

[0007] Improvements have also been made to this layered metal structure to provide lower resistivity, hillock-free interconnect metallization. These improvements include the incorporation of a barrier metal, such as titanium tungsten or titanium nitride, under the aluminum silicon to prevent contact spiking and to prevent the formation of ternary compounds in the aluminum silicon alloy. It is included. ("Multi-Layered Interc
connections for VLSI ", MRS
Symposia Proceedings, Fal
1, 1987). In addition, other device interconnect structures have been proposed that provide lower resistivity and a more planar and defect-free interconnect structure. For example, IBM
Technical Disclosure Bull
etin, Vol. 21, no. 11, April 1
979, p. 4527-4528 teaches the improvement of interconnect metallurgy by sputter deposition. In addition, the feature of using a capping layer to improve performance is
BM TDB, Vol. 17, No. 1A, 1984 and TDB, Vol. 21, no. 2, July 19
78.

Further, US Pat. No. 5,071,714 discloses an aluminum copper conductor having excellent electromigration characteristics, being free of hillocks, capable of being dry-etched, and resistant to corrosion, having a low copper content. The structure is disclosed. Furthermore, the structure disclosed in this patent application has a relatively low resistivity.

[0009]

However, there is still room for improving the electromigration characteristics. Accordingly, it is an object of the present invention to provide a structure that exhibits excellent electromigration performance, is free of hillocks, and does not suffer from loss of dry-etchable and corrosion-resistant properties of the structure.

[0010]

SUMMARY OF THE INVENTION The present invention is a metallization comprising an underlayer of a Group IVA metal having a thickness of about 90 Angstroms to about 110 Angstroms, and a layer of aluminum and / or aluminum alloy in electrical contact therewith. Regarding the structure. The metallization structures of the present invention exhibit excellent electromigration properties, are highly textured, and are free of hillocks. Further, the metallization structures of the present invention exhibit relatively low resistivity and are relatively easy to manufacture.

[0011]

FIG. 1 is a cross-sectional view of a preferred embodiment of an interconnect metallurgy structure according to the present invention. Referring to FIG. 1, the interconnect metallurgy is preferably an insulator 8
It includes a four or five layer structure on an interlayer stud connection 10 that connects to a device substrate 6, such as silicon, surrounded by. The metallurgical structure includes an underlayer of a Group IVA metal, preferably a layer of titanium. Important to the success of the present invention is that the thickness of this underlayer 13 be between about 90 angstroms and about 110 angstroms. As described below, by limiting the thickness of this underlayer 13, the structure and texture of the subsequently added metal layer is carefully controlled. This is important in obtaining the required properties of the structure of the present invention.

Further, at the center of the metallization structure of the present invention is a layer 15 in electrical contact with the lower layer 13. Layer 15 is aluminum or an aluminum alloy.
Representative aluminum alloys include copper, magnesium, silicon, lanthanides such as vanadium and yttrium, and alloying metals such as palladium. When present, the amount of alloying metal is preferably up to about 3 weight percent of the alloy, most preferably from about 0.5 to about 1%.
Weight percent. If necessary, mixtures of alloying metals can also be used. The preferred alloying metal is copper. This layer 15 generally has a thickness of about 2000 Angstroms to about 6000 Angstroms, and more typically has a thickness of about 2000 Angstroms to about 2500 Angstroms. The aluminum layer or aluminum alloy layer is a highly <111> textured layer. Highly textured refers to intensity versus half width on chi scan (ω9
5) is less than 15 degrees, and the volume fraction of random crystal grains is small (for example, less than 20%). This textured structure is important in achieving the greatly improved electromigration performance obtained according to the present invention.

Although not required, a titanium nitride layer 14 is preferably disposed between the group IVA layer 13 and the aluminum layer or aluminum alloy layer 15. This titanium nitride layer disposed on and in contact with the lower layer 13 prevents the reaction between the aluminum layer 15 and the lower layer 13. Generally, this layer 1
4 has a thickness of about 50 Angstroms to about 500 Angstroms, preferably about 50 Angstroms to about 150 Angstroms.

Although not required, according to a preferred embodiment of the present invention, a capping layer is formed on layer 15.
When present, the capping layer improves the lithographic process by acting as an anti-reflective layer to help control line width. Preferred capping layers are titanium nitride, and I
It is a combination of a layer 18 of a group VA metal, preferably titanium, and a titanium nitride layer 19. Generally, the titanium nitride layer is between about 150 Angstroms and about 800 Angstroms, more typically between about 200 Angstroms and about 500 Angstroms. Generally, the titanium layer is between about 50 angstroms and about 200 angstroms.

While this completes the structure of the single interconnect layers according to the present invention, those skilled in the art will recognize that these layers can then be repeated in a multi-level sequence to complete the interconnect circuit for the device.

These various layers are formed by chemical vapor deposition (C
VD) techniques or by physical vapor deposition (PVD) techniques such as evaporation and sputtering. The preferred method is sputter deposition, and the most preferred technique is to perform sputtering by collimation or "long throw" as discussed below.

The importance of using an underlayer of a Group IVA metal having a thickness of 90 Angstroms to 110 Angstroms is demonstrated by Table 1 below.

Table 1 Effect of Ti underlayer thickness on Al-0.5Cu film texture Ti thickness (Å) Volume fraction random ω95 (degrees) 250 0.33 12.2 125 0.23 9.4 100 0. 17 9.4 75 0.26 10.4

Table 1 summarizes the texture data obtained on a series of aluminum 0.5 weight percent copper films having the structure x {Ti / 5200} Al (Cu) / 320} TiN. x represents the Ti underlayer thickness. In this table, the optimal Al <111> texture is the minimum volume fraction of the random component and the narrowest width of the <111> diffraction peak (in this case,
Ω95 representing the width of the diffraction peak including 95% of the peak intensity
). From Table 1,
It is well evident that the optimal texture is formed by a 100 Å Ti underlayer. Electromigration data is also improved with a 100 Å thick titanium underlayer.

FIGS. 9 and 10 show that x 、 Ti / 100ÅTiN / 2300ÅAl (0.5%
4 is a graph showing a failure test performed on a metal stack of Cu) / 50 ／ Ti / 400ÅTiN. x is the thickness of the titanium underlayer.

FIG. 9 shows the results at 250 ° C. and 1.35 MA / c.
7 is a graph showing conventional electromigration test data at m ² . FIG. 9 shows the failure occurrence time (unit: hours) until half of the interconnection metallurgy causes a failure on the left y-axis.
And the standard deviation of the lognormal distribution on the right y-axis,
The thickness x of the titanium lower layer is shown on the x-axis. Data is thickness 1
It shows that the failure time is greatly improved when using the lower layer of 00 Angstroms. Specifically, the failure time of a film having a thickness of 30, 40, and 50 angstroms is about 4 hours, a film having a thickness of 200 angstroms is about 3 hours, and a failure time of about 7 hours in a lower layer of 100 angstroms. In contrast to time. The standard deviation of the lognormal distribution was about the same (≒ 0.35 to 0.4) for all lower layers.

FIG. 10 is a graph showing the estimated lifetime from the isothermal wafer level electromigration test. FIG. 10 shows the thickness of the lower layer on the x-axis and the fault occurrence time (E13 seconds) on the y-axis for various line widths. When the lower layer having a thickness of 100 Å is used, the fault occurrence time is shown. It shows improvement. This improvement becomes more pronounced as the line width decreases, especially when it is less than about 0.33 microns.

Referring now to FIG. 2, FIG. 2 shows a planar insulator 8 and contact studs 10 and a Group IVA metal layer 13 sputter deposited thereon. Layer 13
Adheres by the following process. After forming the device contact metallization 10, the semiconductor wafer 6 is loaded into a low pressure pumped sputtering apparatus. Next, in-situ sputter cleaning is performed to remove the oxide from the contact metal 10 formed on the wafer at this time. The sputter cleaning is generally a gentle sputter cleaning performed, for example, in a high pressure argon atmosphere at low power (about 1000 watts) for about 5 minutes.

After sputter cleaning, a first layer 13 of metallization is then deposited. This first level metallization 13 is a Group IVA metal, preferably titanium deposited on the device contact metallization 10 of the wafer during blanket formation. This layer 13 is preferably deposited at low power in a high pressure, high purity argon plasma from an ultra high purity titanium target. Titanium is generally sputtered at a temperature of about 150 ° C to about 450 ° C. The wafer is typically at a temperature from room temperature up to about 300 ° C. during the sputtering process. Titanium is deposited to a thickness of about 90 angstroms to about 110 angstroms, and most preferably to about 100 angstroms.

Referring now to FIG. 3, after depositing layer 13, titanium nitride layer 14 is formed by sputter depositing titanium nitride to the desired thickness. Titanium nitride layer 14
Can be formed in the same chamber used to deposit the titanium layer 13 or in a different device.

Referring to FIG. 4, after depositing layer 14,
Next, an interconnect metallization layer 15 is blanket deposited. Interconnect metallization 15 is aluminum or an aluminum alloy, preferably aluminum-0.5 weight percent copper. Aluminum copper is deposited from an ultra-high purity pre-alloy target, typically aluminum-0.5 weight percent copper, in a high purity argon plasma using a DC magnetron at a high power with a deposition rate of about 1 micron per minute. .

Next, over the aluminum copper interconnect metallization 15, about 50 Å to about 250 Å of a Group IVA metal, preferably titanium, is applied to layer 1 in the same manner as previously described metal layer 13.
Attached as 8. The deposition and composition of the layer 18
Can be performed in the same manner as described above. From FIG. 5, the metal layer 18
A suitable capping layer 19 is blanket deposited thereon to complete the interconnect metallization at this level. The capping layer is preferably titanium nitride,
It can be attached in the same manner as the titanium nitride layer 14. The purpose of this layer is to limit the amount of light reflection during subsequent photoresist steps and to act as a protective layer against corrosion during subsequent processing. Thus, any layer that also satisfies the requirement of reducing the amount of light reflection and that provides protective anode capping during subsequent processing can be used for this layer.

Referring now to FIGS. 6 and 7, a photoresist 20 is applied over the metallization 19 to pattern the blanket interconnect metallization. Any number of different photoresist techniques can be used. Although a single layer resist is shown, it should be understood that a multilayer photoresist can be used if desired. The photoresist can be defined and developed by well-known lithographic means to form a lithographic mask for performing a reactive ion etch of the underlying blanket metal layer later. Such means are well known to those skilled in the art and need not be disclosed in further detail here.

Referring now to FIG. 8, the metallurgy is then reactive ion etched in a multi-step sequence. The first step is to break through the oxide present on the top of the metallization. Next, most of the metal is removed by reactive ion etching.
Next, an over-etch is performed so that all of the metal from the previous step is removed by etching.

Reactive ion etching is generally performed under low pressure in a single wafer tool. In general, the combination of plasma composition, pressure, power and time for performing the above-described etching in a step-by-step process is well known to those skilled in the art and need not be described in detail here.

The remaining resist 20 can be removed by well-known techniques, such as placing the wafer in an oxygen plasma.

After removing the remaining layer resist 20,
The grain size of the textured aluminum layer is then reduced by placing the wafer in an oven and annealing the metallization stack in a forming gas or an inert gas such as argon at about 400-450 ° C. for about 30-45 minutes. grown, by reacting those layers titanium layer and an aluminum layer are in contact with each other if adjoining, thereby forming a TiAl _3.

According to a preferred embodiment of the present invention, to achieve optimal electromigration performance, at least the titanium layer, and if a titanium nitride layer is used, the titanium nitride layer is coherent by collimation or "long throw". Adheres to The structure created by collimating or long throw deposition on the titanium layer, and on the titanium nitride layer, if present, provides a significantly improved electrical performance as compared to those deposited using non-collimated deposition techniques. Shows mobility performance. Exemplary devices suitable for performing the collimating deposition technique are described in US Patent Application No. 5,580,823 to Hegde et al. And US Patent Application No. 5,580,823, the disclosure of which is incorporated by reference. No. 5,584,973. Within a typical collimator, there is a baffle or parallel plate so that sputtered material out of focus from the target does not reach the wafer, but instead deposits on the baffle.

FIG. 13 shows that a typical target to substrate distance in a PVD non-collimated sputter chamber is about 5 cm.

FIG. 14 shows a typical geometry of a PVD sputter chamber with a collimator. The distance between the target and the substrate is about 10 cm, the distance between the target and the collimator is about 5 cm, and the height of the collimator is about 2 cm. The collimator is about 3 cm away from the substrate.

In the long throw technique, the distance between the sputter target and the wafer is about 2-3 times longer than in the non-collimated deposition method, and is typically about 20 centimeters in length. In addition, it is desirable to include a shutter in the sputtering apparatus to deposit a high purity titanium film. This is especially important for the top titanium layer, which needs to be of the highest purity to maximize electromigration performance.

A typical long throw deposition apparatus is Ul
Commercially available under the trademark vac.

The following electromigration tests were performed to compare the non-collimated deposition technique with the preferred deposition technique of the present invention. Specifically, 100ÅTi / 100ÅTiN / 23
00 A1 (0.5% Cu) / 50 Ti / 400 T
An iN metal film stack was used. A first group of wafers was placed in an Endura PVD metal sputter apparatus so that deposition of the Ti / TiN film was performed in a non-collimating chamber. A second group of wafers was placed in an Ulvac metal sputter. Ul
The Ti and TiN films in the vac tool were performed in a long throw chamber. However, the distance between the sputtering target and the wafer is Endur.
a 3 times longer than in non-collimated chambers. Further, the Ti / TiN chamber in the Ulvac tool has a shutter. If this shutter is used, the nitride accumulated on the target by the previous wafer is removed, so that a much higher purity Ti film can be deposited. Long throw chamber and collimated
In the chamber, titanium deposits on the side wall or collimator, respectively. The deposited titanium acts as a pump and reacts with contaminants such as oxygen, thereby, for example,
Oxygen is incorporated into the newly deposited titanium. End
For ura Ti / TiN, the target is the previous Ti
It was nitrified by N deposition.

Three wafers from each lot are 0.81 m
A and tested for electromigration at 250 ° C. The current density in the metal wire was about 0.9 MA / cm ² . The test was performed on the structure shown in FIG. In FIG. 11, number 30 represents the underlying metal level, and number 31 represents a via between metal level 30 and upper metal level 32.
Upper metal level 32 includes the metal film stack disclosed above. The diameter of via 31 is about 0.30 microns and the line width of metal level 32 is about 0.30 microns. The half failure occurrence time (t50), the shape parameter of the lognormal distribution, and sigma (σ) are shown below. Endura: t50 = 8.1 hours, σ = 0.52 Ulvac: t50 = 17.9 hours, σ = 0.1

FIG. 12 is a graph showing fault times, showing that using the long throw technique results in improved results compared to the non-collimated technique.

As is evident from the above, the samples placed in the Ulvac tool have a lifetime that is twice as long as the samples placed in the Endura tool, and show a much tighter distribution of faults.

In summary, the following matters are disclosed regarding the configuration of the present invention.

(1) About 90 angstroms to about 1
A metallization structure comprising a lower layer of a Group IVA metal having a thickness of 10 Angstroms and a layer of at least one component selected from the group consisting of aluminum and aluminum alloys in electrical contact with said lower layer. (2) The metallization structure according to (1), wherein the group IVA metal is titanium. (3) The aluminum alloy comprises aluminum, copper,
The structure according to (1), wherein the structure is an alloy with at least one component selected from the group consisting of magnesium, silicon, palladium, and lanthanides. (4) The structure of (3), wherein the alloy comprises up to about 3 weight percent of the component. (5) The structure according to (1), wherein the layer is a <111> textured film. (6) the layer has an intensity versus half width on chi-scan of 1
Less than 5 degrees and the volume fraction of random crystal grains is 20
The structure of claim 5, which is a highly textured film that is less than percent. (7) the layer has a thickness of about 2,000 Å to about 6;
The structure of claim 1, having a thickness of 000 Angstroms. (8) the layer has a thickness of about 2,000 Å to about 2;
The structure of claim 1, having a thickness of 500 angstroms. (9) The structure according to (1), further including a titanium nitride layer disposed between the lower layer and the layer. (10) The structure according to (9), wherein said titanium nitride layer has a thickness of about 50 Å to about 500 Å. (11) The structure according to (9), wherein said titanium nitride layer has a thickness of about 50 Å to about 150 Å. (12) The structure according to (1), further comprising a capping layer selected from the group consisting of titanium and titanium alloy, disposed on said layer of at least one component. (13) The structure according to (12), wherein the capping layer is titanium nitride or a combination of a group IVA metal layer and a titanium nitride layer. (14) The above (13), wherein the IVA group metal is titanium.
Structure described in. (15) The structure according to the above (13), wherein the titanium layer has a <0002> fiber texture. (16) The structure according to (1), further including a silicon substrate disposed below the lower layer. (17) The structure according to (9), further comprising a capping layer selected from the group consisting of titanium and a titanium alloy disposed on said layer of at least one component. (18) The structure according to (17), wherein the capping layer is titanium nitride or a combination of a group IVA metal layer and a titanium nitride layer. (19) The above (18), wherein the group IVA metal is titanium.
Structure described in.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a preferred embodiment of an interconnect metallurgy according to the present invention.

FIG. 2 is a cross-sectional view of one stage of the process of manufacturing the preferred interconnect metallurgy of the present invention step-by-step.

3 is a cross-sectional view of the process of manufacturing the preferred interconnect metallurgy of the present invention step-by-step, following the step of FIG. 2;

FIG. 4 is a cross-sectional view of a step subsequent to FIG. 3 of the process for manufacturing a preferred interconnect metallurgy step-by-step of the present invention.

FIG. 5 is a cross-sectional view of the process of manufacturing the preferred interconnect metallurgy step-by-step of the present invention following the step of FIG. 4;

FIG. 6 is a cross-sectional view of the process of manufacturing the preferred interconnect metallurgy of the present invention step-by-step, following the step of FIG. 5;

FIG. 7 is a cross-sectional view of a step subsequent to FIG. 6 of the process for manufacturing a preferred interconnect metallurgy step-by-step of the present invention.

FIG. 8 is a cross-sectional view of the process of manufacturing a preferred interconnect metallurgy step-by-step of the present invention following the step of FIG. 7;

FIG. 9 is a graph showing the failure occurrence time according to the thickness of the lower layer.

FIG. 10 is a graph showing a failure occurrence time according to a thickness of a lower layer.

FIG. 11 is a schematic illustration of a structure that has undergone processing suitable for forming the structure of the present invention.

FIG. 12 is a graph comparing the failure onset time of the long throw preferred technique with the non-collimated technique.

FIG. 13 is a schematic diagram of a PVD sputter geometry.

FIG. 14 is a schematic diagram of a PVD sputter geometry.

[Explanation of symbols]

 Reference Signs List 6 device substrate 8 insulator 10 interlayer stud connection 13 lower layer 14 titanium nitride layer 15 aluminum layer 18 titanium layer 19 titanium nitride layer 20 photoresist

 ──────────────────────────────────────────────────の Continuing on the front page (72) Takahiko Usui, 8-8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Inside the Yokohama Office of Toshiba Corporation (72) Inventor Patrick W. Dehaven United States 12603 Pokekeepsie, New York Cherry Hill Drive 203 (72) Inventor Kennis P. Rodbell, United States 12570 Pochag Leo Lane, New York 3 (72) Inventor Ronald G. Philippi United States 12590 Wappingers Falls, New York White Gates Drive Apartment 6D

Claims (19)

[Claims] An underlayer of a Group IVA metal having a thickness of about 90 Angstroms to about 110 Angstroms;
A metallization structure comprising: a layer of at least one component selected from the group consisting of aluminum and an aluminum alloy in electrical contact with the lower layer. 2. The method of claim 1, wherein said Group IVA metal is titanium.
3. The metallization structure according to claim 1. 3. The structure of claim 1, wherein said aluminum alloy is an alloy of aluminum and at least one component selected from the group consisting of copper, magnesium, silicon, palladium, and lanthanides. 4. The structure of claim 3, wherein said alloy comprises up to about 3 weight percent of said component. 5. The structure of claim 1, wherein said layer is a <111> textured film. 6. A highly textured film wherein the layer has a strength-to-half width on chi-scan of less than 15 degrees and a random grain volume fraction of less than 20 percent. Structure described in. 7. The method of claim 1, wherein said layer has a thickness of about 2000 Angstroms to about 6000 Angstroms.
Structure described in. 8. The method of claim 1, wherein said layer has a thickness of about 2000 Angstroms to about 2500 Angstroms.
Structure described in. 9. The structure of claim 1, further comprising a titanium nitride layer disposed between said lower layer and said layer. 10. The structure of claim 9, wherein said titanium nitride layer has a thickness of about 50 Å to about 500 Å. 11. The structure of claim 9, wherein said titanium nitride layer has a thickness of about 50 Å to about 150 Å. 12. The structure of claim 1, further comprising a capping layer disposed on said layer of at least one component selected from the group consisting of titanium and titanium alloys. 13. The structure of claim 12, wherein said capping layer is titanium nitride or a combination of a group IVA metal layer and a titanium nitride layer. 14. The structure of claim 13, wherein said Group IVA metal is titanium. 15. The structure according to claim 13, wherein said titanium layer has a <0002> fiber texture. 16. The structure of claim 1, further comprising a silicon substrate located below said lower layer. 17. The structure of claim 9, further comprising a capping layer disposed on said layer of at least one component, the capping layer being selected from the group consisting of titanium and titanium alloys. 18. The structure of claim 17, wherein said capping layer is titanium nitride or a combination of a group IVA metal layer and a titanium nitride layer. 19. The structure according to claim 18, wherein said Group IVA metal is titanium.