JPH10289881A - Plasma cvd device - Google Patents

Plasma cvd device

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Publication number
JPH10289881A
JPH10289881A JP11338897A JP11338897A JPH10289881A JP H10289881 A JPH10289881 A JP H10289881A JP 11338897 A JP11338897 A JP 11338897A JP 11338897 A JP11338897 A JP 11338897A JP H10289881 A JPH10289881 A JP H10289881A
Authority
JP
Japan
Prior art keywords
plasma
peripheral
central portion
peripheral portion
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11338897A
Other languages
Japanese (ja)
Inventor
Yuji Urano
裕司 浦野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP11338897A priority Critical patent/JPH10289881A/en
Publication of JPH10289881A publication Critical patent/JPH10289881A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To enlarge a region where plasma is uniformized in a plasma CVD device. SOLUTION: There is provided a plasma CVD device wherein high frequency power is supplied between upper and lower electrodes 23 and 21 to generate a plasma for treating a substrate. In this device, the upper electrode 23 is divided into a central portion 24 and a peripheral edge portion 25. At least one of the central portion 24 and the peripheral edge portion 25 is arranged vertically movable to control the distance between the upper and lower electrodes at the central portion 24 and the peripheral edge portion 25, thereby enlarging the region where plasma is uniformized.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は相対峙する電極間に
高周波電力を印加してプラズマを発生させ、そのプラズ
マを利用して半導体素子の製造を行うプラズマCVD装
置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma CVD apparatus for generating a plasma by applying high-frequency power between electrodes facing each other, and manufacturing a semiconductor device using the plasma.

【0002】[0002]

【従来の技術】半導体製造装置の1つとしてプラズマC
VD装置がある。該プラズマCVD装置は密閉した空間
内に相対峙する電極を有し、被処理基板を一方の電極に
保持させ、前記密閉した空間に反応ガスを供給し、前記
電極間に高周波電力を印加しプラズマを発生させ、前記
被処理基板に薄膜を生成し、或は薄膜のエッチングを行
うものである。
2. Description of the Related Art Plasma C is one of the semiconductor manufacturing apparatuses.
There is a VD device. The plasma CVD apparatus has electrodes facing each other in a closed space, a substrate to be processed is held on one of the electrodes, a reaction gas is supplied to the closed space, and high-frequency power is applied between the electrodes to generate a plasma. To generate a thin film on the substrate to be processed or to etch the thin film.

【0003】図4に於いて、従来のプラズマCVD装置
について説明する。
Referring to FIG. 4, a conventional plasma CVD apparatus will be described.

【0004】図示しない真空容器で画成される気密な反
応室1の下部には平盤状の下部電極2が設けられ、前記
反応室1上部には前記下部電極2に対峙する上部電極3
が絶縁体4を介して設けられ、該上部電極3の下方の空
間を囲繞する様に側壁5が設けられている。前記上部電
極3には前記反応室1の外部に設けられた高周波電源6
が整合器7を介して接続され、前記下部電極2及び側壁
5は接地されている。
[0004] A flat disk-shaped lower electrode 2 is provided at a lower portion of an airtight reaction chamber 1 defined by a vacuum vessel (not shown), and an upper electrode 3 facing the lower electrode 2 is provided above the reaction chamber 1.
Are provided via an insulator 4, and a side wall 5 is provided so as to surround a space below the upper electrode 3. The upper electrode 3 has a high-frequency power source 6 provided outside the reaction chamber 1.
Are connected via a matching unit 7, and the lower electrode 2 and the side wall 5 are grounded.

【0005】前記反応室1を図示しない真空ポンプで排
気し、減圧状態の前記反応室1に反応ガスを導入し所定
の圧力に維持し、前記上部電極3に前記高周波電源6が
出力する高周波電力を前記整合器7を介して供給し、前
記反応室1内にプラズマを発生させ、該プラズマによっ
て前記反応ガス中のガス分子を分解して、分解した分
子、イオンにより被処理基板8表面上に薄膜を形成し、
或はエッチングを行う。
The reaction chamber 1 is evacuated by a vacuum pump (not shown), a reaction gas is introduced into the reaction chamber 1 in a reduced pressure state and maintained at a predetermined pressure, and a high-frequency power output from the high-frequency power source 6 to the upper electrode 3 Is supplied through the matching device 7 to generate plasma in the reaction chamber 1, and the gas molecules in the reaction gas are decomposed by the plasma, and the decomposed molecules and ions are applied to the surface of the substrate 8 to be processed. Forming a thin film,
Alternatively, etching is performed.

【0006】図5で示すLCD用ガラス基板9を成膜処
理した場合の様に、前記下部電極2の中央部分10上方
の前記反応室1の中央域11ではプラズマが均一である
のに対し、前記下部電極2の周縁部分12上方の前記反
応室1の外周域13ではプラズマが不均一となり、プラ
ズマが均一となる前記中央部分10の面積が前記下部電
極2全体の面積に比較して小さくなる。その結果、反応
ガスの種類、流量、圧力、温度、高周波電力等のプロセ
ス条件の相違によって、図6で示す成膜処理されたガラ
ス基板の様に、ガラス基板の周縁部分14の成膜速度が
ガラス基板の中央部分15より速い為前記周縁部分14
の成膜が前記中央部分15より厚くなったり、逆に図7
で示す様に、前記周縁部分14の成膜速度が前記中央部
分15より遅い為前記周縁部分14の成膜が前記中央部
分15より薄くなることがあり、前記中央部分15と前
記周縁部分14では成膜速度、膜質に差異が生じる。
As shown in FIG. 5, the plasma is uniform in the central region 11 of the reaction chamber 1 above the central portion 10 of the lower electrode 2 as in the case where the glass substrate 9 for LCD is formed into a film. In the outer peripheral region 13 of the reaction chamber 1 above the peripheral portion 12 of the lower electrode 2, the plasma becomes non-uniform, and the area of the central portion 10 where the plasma is uniform becomes smaller than the area of the entire lower electrode 2. . As a result, the film forming speed of the peripheral portion 14 of the glass substrate is increased depending on the process conditions such as the type, flow rate, pressure, temperature, and high frequency power of the reaction gas, as shown in FIG. The peripheral portion 14 is faster than the central portion 15 of the glass substrate.
7 becomes thicker than the central portion 15, or conversely, FIG.
As shown in the figure, since the film forming speed of the peripheral portion 14 is lower than that of the central portion 15, the film forming of the peripheral portion 14 may be thinner than that of the central portion 15. In the case of the central portion 15 and the peripheral portion 14, Differences occur in the film formation speed and film quality.

【0007】[0007]

【発明が解決しようとする課題】上記した従来のプラズ
マCVD装置では、電極の周縁部分ではプラズマが不均
一となり、プラズマが均一となる領域が前記下部電極2
全体の面積に比較して小さくなる為、前記下部電極2の
面積を有効に利用できず、プラズマ処理装置自体のコン
パクト化が図れない。又、高周波電力の有効利用が図れ
ない等の問題があった。
In the above-mentioned conventional plasma CVD apparatus, the plasma becomes non-uniform at the peripheral portion of the electrode, and the region where the plasma becomes uniform is the lower electrode 2.
Since the area is smaller than the entire area, the area of the lower electrode 2 cannot be effectively used, and the plasma processing apparatus itself cannot be made compact. In addition, there is a problem that the high frequency power cannot be effectively used.

【0008】本発明は斯かる実情に鑑み、プラズマが均
一に発生する領域を拡大し、プラズマ処理装置のコンパ
クト化を可能とし、又、高周波電力の有効利用を図ろう
とするものである。
The present invention has been made in view of the above circumstances, and has an object to expand a region where plasma is uniformly generated, to make a plasma processing apparatus compact, and to make effective use of high-frequency power.

【0009】[0009]

【課題を解決するための手段】本発明は、上下の電極間
に高周波電力を供給してプラズマを発生させ、被処理基
板を処理するプラズマCVD装置に於いて、上部電極を
中央部と周縁部に分割し、前記中央部と前記周縁部の少
なくとも一方を上下移動可能に設けたプラズマCVD装
置に係り、又、前記周縁部を複数に分割し、分割した部
分を独立して上下移動可能としたプラズマCVD装置に
係り、前記中央部と周縁部の上下の電極の間隔を調整
し、プラズマが均一に発生する領域を拡大する。
SUMMARY OF THE INVENTION The present invention relates to a plasma CVD apparatus for processing a substrate to be processed by supplying high frequency power between upper and lower electrodes to generate a plasma. The present invention relates to a plasma CVD apparatus in which at least one of the central portion and the peripheral edge portion is provided so as to be vertically movable. Also, the peripheral portion is divided into a plurality of portions, and the divided portions are independently movable vertically. According to the plasma CVD apparatus, the distance between the upper and lower electrodes at the central portion and the peripheral portion is adjusted to enlarge a region where plasma is uniformly generated.

【0010】[0010]

【発明の実施の形態】以下、図1〜図3に於いて本発明
の実施の形態を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

【0011】図示しない真空容器で画成される気密な反
応室20の下部には接地された平盤状の下部電極21が
設けられ、該下部電極21には長方形の被処理基板22
が載置される。
A flat plate-like lower electrode 21 is provided below the airtight reaction chamber 20 defined by a vacuum vessel (not shown). The lower electrode 21 has a rectangular substrate 22 to be processed.
Is placed.

【0012】前記反応室20上部には上部電極23が設
けられ、該上部電極23は中央部24と周縁部25に分
割され、前記中央部24と周縁部25とは電気的には一
体である様、電気接続されている。又、前記周縁部25
は前記中央部24の外周4辺に沿って設けられる直方体
形状の第1周縁部25a、第2周縁部25b、第3周縁
部25c、第4周縁部25dと前記中央部24の外周4
隅に設けられる平面がL字形状の第5周縁部25e、第
6周縁部25f、第7周縁部25g、第8周縁部25h
との8部分に分割され、前記中央部24及び前記各周縁
部25a,25b,25c,25d,25e,25f,
25g,25hはそれぞれ独立して上下移動可能となっ
ている。
An upper electrode 23 is provided above the reaction chamber 20, and the upper electrode 23 is divided into a central portion 24 and a peripheral portion 25, and the central portion 24 and the peripheral portion 25 are electrically integrated. Like, they are electrically connected. Also, the peripheral portion 25
Is a rectangular parallelepiped first peripheral edge 25a, a second peripheral edge 25b, a third peripheral edge 25c, and a fourth peripheral edge 25d provided along four outer peripheral sides of the central portion 24 and the outer peripheral portion 4 of the central portion 24.
Fifth peripheral portion 25e, sixth peripheral portion 25f, seventh peripheral portion 25g, and eighth peripheral portion 25h each having an L-shaped plane provided at the corner.
And the central portion 24 and the peripheral portions 25a, 25b, 25c, 25d, 25e, 25f,
25g and 25h can be independently moved up and down.

【0013】前記中央部24の上面には中央部用絶縁体
26が固着され、又、前記各周縁部25a,25b,2
5c,25d,25e,25f,25g,25hの上面
にはそれぞれ別々に第1周縁部用上面絶縁体27a、第
2周縁部用上面絶縁体(図示せず)、第3周縁部用上面
絶縁体27c、第4周縁部用上面絶縁体(図示せず)、
第5周縁部用上面絶縁体(図示せず)、第6周縁部用上
面絶縁体(図示せず)、第7周縁部用上面絶縁体(図示
せず)、第8周縁部用上面絶縁体(図示せず)が固着さ
れ、更に前記各周縁部25a,25b,25c,25
d,25e,25f,25g,25hの外周側面にはそ
れぞれ別々に第1周縁部用側面絶縁体28a、第2周縁
部用側面絶縁体(図示せず)、第3周縁部用側面絶縁体
28c、第4周縁部用側面絶縁体(図示せず)、第5周
縁部用側面絶縁体(図示せず)、第6周縁部用側面絶縁
体(図示せず)、第7周縁部用側面絶縁体(図示せ
ず)、第8周縁部用側面絶縁体(図示せず)が固着され
ている。前記中央部用絶縁体26、前記各周縁部用上面
絶縁体27、前記各周縁部用側面絶縁体28はそれぞれ
対応する前記中央部24、前記各周縁部25a,25
b,25c,25d,25e,25f,25g,25h
と一体となって上下移動可能となっている。
A central insulator 26 is fixed to the upper surface of the central portion 24, and the peripheral portions 25a, 25b, 2
On the upper surfaces of 5c, 25d, 25e, 25f, 25g, and 25h, the upper surface insulator 27a for the first peripheral portion, the upper surface insulator for the second peripheral portion (not shown), and the upper surface insulator for the third peripheral portion are separately provided. 27c, fourth insulator upper surface insulator (not shown),
Top insulator for fifth peripheral portion (not shown), top insulator for sixth peripheral portion (not shown), top insulator for seventh peripheral portion (not shown), top insulator for eighth peripheral portion (Not shown), and the peripheral portions 25a, 25b, 25c, 25
d, 25e, 25f, 25g, and 25h are separately provided on the outer peripheral side surfaces of the first peripheral side surface insulator 28a, the second peripheral side surface insulator (not shown), and the third peripheral side surface insulator 28c, respectively. 4th peripheral side insulator (not shown), 5th peripheral side insulator (not shown), 6th peripheral side insulator (not shown), 7th peripheral side insulation A body (not shown) and an eighth peripheral side surface insulator (not shown) are fixed. The insulator 26 for the central portion, the upper surface insulator 27 for each peripheral portion, and the side insulator 28 for each peripheral portion correspond to the central portion 24, the peripheral portions 25a, 25, respectively.
b, 25c, 25d, 25e, 25f, 25g, 25h
It can be moved up and down as one unit.

【0014】前記上部電極23の下方の空間を囲繞する
様に側壁29が設けられ、前記上部電極23と前記側壁
29は前記周縁部用側面絶縁体28によって絶縁され、
前記上部電極23には前記反応室20の外部に設けられ
た高周波電源30が整合器31を介して接続され、前記
下部電極21及び側壁29は接地されている。
A side wall 29 is provided so as to surround a space below the upper electrode 23, and the upper electrode 23 and the side wall 29 are insulated by the peripheral side insulator 28,
A high-frequency power supply 30 provided outside the reaction chamber 20 is connected to the upper electrode 23 via a matching unit 31, and the lower electrode 21 and the side wall 29 are grounded.

【0015】以下作動を説明する。The operation will be described below.

【0016】プラズマを発生させる前、反応ガスの種
類、流量、圧力、温度、高周波電力等のプロセス条件及
び目的に応じて前記上部電極23の前記中央部24、前
記各周縁部25a,25b,25c,25d,25e,
25f,25g,25hを上下に移動し、各電極間をそ
れぞれ独立して設定する。
Before the plasma is generated, the central portion 24 of the upper electrode 23 and the peripheral portions 25a, 25b, 25c according to the process conditions such as the type, flow rate, pressure, temperature, and high frequency power of the reaction gas and the purpose. , 25d, 25e,
25f, 25g, and 25h are moved up and down, and each electrode is set independently.

【0017】前記反応室20を図示しない真空ポンプで
排気し、減圧状態の前記反応室20に図示しないガス導
入管から反応ガスを導入し、図示しない圧力制御装置に
よって圧力を設定する。前記上部電極23に前記高周波
電源30が出力する高周波電力を前記整合器31を介し
て供給し、前記中央部24、前記各周縁部25a,25
b,25c,25d,25e,25f,25g,25h
と前記下部電極21間にそれぞれ均一な強度の電界を発
生させ、前記反応室20内にプラズマを発生させる。該
プラズマによって前記反応ガス中のガス成分を分解して
前記被処理基板22表面上に薄膜を形成させる。
The reaction chamber 20 is evacuated by a vacuum pump (not shown), a reaction gas is introduced into the reaction chamber 20 in a reduced pressure from a gas introduction pipe (not shown), and the pressure is set by a pressure controller (not shown). The high-frequency power output from the high-frequency power supply 30 is supplied to the upper electrode 23 via the matching unit 31, and the central part 24, the peripheral parts 25a and 25
b, 25c, 25d, 25e, 25f, 25g, 25h
And an electric field having a uniform intensity between the lower electrode 21 and the lower electrode 21 to generate plasma in the reaction chamber 20. The plasma decomposes gas components in the reaction gas to form a thin film on the surface of the substrate 22 to be processed.

【0018】均一な強度の電界を発生させた前記下部電
極21と前記上部電極23の前記中央部24、前記各周
縁部25a,25b,25c,25d,25e,25
f,25g,25hで挟まれた中央域32ではプラズマ
は均一となり、それ以外の外周域33ではプラズマは不
均一となる。従って、図3に示す様にプラズマが均一と
なる前記中央域32の領域が拡大し、プラズマが不均一
になる前記外周域33の領域が減少し、前記下部電極2
1の面積を拡大せずに成膜処理可能な被処理基板22の
サイズを拡大できる。
The central portion 24 of the lower electrode 21 and the upper electrode 23 which generate an electric field of uniform intensity, and the respective peripheral portions 25a, 25b, 25c, 25d, 25e, 25
The plasma is uniform in the central region 32 sandwiched between f, 25g, and 25h, and non-uniform in the other peripheral region 33. Therefore, as shown in FIG. 3, the area of the central area 32 where the plasma becomes uniform is enlarged, the area of the outer peripheral area 33 where the plasma becomes non-uniform is reduced, and the lower electrode 2 is formed.
The size of the target substrate 22 capable of forming a film can be increased without increasing the area of the substrate 1.

【0019】尚、上記実施の形態に於いては、上部電極
を中央部と周縁部とに分割し、更に周縁部を8分割した
が、中央部と周縁部とにだけ分割し、周縁部は一体とし
中央部と周縁部が独立して上下移動可能としてもよい。
この場合、前記中央部と下部電極、前記周縁部と下部電
極間に発生する各電界の強度を概略調整し、プラズマが
均一となる領域を拡大することができる。又、上記実施
の形態に於いては、上部電極の周縁部を8分割とした
が、7分割以下又は9分割以上としてもよい。
In the above embodiment, the upper electrode is divided into a central portion and a peripheral portion, and the peripheral portion is further divided into eight portions. However, the upper electrode is divided only into the central portion and the peripheral portion. The central part and the peripheral part may be independently movable vertically.
In this case, the intensity of each electric field generated between the central portion and the lower electrode and between the peripheral portion and the lower electrode can be roughly adjusted, and the region where plasma becomes uniform can be enlarged. Further, in the above embodiment, the peripheral portion of the upper electrode is divided into eight, but may be divided into seven or less or nine or more.

【0020】[0020]

【発明の効果】以上述べた如く本発明によれば、反応室
の中央部と周縁部の上下の電極間隔を独立して調整でき
る為、プラズマが均一となる領域を拡大することが可能
となり、有効に成膜処理できる領域が拡大し、下部電極
の面積を拡大せずに成膜処理可能な被処理基板のサイズ
の拡大が図れる。又、プラズマが不均一となる領域を減
少することができる為、プラズマ処理装置自体のコンパ
クト化が可能となる。更に、プラズマが均一となる領域
が拡大することにより、高周波電力の有効利用が図れ、
省エネルギ化が可能となる等、種々の優れた効果を発揮
する。
As described above, according to the present invention, the distance between the upper and lower electrodes at the center and the periphery of the reaction chamber can be adjusted independently, so that the region where the plasma becomes uniform can be expanded. The area where the film can be effectively formed can be expanded, and the size of the substrate to be processed can be increased without increasing the area of the lower electrode. Further, since the region where the plasma becomes non-uniform can be reduced, the plasma processing apparatus itself can be made compact. Furthermore, by expanding the region where the plasma becomes uniform, effective use of high-frequency power can be achieved,
It exhibits various excellent effects such as energy saving.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態を示す概略説明断面図であ
る。
FIG. 1 is a schematic explanatory sectional view showing an embodiment of the present invention.

【図2】該実施の形態に係る上部電極の分割状態を示す
平面図である。
FIG. 2 is a plan view showing a divided state of an upper electrode according to the embodiment.

【図3】該実施の形態に於ける下部電極とプラズマが均
一となる領域との関係を示す平面図である。
FIG. 3 is a plan view showing a relationship between a lower electrode and a region where plasma is uniform in the embodiment.

【図4】従来例を示す概略説明図である。FIG. 4 is a schematic explanatory view showing a conventional example.

【図5】従来例に於ける下部電極とプラズマが均一とな
る領域との関係を示す平面図である。
FIG. 5 is a plan view showing a relationship between a lower electrode and a region where plasma is uniform in a conventional example.

【図6】従来の成膜処理されたガラス基板の成膜状態を
示す側面図である。
FIG. 6 is a side view showing a state of film formation on a glass substrate subjected to a conventional film formation process.

【図7】従来の成膜処理されたガラス基板の他の成膜状
態を示す側面図である。
FIG. 7 is a side view showing another film formation state of a glass substrate subjected to a conventional film formation process.

【符号の説明】[Explanation of symbols]

21 下部電極 23 上部電極 24 中央部 25 周縁部 29 側壁 30 高周波電源 31 整合器 DESCRIPTION OF SYMBOLS 21 Lower electrode 23 Upper electrode 24 Central part 25 Peripheral part 29 Side wall 30 High frequency power supply 31 Matching device

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 上下の電極間に高周波電力を供給してプ
ラズマを発生させ、被処理基板を処理するプラズマCV
D装置に於いて、上部電極を中央部と周縁部に分割し、
前記中央部と前記周縁部の少なくとも一方を上下移動可
能に設けたことを特徴とするプラズマCVD装置。
1. A plasma CV for processing a substrate to be processed by supplying high frequency power between upper and lower electrodes to generate plasma.
In the D device, the upper electrode is divided into a central part and a peripheral part,
A plasma CVD apparatus, wherein at least one of the central part and the peripheral part is provided so as to be vertically movable.
【請求項2】 前記周縁部を複数に分割し、分割した部
分を独立して上下移動可能とした請求項1のプラズマC
VD装置。
2. The plasma C according to claim 1, wherein the peripheral portion is divided into a plurality of portions, and the divided portions can be independently moved up and down.
VD device.
JP11338897A 1997-04-15 1997-04-15 Plasma cvd device Pending JPH10289881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11338897A JPH10289881A (en) 1997-04-15 1997-04-15 Plasma cvd device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11338897A JPH10289881A (en) 1997-04-15 1997-04-15 Plasma cvd device

Publications (1)

Publication Number Publication Date
JPH10289881A true JPH10289881A (en) 1998-10-27

Family

ID=14611055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11338897A Pending JPH10289881A (en) 1997-04-15 1997-04-15 Plasma cvd device

Country Status (1)

Country Link
JP (1) JPH10289881A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6863020B2 (en) * 2000-01-10 2005-03-08 Tokyo Electron Limited Segmented electrode apparatus for plasma processing
US7861667B2 (en) * 2002-05-23 2011-01-04 Lam Research Corporation Multi-part electrode for a semiconductor processing plasma reactor and method of replacing a portion of a multi-part electrode
US8138444B2 (en) 2008-04-03 2012-03-20 Tes Co., Ltd. Plasma processing apparatus
TWI397100B (en) * 2005-06-13 2013-05-21 Lam Res Corp Plasma reactor and method for using the same
US20170047203A1 (en) * 2014-05-09 2017-02-16 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
WO2018074322A1 (en) * 2016-10-19 2018-04-26 東京エレクトロン株式会社 Plasma processing apparatus and method for controlling plasma processing apparatus
CN108376657A (en) * 2017-02-01 2018-08-07 应用材料公司 Adjustable extending electrode for edge uniformity control
CN111575680A (en) * 2020-06-28 2020-08-25 云谷(固安)科技有限公司 Plasma chemical vapor deposition equipment

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6863020B2 (en) * 2000-01-10 2005-03-08 Tokyo Electron Limited Segmented electrode apparatus for plasma processing
US7861667B2 (en) * 2002-05-23 2011-01-04 Lam Research Corporation Multi-part electrode for a semiconductor processing plasma reactor and method of replacing a portion of a multi-part electrode
US8573153B2 (en) 2002-05-23 2013-11-05 Lam Research Corporation Multi-part electrode for a semiconductor processing plasma reactor and method of replacing a portion of a multi-part electrode
TWI397100B (en) * 2005-06-13 2013-05-21 Lam Res Corp Plasma reactor and method for using the same
US8138444B2 (en) 2008-04-03 2012-03-20 Tes Co., Ltd. Plasma processing apparatus
US10707059B2 (en) * 2014-05-09 2020-07-07 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
US20170047203A1 (en) * 2014-05-09 2017-02-16 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
WO2018074322A1 (en) * 2016-10-19 2018-04-26 東京エレクトロン株式会社 Plasma processing apparatus and method for controlling plasma processing apparatus
KR20190057362A (en) * 2016-10-19 2019-05-28 도쿄엘렉트론가부시키가이샤 Plasma processing apparatus and control method of plasma processing apparatus
JPWO2018074322A1 (en) * 2016-10-19 2019-08-08 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing apparatus control method
US10674595B2 (en) 2016-10-19 2020-06-02 Tokyo Electron Limited Plasma processing apparatus and method for controlling plasma processing apparatus
CN108376657A (en) * 2017-02-01 2018-08-07 应用材料公司 Adjustable extending electrode for edge uniformity control
CN111575680A (en) * 2020-06-28 2020-08-25 云谷(固安)科技有限公司 Plasma chemical vapor deposition equipment

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