JPH1027962A - Manufacture of multi-layer wiring board - Google Patents

Manufacture of multi-layer wiring board

Info

Publication number
JPH1027962A
JPH1027962A JP18329296A JP18329296A JPH1027962A JP H1027962 A JPH1027962 A JP H1027962A JP 18329296 A JP18329296 A JP 18329296A JP 18329296 A JP18329296 A JP 18329296A JP H1027962 A JPH1027962 A JP H1027962A
Authority
JP
Japan
Prior art keywords
resist
conductive
wiring board
manufacturing
multilayer wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18329296A
Other languages
Japanese (ja)
Inventor
Toshio Hashimoto
敏夫 橋本
Keiji Seto
啓司 瀬戸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP18329296A priority Critical patent/JPH1027962A/en
Publication of JPH1027962A publication Critical patent/JPH1027962A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a multi-layer wiring board having more layers by printing a resist on the surface of an insulating substrate on which a conductive pattern film is formed, performing flattening on the resist, forming an window on the surface of the resist so as to expose a part of the pattern film, forming a desired pattern of conductive paste on the surface of the resist, newly printing a resist on the surface of the pattern, and performing flattening on the resist. SOLUTION: A resist 3 is printed on both surfaces of an insulating substrate 1 including a conductive pattern film 4, then the surface of the resist 3 is set, and polishing processing is performed on the resist 3 to flatten the surface of the resist 3. A window 6 is formed at a desired position of the resist 3, to expose a part of the conductive pattern film 4. Conductive paste 9 is printed on both surface of the resist 3 including the window 6 and a through hole 8, into a desired pattern. Again, the resist 3 is printed on both surfaces of the resist 3 including the conductive paste 9, then the printed resist is set, and polishing processing is performed on the resist 3 to flatten the surface of the resist 3. Thus, the resist printing process and the conductive-paste printing process are repeated alternatively, to form a multi-layer wiring board having more layers.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、多層配線板の製造
方法、特にめっき処理を不要にして絶縁性基板の表面に
導電材料及び絶縁材料を交互に積層する多層配線板の製
造方法に関する。
The present invention relates to a method for manufacturing a multilayer wiring board, and more particularly to a method for manufacturing a multilayer wiring board in which a conductive material and an insulating material are alternately laminated on the surface of an insulating substrate without plating.

【0002】[0002]

【従来の技術】各種電子機器の組立てには、回路部品を
実装する配線基板が用いられているが、電子機器の小型
化、高密度実装化等の要求に伴い、配線基板としては導
電材料及び絶縁材料を交互に積層して、導電材料からな
る配線を配線基板の厚さ方向に多層に重ねるように形成
した多層配線板が広く用いられている。
2. Description of the Related Art Wiring boards on which circuit components are mounted are used for assembling various electronic devices. However, due to demands for miniaturization and high-density mounting of electronic devices, conductive materials and wiring boards are used as wiring boards. 2. Description of the Related Art A multilayer wiring board is widely used in which insulating materials are alternately stacked so that wiring made of a conductive material is formed in multiple layers in the thickness direction of a wiring board.

【0003】従来このような多層配線板を製造するに
は、絶縁性基板に導電材料としての銅箔を張付けた後、
この銅箔をエッチングによって所望のパターンに形成
し、以後この導電パターンを絶縁材料で覆い、この絶縁
材料の所望位置に導電パターンの一部を露出する窓を開
口して、窓を通じて導電パターンに導通する導電材料を
めっき処理によって絶縁材料の表面まで延長するように
形成した、サブトラクション法が一般的に行われてい
る。
Conventionally, in order to manufacture such a multilayer wiring board, a copper foil as a conductive material is stuck on an insulating substrate,
This copper foil is formed into a desired pattern by etching, and thereafter, the conductive pattern is covered with an insulating material, and a window exposing a part of the conductive pattern is opened at a desired position of the insulating material, and the conductive pattern is conducted through the window. A subtraction method in which a conductive material to be formed is formed so as to extend to a surface of an insulating material by plating treatment is generally performed.

【0004】図3(A)乃至(G)は、従来の多層配線
板の製造方法の一例として、そのようなサブトラクショ
ン法を利用した製造方法を示すものである。以下、図面
を参照して工程順に説明する。
FIGS. 3A to 3G show a manufacturing method utilizing such a subtraction method as an example of a conventional method for manufacturing a multilayer wiring board. The steps will be described below in the order of steps with reference to the drawings.

【0005】まず、図3(A)に示すように、銅箔2を
張付けた絶縁性基板1を用いて、図3(B)に示すよう
に、導電パターンを形成したい銅箔2の表面のみにレジ
スト3を形成した後、図3(C)に示すように、エッチ
ング処理を施してレジスト3でマスクされていない銅箔
2を除去し、図3(D)に示すように、レジスト3を除
去することにより導電パターン膜4を形成する。
First, as shown in FIG. 3A, using an insulating substrate 1 on which a copper foil 2 is attached, as shown in FIG. 3B, only the surface of the copper foil 2 on which a conductive pattern is to be formed is formed. After the resist 3 is formed, the copper foil 2 not masked by the resist 3 is removed by performing an etching process as shown in FIG. 3C, and the resist 3 is removed as shown in FIG. By removing, the conductive pattern film 4 is formed.

【0006】次に、図3(E)に示すように、導電パタ
ーン膜4を含む絶縁性基板1の表面に絶縁材料5を形成
し、図3(B)及び(C)と同じようなエッチング処理
を施すことにより、図3(F)に示すように、絶縁材料
5の所望位置に窓6を開口して導電パターン膜4の一部
を露出する。続いて、電解メッキ処理を施して窓6を含
む絶縁材料5の表面に導電材料7を形成した後、図3
(B)及び(C)と同じようなエッチング処理を施すこ
とにより、図3(G)に示すように、導電材料7を所望
パターンに形成する。
Next, as shown in FIG. 3 (E), an insulating material 5 is formed on the surface of the insulating substrate 1 including the conductive pattern film 4, and etching is performed in the same manner as in FIGS. 3 (B) and 3 (C). By performing the processing, a window 6 is opened at a desired position of the insulating material 5 to expose a part of the conductive pattern film 4 as shown in FIG. Subsequently, a conductive material 7 is formed on the surface of the insulating material 5 including the window 6 by performing an electrolytic plating process.
By performing the same etching treatment as in (B) and (C), the conductive material 7 is formed in a desired pattern as shown in FIG.

【0007】これによって、導電パターン膜4を第1層
配線、導電材料7を第2層配線とする多層配線板が製造
される。同様にして、図3(E)乃至(G)の工程を繰
返すことにより、第3層以上の配線を有する多層配線板
を製造することができる。
As a result, a multilayer wiring board having the conductive pattern film 4 as the first layer wiring and the conductive material 7 as the second layer wiring is manufactured. Similarly, by repeating the steps of FIGS. 3E to 3G, it is possible to manufacture a multilayer wiring board having wiring of the third layer or more.

【0008】[0008]

【発明が解決しようとする課題】ところで、従来の多層
配線板の製造方法には、配線となる導電材料の形成をメ
ッキ処理を繰返し行う必要があるため、工程が煩雑にな
って製造コストが高くなるという問題があった。
However, in the conventional method for manufacturing a multilayer wiring board, it is necessary to repeatedly form a conductive material to be a wiring by plating, which complicates the process and increases the manufacturing cost. There was a problem of becoming.

【0009】また、従来の製造方法では、各層の表面に
凹凸があるため表面に平滑性がないので、回路部品を実
装する際に不都合が生ずる。なお、他の多層配線板の製
造方法として、ビルドアップ法が知られているが、この
製造方法によって製造された多層配線板はパターンのピ
ール強度が弱いので、信頼性がない。さらに、一般的
に、従来の製造方法では、製造時の気泡の巻き込みが防
止できないので、その気泡が信頼性を低下させるように
なる。
Further, in the conventional manufacturing method, since the surface of each layer has irregularities, the surface is not smooth, so that there is a problem in mounting circuit components. A build-up method is known as another method of manufacturing a multilayer wiring board. However, the multilayer wiring board manufactured by this manufacturing method has low reliability because the peel strength of the pattern is weak. Furthermore, in general, the conventional manufacturing method cannot prevent entrapment of air bubbles at the time of manufacturing, so that the air bubbles reduce reliability.

【0010】本発明はこのような問題点を解決すべくな
されたものであり、多層配線板を製造する場合、工程を
簡素化して製造コストを安くすることを目的とする。
The present invention has been made to solve such a problem, and an object of the present invention is to simplify a process when manufacturing a multilayer wiring board and to reduce manufacturing costs.

【0011】[0011]

【課題を解決するための手段】本発明多層配線板の製造
方法の第1のものは、絶縁性基板の表面に導電材料及び
絶縁材料を交互に積層する多層配線板の製造方法であっ
て、表面に導電パターン膜が形成された絶縁性基板の表
面にレジストを印刷し、このレジストをフラットに処理
した後導電パターンの一部を露出するように窓を形成す
る工程と、該窓を含むレジストの表面に半田付け可能な
導電性ペーストを印刷し、所望のパターンに形成する工
程と、導電性ペーストを含むレジストの表面に新たにレ
ジストを印刷し、このレジストをフラットに処理する工
程とを含むことを特徴とする。
A first method of manufacturing a multilayer wiring board according to the present invention is a method for manufacturing a multilayer wiring board in which a conductive material and an insulating material are alternately laminated on the surface of an insulating substrate, A step of printing a resist on the surface of an insulating substrate having a conductive pattern film formed on its surface, forming a window so as to expose a part of the conductive pattern after flattening the resist, and a resist including the window. A step of printing a solderable conductive paste on the surface of the resist to form a desired pattern, and a step of printing a new resist on the surface of the resist containing the conductive paste and flattening the resist. It is characterized by the following.

【0012】また、本発明多層配線板の製造方法の第2
のものは、第1のものにおいて絶縁性基板として表面及
び裏面に導電パターンが形成されかつ導通用孔が形成さ
れたものを用いて、絶縁性基板の両面に導電材料及び絶
縁材料を交互に積層することを特徴とする。
Further, the second aspect of the method for manufacturing a multilayer wiring board of the present invention.
The first one uses an insulating substrate in which a conductive pattern is formed on the front and back surfaces and a conduction hole is formed, and a conductive material and an insulating material are alternately laminated on both surfaces of the insulating substrate. It is characterized by doing.

【0013】本発明多層配線板の製造方法によれば、ま
ず、表面に導電パターン膜が形成された絶縁性基板の表
面にレジストを印刷し、このレジストをフラットに処理
した後導電パターン膜の一部を露出するように該窓を形
成し該窓を含むレジストの表面に半田付け可能な導電性
ペーストを印刷し、所望のパターンに形成した後、導電
性ペーストを含むレジストの表面に新たにレジストを印
刷し、このレジストをフラットに処理し、以後、レジス
トを印刷する工程と、導電性ペーストを印刷する工程と
を交互に繰返すことにより、より多層の配線が形成され
た多層配線板の製造が可能となる。また、表面及び裏面
に導電パターンが形成されかつ導通用孔が形成された絶
縁性基板を用いた場合は、両面に多層配線を形成するこ
とが可能となる。これにより、多層配線板を製造する場
合、工程を簡素化して製造コストを安くすることができ
る。
According to the method of manufacturing a multilayer wiring board of the present invention, first, a resist is printed on the surface of an insulating substrate having a conductive pattern film formed on the surface, and the resist is flattened. After forming the window so as to expose the portion and printing a solderable conductive paste on the surface of the resist including the window, forming a desired pattern, a new resist is formed on the surface of the resist including the conductive paste. The resist is flattened, and thereafter, the step of printing the resist and the step of printing the conductive paste are alternately repeated, thereby manufacturing a multilayer wiring board on which more multilayer wiring is formed. It becomes possible. In addition, when an insulating substrate having a conductive pattern formed on the front surface and the back surface and a conduction hole is used, a multilayer wiring can be formed on both surfaces. Thereby, when manufacturing a multilayer wiring board, the process can be simplified and the manufacturing cost can be reduced.

【0014】[0014]

【発明の実施の形態】以下、本発明を図示実施の形態に
従って詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

【0015】図1(A)乃至(D)及び図2(E)乃至
(G)は本発明多層配線板の製造方法の実施の形態を工
程順に示す断面図である。以下、図面を参照して、工程
順に説明する。
FIGS. 1A to 1D and 2E to 2G are cross-sectional views showing an embodiment of a method for manufacturing a multilayer wiring board according to the present invention in the order of steps. Hereinafter, description will be made in the order of steps with reference to the drawings.

【0016】まず、図1(A)に示すように、表面及び
裏面の所望位置に銅箔からからなる導電パターン膜4が
形成され、かつ導通用孔8が形成された絶縁性基板1を
用意する。導電パターン膜4は、予め絶縁性基板1の両
面に銅箔を張付けた後、銅箔の所望位置をレジストマス
クした状態でエッチング処理を施すことにより形成され
る。
First, as shown in FIG. 1A, an insulating substrate 1 having a conductive pattern film 4 made of copper foil formed at desired positions on a front surface and a back surface and having a conduction hole 8 formed therein is prepared. I do. The conductive pattern film 4 is formed by attaching copper foil on both surfaces of the insulating substrate 1 in advance and then performing an etching process in a state where a desired position of the copper foil is masked.

【0017】次に、図1(B)に示すように、導電パタ
ーン膜4を含む絶縁性基板1の両面にレジスト3を印刷
した後、このレジスト3を硬化させる。レジスト3の材
料としては、例えばエポキシ樹脂、ポリイミド樹脂、P
PO樹脂などを用いて、これら各樹脂内には例えば耐熱
特性、高周波特性などを向上させる働きのある物質を添
加したものを用いるようにする。また、レジスト3の材
料としては、硬化させるとその特性により表面が粗化す
るものを用いるようにする。これにより、層間の接続の
信頼性を向上することができるようになる。
Next, as shown in FIG. 1B, after a resist 3 is printed on both surfaces of the insulating substrate 1 including the conductive pattern film 4, the resist 3 is cured. As a material of the resist 3, for example, epoxy resin, polyimide resin, P
Using a PO resin or the like, a resin added with a substance having a function of improving, for example, heat resistance and high frequency characteristics is used in each of these resins. As the material of the resist 3, a material whose surface is roughened by its properties when cured is used. Thereby, the reliability of the connection between the layers can be improved.

【0018】続いて、図1(C)に示すように、絶縁性
基板1に対してバフ研磨処理を施して、レジスト3の印
刷面となる表面をフラットにする。
Subsequently, as shown in FIG. 1 (C), the insulating substrate 1 is subjected to a buffing treatment to flatten the surface of the resist 3 to be printed.

【0019】次に、図1(D)に示すように、レジスト
3の所望位置に窓6を開口して導電パターン膜4の一部
を露出する。
Next, as shown in FIG. 1D, a window 6 is opened at a desired position of the resist 3 to expose a part of the conductive pattern film 4.

【0020】続いて、図2(E)に示すように、窓6を
含むレジスト3の両面及び導通用孔8に例えば銅ペース
トのような半田付け可能な導電性ペースト9を印刷して
所望のパターンに形成する。これには、予め全面に導電
性ペースト9を印刷した後不所望部分を除去するか、あ
るいは予め不所望部分にマスクを形成した状態で導電性
ペースト9を印刷することにより、配線となる所望のパ
ターンを形成することができる。このとき同時に導通用
孔8にも導電性ペースト9が充填されるので、スルーホ
ール配線が形成され、そのため、絶縁性基板1の表面側
の導電性ペースト9と裏面側の導電性ペースト9とがそ
のスルーホール配線を通じて導通されるようになる。ま
た、導電性ペースト9として樹脂硬化時に気泡が抜ける
ような樹脂を用いるようにすれば、特に窓6に導電性ペ
ースト9を印刷するときに、気泡の巻き込みによる接続
信頼性の低下を防止することができる。
Subsequently, as shown in FIG. 2E, a solderable conductive paste 9 such as a copper paste is printed on both surfaces of the resist 3 including the windows 6 and the conduction holes 8 by printing the desired paste. Form into a pattern. This is done by printing the conductive paste 9 on the entire surface in advance and then removing the undesired portions, or by printing the conductive paste 9 in a state where a mask is formed on the undesired portions in advance to obtain the desired wiring to be formed. A pattern can be formed. At this time, the conductive paste 9 is also filled into the conduction holes 8 at the same time, so that a through-hole wiring is formed. Therefore, the conductive paste 9 on the front side of the insulating substrate 1 and the conductive paste 9 on the back side are separated. It becomes conductive through the through hole wiring. In addition, if a resin is used as the conductive paste 9 that allows bubbles to escape when the resin is cured, it is possible to prevent a decrease in connection reliability due to the inclusion of bubbles, particularly when printing the conductive paste 9 on the window 6. Can be.

【0021】次に、図2(F)に示すように、導電性ペ
ースト9を含むレジスト3の両面に再びレジスト3を印
刷した後、このレジスト3を硬化させる。このレジスト
3の材料としては、図1(B)の工程で用いたのと同様
な材料を用いるようにすると良い。
Next, as shown in FIG. 2F, after the resist 3 is printed again on both sides of the resist 3 including the conductive paste 9, the resist 3 is cured. As the material of the resist 3, it is preferable to use the same material as that used in the step of FIG.

【0022】続いて、図2(G)に示すように、再び絶
縁性基板1に対してバフ研磨処理を施して、表面をフラ
ットにする。以上によって、絶縁材料であるレジスト3
及び導電材料である半田付け可能な導電性ペースト9を
ともに印刷法によって形成した多層配線板を製造するこ
とができる。このようにして得られた多層配線板の半田
付け可能な導電性ペースト9に対して回路部品を半田付
けすることにより、通常の多層配線板と同様に回路部品
の実装を行うことができる。
Subsequently, as shown in FIG. 2 (G), the insulating substrate 1 is again subjected to a buff polishing process to flatten the surface. As described above, the resist 3 which is an insulating material
In addition, it is possible to manufacture a multilayer wiring board in which the solderable conductive paste 9 which is a conductive material is formed by a printing method. By soldering the circuit component to the solderable conductive paste 9 of the multilayer wiring board thus obtained, the circuit component can be mounted in the same manner as a normal multilayer wiring board.

【0023】必要に応じて、図2(E)乃至図2(G)
の工程を繰返すことにより、4層以上の配線を有する多
層配線板を製造することも可能である。
If necessary, FIGS. 2E to 2G
By repeating the above steps, a multilayer wiring board having four or more layers of wiring can be manufactured.

【0024】このような本発明多層配線板の製造方法に
よれば、メッキ処理を不要にして配線となる導電材料だ
けでなく絶縁材料をともに印刷によって形成するので、
多層配線板を製造する場合、工程を簡素化して製造コス
トを安くすることができる。すなわち、具体的には次の
ような効果が得られる。
According to the method for manufacturing a multilayer wiring board of the present invention, not only a conductive material to be a wiring but also an insulating material is formed by printing without the need for plating treatment.
When manufacturing a multilayer wiring board, the process can be simplified and the manufacturing cost can be reduced. That is, the following effects are specifically obtained.

【0025】1.汎用の印刷機、研磨機などを用いて製
造できるので、特殊の設備は必要ないため、設備投資が
最小限で済む。
1. Since it can be manufactured using a general-purpose printing machine, polishing machine, or the like, no special equipment is required, so that capital investment can be minimized.

【0026】2.各配線間の全ての接続は導電性ペース
トで行われるため、メッキ設備が不要になる。
2. Since all the connections between the wirings are made with a conductive paste, plating equipment is not required.

【0027】3.上記のように特殊設備を不要にしたこ
とにより、プロセスが簡素化されるので、製造コストを
安くすることができる。
3. By eliminating the need for special equipment as described above, the process is simplified, and the manufacturing cost can be reduced.

【0028】4.半田付けが可能な導電性ペーストを使
用するため、従来必要であった金メッキなどの高価な表
面処理が不要になる。
4. Since a conductive paste that can be soldered is used, expensive surface treatment such as gold plating, which was conventionally required, becomes unnecessary.

【0029】なお、多層配線板の最外層を銅ペーストの
ような導電性ペーストで覆うことにより、電磁シールド
の効果を持たせることが可能となるので、電気的特性の
改善が期待できる。
By covering the outermost layer of the multilayer wiring board with a conductive paste such as a copper paste, it is possible to provide an electromagnetic shielding effect, so that an improvement in electrical characteristics can be expected.

【0030】[0030]

【発明の効果】以上述べたように、本発明多層配線板の
製造方法によれば、メッキ処理を不要にして配線となる
導電材料及び絶縁材料をともに印刷によって形成するの
で、多層配線板を製造する場合、工程を簡素化して製造
コストを安くすることができる。
As described above, according to the method for manufacturing a multilayer wiring board of the present invention, the conductive material and the insulating material which are to be wirings are formed by printing without the need for plating treatment. In this case, the manufacturing process can be reduced by simplifying the process.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(A)乃至(D)は本発明多層配線板の製造方
法の第1の実施の形態の前半を工程順に示す断面図であ
る。
FIGS. 1A to 1D are cross-sectional views showing the first half of a first embodiment of a method for manufacturing a multilayer wiring board of the present invention in the order of steps.

【図2】(E)乃至(G)は本発明多層配線板の製造方
法の第1の実施の形態の後半を工程順に示す断面図であ
る。
FIGS. 2E to 2G are cross-sectional views showing the latter half of the first embodiment of the method for manufacturing a multilayer wiring board of the present invention in the order of steps.

【図3】(A)乃至(G)は多層配線板の製造方法の従
来例を工程順に示す断面図である。
3A to 3G are cross-sectional views showing a conventional example of a method for manufacturing a multilayer wiring board in the order of steps.

【符号の説明】[Explanation of symbols]

3…レジスト、4…導電パターン、6…窓、8…導通用
孔、9…導電性ペースト。
3 resist, 4 conductive pattern, 6 window, 8 conduction hole, 9 conductive paste.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 絶縁性基板の表面に導電材料及び絶縁材
料を交互に積層する多層配線板の製造方法であって、 表面に導電パターン膜が形成された絶縁性基板の表面に
レジストを印刷し、このレジストをフラットに処理した
後前記導電パターン膜の一部を露出するように窓を形成
する工程と、 前記窓を含むレジストの表面に半田付け可能な導電性ペ
ーストを印刷により所望のパターンに形成する工程と、 前記導電性ペーストを含むレジストの表面に新たにレジ
ストを印刷し、このレジストをフラットに処理する工程
と、 を含むことを特徴とする多層配線板の製造方法。
1. A method for manufacturing a multilayer wiring board comprising alternately laminating a conductive material and an insulating material on a surface of an insulating substrate, wherein a resist is printed on the surface of the insulating substrate having a conductive pattern film formed on the surface. Forming a window so as to expose a part of the conductive pattern film after flattening the resist, and printing a conductive paste solderable on a surface of the resist including the window to a desired pattern by printing. Forming a resist on the surface of the resist containing the conductive paste, and flattening the resist.
【請求項2】 絶縁性基板の表面に導電材料及び絶縁材
料を交互に積層する多層配線板の製造方法であって、 表面及び裏面に導電パターン膜が形成されかつ導通用孔
が形成された絶縁性基板の両面にレジストを印刷し、こ
のレジストをフラットに処理した後前記導電パターン膜
の一部を露出するように窓を形成する工程と、 前記窓を含むレジストの両面及び導通用孔に半田付け可
能な導電性ペーストを印刷し、所望のパターンに形成す
る工程と、 前記導電性ペーストを含むレジストの両面に新たにレジ
ストを印刷し、このレジストをフラットに処理する工程
と、 を含むことを特徴とする多層配線板の製造方法。
2. A method for manufacturing a multilayer wiring board, comprising alternately laminating a conductive material and an insulating material on a surface of an insulating substrate, wherein the conductive pattern film is formed on the front surface and the back surface, and the conduction hole is formed. Printing a resist on both sides of the conductive substrate, forming a window so as to expose a part of the conductive pattern film after flattening the resist, and soldering on both sides of the resist including the window and a hole for conduction. Printing a conductive paste that can be attached to form a desired pattern; andprinting a new resist on both sides of the resist containing the conductive paste, and flattening the resist. A method for manufacturing a multilayer wiring board, which is characterized in that:
【請求項3】 最外層を導電性ペーストで覆うことを特
徴とする請求項1または2記載の多層配線板の製造方
法。
3. The method according to claim 1, wherein the outermost layer is covered with a conductive paste.
JP18329296A 1996-07-12 1996-07-12 Manufacture of multi-layer wiring board Pending JPH1027962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18329296A JPH1027962A (en) 1996-07-12 1996-07-12 Manufacture of multi-layer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18329296A JPH1027962A (en) 1996-07-12 1996-07-12 Manufacture of multi-layer wiring board

Publications (1)

Publication Number Publication Date
JPH1027962A true JPH1027962A (en) 1998-01-27

Family

ID=16133116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18329296A Pending JPH1027962A (en) 1996-07-12 1996-07-12 Manufacture of multi-layer wiring board

Country Status (1)

Country Link
JP (1) JPH1027962A (en)

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