JPH10275717A - Manufacture of chip resistor - Google Patents

Manufacture of chip resistor

Info

Publication number
JPH10275717A
JPH10275717A JP9080634A JP8063497A JPH10275717A JP H10275717 A JPH10275717 A JP H10275717A JP 9080634 A JP9080634 A JP 9080634A JP 8063497 A JP8063497 A JP 8063497A JP H10275717 A JPH10275717 A JP H10275717A
Authority
JP
Japan
Prior art keywords
film
resistance value
resistance
powder
chip resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9080634A
Other languages
Japanese (ja)
Inventor
Hirotoshi Tanaka
博敏 田中
Masataka Obara
将孝 小原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP9080634A priority Critical patent/JPH10275717A/en
Publication of JPH10275717A publication Critical patent/JPH10275717A/en
Pending legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a chip resistor in which a resistance value of a resistance film is adjusted without forming a cut groove. SOLUTION: A resistance value of a resistance film 3 is adjusted by sticking powder P1, supplied from a powder supplying mechanism 13, onto the resistance film 3 formed on an insulating substrate 1, so that the resistance value is adjusted without forming a conventional cut groove on the resistance film. Thereby, generation of crack caused by peeling the resistance film from an insulating substrate and deterioration of strength of the resistance film due to influence of the cut groove is avoided, and a chip resistor of high quality and reliability is provided.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、抵抗値調整に改良
を施したチップ抵抗器の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip resistor having improved resistance value adjustment.

【0002】[0002]

【従来の技術】従来、この種のチップ抵抗器は、取り数
に応じた大きさを有する絶縁基板上に引出電極用導体膜
及び抵抗膜を所定配列で形成し、各抵抗膜をトリミング
してその抵抗値調整を行った後、引出電極用導体膜及び
抵抗膜を覆う保護膜を形成して、これを個々のチップに
切断し、チップ両端部に外部電極を形成することにより
製造されている。
2. Description of the Related Art Conventionally, in this type of chip resistor, a conductor film for an extraction electrode and a resistor film are formed in a predetermined arrangement on an insulating substrate having a size corresponding to the number of chips, and each resistor film is trimmed. After adjusting the resistance value, a protective film is formed to cover the conductor film for the extraction electrode and the resistance film, and this is cut into individual chips, and external electrodes are formed at both ends of the chip. .

【0003】上記の抵抗値調整工程は、引出電極用導体
膜を検出電極として抵抗膜の抵抗値を検出しながら、Y
AG等のレーザ光によって該抵抗膜にL字状や直線状の
カット溝を形成することにより実施されている。
In the above resistance value adjusting step, the resistance value of the resistance film is detected while using the conductor film for an extraction electrode as a detection electrode.
This is implemented by forming an L-shaped or linear cut groove in the resistive film with a laser beam such as AG.

【0004】[0004]

【発明が解決しようとする課題】上記従来の抵抗値調整
方法では、抵抗膜自体にL字状や直線状のカット溝が形
成されてしまうため、抵抗膜のカット溝周辺部分が絶縁
基板から剥離する恐れがあり、また、カット溝寸法が長
くなると抵抗膜の強度が低下してクラックを生じる恐れ
がある。
In the above-described conventional resistance value adjusting method, since an L-shaped or linear cut groove is formed in the resistive film itself, a portion around the cut groove of the resistive film is separated from the insulating substrate. In addition, when the dimension of the cut groove is increased, the strength of the resistive film is reduced, and a crack may be generated.

【0005】本発明は上記事情に鑑みてなされたもの
で、その目的とするところは、カット溝を形成すること
なく抵抗膜の抵抗値調整を行えるチップ抵抗器の製造方
法を提供することにある。
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a method of manufacturing a chip resistor capable of adjusting a resistance value of a resistance film without forming a cut groove. .

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明は、絶縁体上に抵抗膜を形成した後、その抵
抗値調整を行うチップ抵抗器の製造方法において、絶縁
体上に形成された抵抗膜に金属成分を含む粒子を付着さ
せることで該抵抗膜の抵抗値を変動させてその調整を行
う、ことをその主たる特徴としている。
In order to achieve the above object, the present invention relates to a method of manufacturing a chip resistor for forming a resistive film on an insulator and then adjusting the resistance value of the resistive film. The main feature is that the resistance value of the resistive film is varied by attaching particles containing a metal component to the resistive film thus formed, thereby adjusting the resistance value.

【0007】本発明によれば、絶縁体上に形成された抵
抗膜に金属成分を含む粒子を付着させることで該抵抗膜
の抵抗値を変動させてその調整を行うので、従来のよう
なカット溝を抵抗膜に形成することなく抵抗値調整を行
うことができる。
According to the present invention, the resistance value of the resistive film is varied by attaching particles containing a metal component to the resistive film formed on the insulator, thereby adjusting the resistance value. The resistance value can be adjusted without forming a groove in the resistance film.

【0008】[0008]

【発明の実施の形態】図1乃至図7は本発明の一実施形
態を示すもので、以下、図を参照して本実施形態に係る
チップ抵抗器の製造方法について説明する。
1 to 7 show one embodiment of the present invention. Hereinafter, a method of manufacturing a chip resistor according to the present embodiment will be described with reference to the drawings.

【0009】製造に際しては、まず、図1に示すような
取り数に応じた大きさを有する絶縁基板1を用意する。
この絶縁基板1は、Al23等のセラミクス粉末とバイ
ンダと溶剤等を混合して調製したセラミクススラリー
を、ドクターブレード法やスクリーン印刷法等の手法に
よってシート状に塗工し、これを乾燥し焼成することに
より作成される。
In manufacturing, first, an insulating substrate 1 having a size corresponding to the number of pieces as shown in FIG. 1 is prepared.
The insulating substrate 1 is formed by applying a ceramic slurry prepared by mixing a ceramic powder such as Al 2 O 3 , a binder, a solvent, and the like into a sheet by a method such as a doctor blade method or a screen printing method, and drying the coated slurry. And fired.

【0010】次に、上記の絶縁基板1の上面に、図2に
示すように、取り数に応じた数及び配列で矩形状の引出
電極用導体膜2を形成する。この引出電極用導体膜2
は、Ag,Ni等の金属成分を含む粉末とバインダと溶
剤等を混合して調製した電極ペーストを、スクリーン印
刷法等の手法によって所定形状で塗工し、これを乾燥し
焼成することにより作成される。勿論、不要部分をマス
キングしながら蒸着やスパッタリングや無電解・電解メ
ッキ等の薄膜法により同様の導体膜を形成するようにし
てもよい。
Next, as shown in FIG. 2, a rectangular lead electrode conductive film 2 is formed on the upper surface of the insulating substrate 1 in a number and arrangement corresponding to the number of holes. This conductor film 2 for an extraction electrode
Is prepared by applying an electrode paste prepared by mixing a powder containing a metal component such as Ag and Ni, a binder, a solvent, and the like, in a predetermined shape by a method such as a screen printing method, and then drying and firing the electrode paste. Is done. Of course, a similar conductive film may be formed by a thin film method such as vapor deposition, sputtering, or electroless / electrolytic plating while masking unnecessary portions.

【0011】次に、導体膜形成後の絶縁基板1の上面
に、図3に示すように、長手方向両端部が引出電極用導
体膜2と重なるように、取り数に応じた数及び配列で矩
形状の抵抗膜3を形成する。この抵抗膜3は、酸化ルテ
ニウム等の金属成分を含む粉末とバインダと溶剤等を混
合して調製した抵抗ペーストを、スクリーン印刷法等の
手法によって所定形状で塗工し、これを乾燥し焼成する
ことにより作成される。勿論、不要部分をマスキングし
ながら蒸着やスパッタリングや無電解・電解メッキ等の
薄膜法により同様の抵抗膜を形成するようにしてもよ
い。
Next, on the upper surface of the insulating substrate 1 after the formation of the conductive film, as shown in FIG. A rectangular resistance film 3 is formed. The resistive film 3 is formed by applying a resistive paste prepared by mixing a powder containing a metal component such as ruthenium oxide, a binder and a solvent in a predetermined shape by a method such as a screen printing method, and drying and firing the resistive paste. Created by Of course, a similar resistance film may be formed by a thin film method such as vapor deposition, sputtering, electroless plating, or electrolytic plating while masking unnecessary portions.

【0012】次に、絶縁基板1上に形成された各抵抗膜
3の抵抗値調整を、図4に示すような装置を用いて実施
する。ちなみに、図中の11は抵抗値検出器、12は抵
抗値検出器11の検出端子、13は粉末供給機である。
この粉末供給機13は、金属成分を含む粉末P1(以下
単に粉末P1という)、例えば、酸化ルテニウム等の金
属成分を含む粉末、または同粉末とPbO+MgO等の
セラミック粉末との混合粉末を貯えた粉末貯留部13a
と、該粉末貯留部13a内の粉末P1を単位量宛導出す
る粉末導出部13bと、該粉末導出部13bによって導
出された粉末P1を抵抗膜3に向けて供給するノズル1
3cとを備えており、粉末導出部13bは抵抗値検出器
11で検出された抵抗値に基づいて制御される。
Next, the resistance value of each resistance film 3 formed on the insulating substrate 1 is adjusted using an apparatus as shown in FIG. Incidentally, in the figure, 11 is a resistance value detector, 12 is a detection terminal of the resistance value detector 11, and 13 is a powder feeder.
The powder feeder 13 stores a powder P1 containing a metal component (hereinafter simply referred to as powder P1), for example, a powder containing a metal component such as ruthenium oxide, or a powder containing a mixture of the powder and a ceramic powder such as PbO + MgO. Storage unit 13a
A powder deriving unit 13b for deriving the powder P1 in the powder storage unit 13a in a unit amount; and a nozzle 1 for supplying the powder P1 derived by the powder deriving unit 13b toward the resistive film 3.
3c, and the powder deriving unit 13b is controlled based on the resistance value detected by the resistance value detector 11.

【0013】抵抗値を調整するときには、抵抗膜3の両
側に位置する引出電極用導体膜2に検出端子12をそれ
ぞれ接触させて該抵抗膜3の抵抗値を検出しながら、抵
抗膜3をヒータ熱等によって加熱した状態で、粉末供給
機13から粉末P1を抵抗膜3に向けて供給する。これ
により、供給された単位量の粉末P1が抵抗膜3の表面
に接合してその抵抗値が変動する。この粉末供給は抵抗
値検出器11における検出値が所定値に達するまで断続
的に繰り返される。ここでは、粉末P1の付着によって
抵抗膜3の抵抗値を減少させることでその抵抗値調整が
図られるため、絶縁基板1上に形成される抵抗膜3の初
期抵抗値はこの減少分を見込んだ値に設定しておくこと
が望ましい。
When adjusting the resistance value, the detection film 12 is brought into contact with the lead electrode conductor films 2 located on both sides of the resistance film 3 to detect the resistance value of the resistance film 3, and the resistance film 3 is heated by the heater. The powder P1 is supplied from the powder supply device 13 toward the resistance film 3 while being heated by heat or the like. As a result, the supplied unit amount of the powder P1 is bonded to the surface of the resistive film 3 and its resistance value fluctuates. This powder supply is intermittently repeated until the value detected by the resistance value detector 11 reaches a predetermined value. Here, the resistance value of the resistive film 3 is adjusted by reducing the resistance value of the resistive film 3 by adhering the powder P1. It is desirable to set it to a value.

【0014】次に、抵抗値調整後の絶縁基板1の上面全
体に、図5に示すように、絶縁性の保護膜4を形成す
る。この保護膜4は、SiO2 等を主成分とするガラス
ペーストをスクリーン印刷法等の手法によって層状に塗
工して焼き付けるか、或いはエポキシ等の樹脂ペースト
を同様に塗工して硬化させることにより作成される。
Next, as shown in FIG. 5, an insulating protective film 4 is formed on the entire upper surface of the insulating substrate 1 after the resistance value adjustment. The protective film 4 is formed by applying a glass paste mainly composed of SiO 2 or the like in a layered manner by a screen printing method or the like and baking it, or by applying a resin paste such as an epoxy resin and curing the same. Created.

【0015】次に、保護膜形成後の絶縁基板1を、仮想
切断ラインに沿って切断し、図6に示すような単位チッ
プ5を得る。この切断には、ダイヤモンドホイール等の
回転ブレードによる切断を可能としたダイシング装置
や、照射レーザ光による切断を可能としたスクライビン
グ装置等が利用される。この単位チップ5は、平角状の
絶縁素子5aの上面に抵抗膜5bを有し、その長手方向
両側に引出電極5cを有すると共に、抵抗膜5b及び引
出電極5cを表面が平らな保護膜5dによって覆われて
いる。また、単位チップ5の長手方向端面それぞれに
は、引出電極5cの端縁が露出している。
Next, the insulating substrate 1 after the formation of the protective film is cut along a virtual cutting line to obtain a unit chip 5 as shown in FIG. For this cutting, a dicing device capable of cutting by a rotating blade such as a diamond wheel, a scribing device capable of cutting by irradiation laser light, or the like is used. The unit chip 5 has a resistance film 5b on the upper surface of a rectangular insulating element 5a, and has extraction electrodes 5c on both sides in the longitudinal direction, and the resistance film 5b and the extraction electrode 5c are protected by a protective film 5d having a flat surface. Covered. Further, the edge of the extraction electrode 5c is exposed at each of the longitudinal end surfaces of the unit chip 5.

【0016】次に、単位チップ5を多数個一括でバレル
研磨する。この研磨によって単位チップ5の角及び稜線
に丸みが形成されると共に、絶縁素子5a及び引出電極
5cに比べて研磨され易い保護膜5dが全体的に研磨さ
れ、引出電極5cの端縁の露出が顕著なものとなる。
Next, a large number of unit chips 5 are barrel-polished at once. By this polishing, the corners and ridges of the unit chip 5 are rounded, and the protective film 5d, which is more easily polished than the insulating element 5a and the extraction electrode 5c, is entirely polished to expose the edge of the extraction electrode 5c. It will be noticeable.

【0017】次に、図7(a)(b)に示すように、研
磨後の単位チップ5の長手方向両端部に外部電極6を形
成して、引出電極5cの端縁露出部分と接続する。この
外部電極6は、Ag,Ni等の金属成分を含む粉末とバ
インダと溶剤等を混合して調製した電極ペーストを、デ
ィップ法等の手法によって所定形状で塗布し、これを乾
燥し焼成することにより作成される。勿論、不要部分を
マスキングしながら蒸着やスパッタリングや無電解・電
解メッキ等の薄膜法により同様の導体膜を形成するよう
にしてもよい。
Next, as shown in FIGS. 7 (a) and 7 (b), external electrodes 6 are formed on both ends in the longitudinal direction of the unit chip 5 after polishing, and are connected to the exposed end edges of the extraction electrode 5c. . The external electrode 6 is prepared by applying an electrode paste prepared by mixing a powder containing a metal component such as Ag or Ni, a binder, a solvent, or the like, in a predetermined shape by a method such as a dipping method, and drying and firing the electrode paste. Created by Of course, a similar conductive film may be formed by a thin film method such as vapor deposition, sputtering, or electroless / electrolytic plating while masking unnecessary portions.

【0018】以上で所定の抵抗値を有するチップ抵抗器
が製造されるが、外部電極6の表面には必要に応じて半
田膜を外部電極9と同様の手法で形成するようにしても
よい。また、保護層4を形成する工程を2度繰り返すこ
とで、2層構造の保護膜、例えば下層がガラスで上層が
樹脂の保護膜を形成することもできる。
A chip resistor having a predetermined resistance value is manufactured as described above. A solder film may be formed on the surface of the external electrode 6 by the same method as the external electrode 9 if necessary. Further, by repeating the step of forming the protective layer 4 twice, it is possible to form a protective film having a two-layer structure, for example, a lower layer of glass and an upper layer of resin.

【0019】このように上述の製造方法によれば、絶縁
基板1上に形成された抵抗膜3に粉末P1を付着させる
ことによってその抵抗値調整を行っているので、従来の
ようなカット溝を抵抗膜に形成することなく抵抗値調整
を行うことができる。依って、カット溝の影響で、抵抗
膜が絶縁基板から剥離したり抵抗膜の強度が低下してク
ラックを生じることを回避して、高品質で信頼性の高い
チップ抵抗器を提供することができる。
As described above, according to the above-described manufacturing method, the resistance value is adjusted by adhering the powder P1 to the resistance film 3 formed on the insulating substrate 1, so that the conventional cut groove can be formed. The resistance value can be adjusted without forming the resistive film. Therefore, it is possible to provide a high-quality and highly reliable chip resistor by preventing the resist film from peeling off from the insulating substrate or reducing the strength of the resistive film due to the effect of the cut groove and causing cracks. it can.

【0020】尚、上記実施形態では、高抵抗の金属成分
を含む粉末P1を抵抗膜3に付着させるものを例示した
が、低抵抗の金属成分を含む粉末を材料として用いても
同様の抵抗値調整を行うことできる。
In the above embodiment, the powder P1 containing a high-resistance metal component is attached to the resistance film 3. However, the same resistance value can be obtained by using a powder containing a low-resistance metal component as a material. Adjustments can be made.

【0021】また、上記実施形態では粉末P1を抵抗膜
3に付着させることでその抵抗値調整を行うものを例示
したが、金属成分を含む粒子を抵抗膜に付着できるもの
であればこれ以外の方法でも抵抗値調整は可能である。
以下にその具体例を図8と図9を参照して説明する。
In the above-described embodiment, the powder P1 is attached to the resistance film 3 to adjust the resistance value. However, any other material can be used as long as particles containing a metal component can be attached to the resistance film. The resistance value can be adjusted by the method.
A specific example will be described below with reference to FIGS.

【0022】図8に示した方法は、金属溶液Fを蒸発さ
せ、その蒸発粒子P2を抵抗膜3に付着させることでそ
の抵抗値調整を行うようにしたもので、図中の21は抵
抗値検出器、22は抵抗値検出器21の検出端子、23
は蒸発粒子供給機である。この蒸発粒子供給機23は、
酸化ルテニウム等の高抵抗金属成分を含む粉末を有機溶
剤に加えて調製した金属溶液Fを貯えた溶液貯留部23
aと、金属溶液Fを加熱して蒸発させるヒータ23b
と、蒸発粒子P2を抵抗膜3に向けて導くダクト23c
と、ダクト23cの開口を開閉するシャッター部23d
とを備えており、シャッター部23dは抵抗値検出器2
1で検出された抵抗値に基づいて制御される。
In the method shown in FIG. 8, the resistance value is adjusted by evaporating the metal solution F and adhering the evaporated particles P2 to the resistance film 3, and 21 in the figure denotes the resistance value. A detector 22 is a detection terminal of the resistance value detector 21;
Is an evaporating particle feeder. This evaporating particle supply device 23
A solution storage unit 23 storing a metal solution F prepared by adding a powder containing a high-resistance metal component such as ruthenium oxide to an organic solvent.
a and a heater 23b for heating and evaporating the metal solution F
And the duct 23c for guiding the evaporated particles P2 toward the resistance film 3
And a shutter 23d for opening and closing the opening of the duct 23c
And the shutter section 23d is provided with the resistance value detector 2
The control is performed based on the resistance value detected in step (1).

【0023】抵抗値を調整するときには、抵抗膜3の両
側に位置する引出電極用導体膜2に検出端子22をそれ
ぞれ接触させて該抵抗膜3の抵抗値を検出しながら、抵
抗膜3をヒータ熱等によって加熱した状態で、蒸発粒子
供給機23から蒸発粒子P2を抵抗膜3に向けて供給す
る。これにより、供給された蒸発粒子P2が抵抗膜3の
表面に接合してその抵抗値が変動する。この蒸発粒子供
給は抵抗値検出器21における検出値が所定値に達する
まで継続される。ここでは、蒸発粒子P2の付着によっ
て抵抗膜3の抵抗値を減少させることでその抵抗値調整
が図られるため、絶縁基板1上に形成される抵抗膜3の
初期抵抗値はこの減少分を見込んだ値に設定しておくこ
とが望ましい。勿論、低抵抗の金属成分を含む溶液を蒸
発させるようにしても同様の抵抗値調整を行うことがで
きる。
When adjusting the resistance value, the detection terminals 22 are respectively brought into contact with the lead electrode conductor films 2 located on both sides of the resistance film 3 to detect the resistance value of the resistance film 3 while the resistance film 3 is heated. In a state of being heated by heat or the like, the evaporated particles P2 are supplied from the evaporated particle supply device 23 toward the resistance film 3. As a result, the supplied evaporated particles P2 are bonded to the surface of the resistance film 3, and the resistance value fluctuates. The supply of the evaporated particles is continued until the value detected by the resistance detector 21 reaches a predetermined value. Here, the resistance value of the resistive film 3 is adjusted by reducing the resistance value of the resistive film 3 by the attachment of the evaporated particles P2. Therefore, the initial resistance value of the resistive film 3 formed on the insulating substrate 1 allows for the decrease. It is desirable to set it to a default value. Of course, the same resistance value adjustment can be performed by evaporating a solution containing a low-resistance metal component.

【0024】図9に示した方法は、材料板Tにレーザ光
LBを照射し、レーザアブレーションで発生した金属粒
子(分子または原子)P3を抵抗膜3に付着させること
でその抵抗値調整を行うようにしたもので、図中の31
は抵抗値検出器、32は抵抗値検出器31の検出端子、
33はYAGやエキシマ等のパルスレーザから成るレー
ザ発振器、LBはレーザ光、Tはレーザアブレーション
のターゲットと成る酸化ルテニウム等の高抵抗金属成分
を含む材料板であり、レーザ発振器33は抵抗値検出器
31で検出された抵抗値に基づいて制御される。
In the method shown in FIG. 9, the material plate T is irradiated with laser light LB, and metal particles (molecules or atoms) P3 generated by laser ablation are attached to the resistance film 3 to adjust the resistance value. As shown in the figure, 31
Is a resistance value detector, 32 is a detection terminal of the resistance value detector 31,
Reference numeral 33 denotes a laser oscillator made of a pulse laser such as YAG or excimer, LB denotes a laser beam, T denotes a material plate containing a high-resistance metal component such as ruthenium oxide serving as a target for laser ablation, and the laser oscillator 33 denotes a resistance detector. Control is performed based on the resistance value detected at 31.

【0025】抵抗値を調整するときには、抵抗膜3の両
側に位置する引出電極用導体膜2に検出端子32をそれ
ぞれ接触させて該抵抗膜3の抵抗値を検出しながら、抵
抗膜3をヒータ熱等で加熱した状態で、レーザ発振器3
3から材料板Tに向けてレーザ光LBを照射する。これ
により、照射レーザ光LBのエネルギーによって材料板
Tにアブレーションが起こり、アブレーションされた金
属粒子(分子または原子)P3が抵抗膜3の表面に接合
してその抵抗値が変動する。このレーザアブレーション
は抵抗値検出器31における検出値が所定値に達するま
で継続される。ここでは、金属粒子P3の付着によって
抵抗膜3の抵抗値を減少させることでその抵抗値調整が
図られるため、絶縁基板1上に形成される抵抗膜3の初
期抵抗値はこの減少分を見込んだ値に設定しておくこと
が望ましい。勿論、低抵抗の金属成分を含む材料板にレ
ーザ光を照射してアブレーションを発生させるようにし
ても同様の抵抗値調整を行うことができる。
When adjusting the resistance value, the detection terminal 32 is brought into contact with each of the lead electrode conductor films 2 located on both sides of the resistance film 3 to detect the resistance value of the resistance film 3, and the resistance film 3 is heated. While heated by heat, etc., the laser oscillator 3
The laser beam LB is irradiated from 3 onto the material plate T. As a result, ablation occurs in the material plate T due to the energy of the irradiation laser beam LB, and the ablated metal particles (molecules or atoms) P3 are bonded to the surface of the resistance film 3 to change the resistance value. This laser ablation is continued until the value detected by the resistance detector 31 reaches a predetermined value. Here, the resistance value of the resistance film 3 is adjusted by reducing the resistance value of the resistance film 3 by the adhesion of the metal particles P3. Therefore, the initial resistance value of the resistance film 3 formed on the insulating substrate 1 is expected to correspond to this decrease. It is desirable to set it to a default value. Of course, the same resistance value adjustment can be performed by irradiating a laser beam to a material plate containing a low-resistance metal component to generate ablation.

【0026】[0026]

【発明の効果】以上詳述したように、本発明によれば、
カット溝を抵抗膜に形成することなく抵抗値調整を行う
ことができるので、カット溝の影響で抵抗膜が絶縁体か
ら剥離したり抵抗膜の強度が低下してクラックを生じる
ことを回避して、高品質で信頼性の高いチップ抵抗器を
提供することができる。
As described in detail above, according to the present invention,
Since the resistance value can be adjusted without forming the cut groove in the resistive film, it is possible to avoid the resist film from being separated from the insulator or the strength of the resistive film being reduced due to the influence of the cut groove to cause a crack. Thus, a high-quality and highly reliable chip resistor can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る絶縁基板の斜視図FIG. 1 is a perspective view of an insulating substrate according to the present invention.

【図2】本発明に係る導体膜形成工程を示す図FIG. 2 is a view showing a conductive film forming step according to the present invention.

【図3】本発明に係る抵抗膜形成工程を示す図FIG. 3 is a view showing a resistive film forming step according to the present invention.

【図4】本発明に係る抵抗値調整工程を示す図FIG. 4 is a diagram showing a resistance value adjusting step according to the present invention.

【図5】本発明に係る保護膜調整工程を示す図FIG. 5 is a view showing a protective film adjusting step according to the present invention.

【図6】本発明に係る切断チップの斜視図FIG. 6 is a perspective view of a cutting tip according to the present invention.

【図7】本発明に係る外部電極形成工程を示す図とチッ
プ抵抗器の縦断面図
FIG. 7 is a diagram showing an external electrode forming process according to the present invention and a longitudinal sectional view of a chip resistor.

【図8】他の抵抗値調整方法を示す図FIG. 8 is a diagram showing another resistance value adjusting method.

【図9】他の抵抗値調整方法を示す図FIG. 9 is a diagram showing another resistance value adjusting method.

【符号の説明】[Explanation of symbols]

1…絶縁基板、2…引出電極用導体膜、3…抵抗膜、4
…保護膜、5…単位チップ、6…外部電極、11…抵抗
値検出器、12…検出端子、13…粉末供給機、P1…
金属成分を含む粉末、21…抵抗値検出器、22…検出
端子、23…蒸発粒子供給機、P2…蒸発粒子、31…
抵抗値検出器、32…検出端子、33…レーザ発振器、
LB…レーザ光、T…材料板、P3…金属粒子。
DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 2 ... Conductor film for extraction electrodes, 3 ... Resistive film, 4
... Protective film, 5 ... Unit chip, 6 ... External electrode, 11 ... Resistance detector, 12 ... Detection terminal, 13 ... Powder feeder, P1 ...
Powder containing metal component, 21: resistance value detector, 22: detection terminal, 23: evaporating particle feeder, P2: evaporating particle, 31 ...
Resistance value detector, 32: detection terminal, 33: laser oscillator,
LB: laser beam, T: material plate, P3: metal particles.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 絶縁体上に抵抗膜を形成した後、その抵
抗値調整を行うチップ抵抗器の製造方法において、 絶縁体上に形成された抵抗膜に金属成分を含む粒子を付
着させることで該抵抗膜の抵抗値を変動させてその調整
を行う、 ことを特徴とするチップ抵抗器の製造方法。
In a method of manufacturing a chip resistor for adjusting a resistance value after forming a resistance film on an insulator, particles including a metal component are attached to the resistance film formed on the insulator. A method for manufacturing a chip resistor, wherein the resistance value of the resistance film is varied to adjust the resistance value.
【請求項2】 金属成分を含む粒子が、金属成分を含む
粉末である、 ことを特徴とする請求項1記載のチップ抵抗器の製造方
法。
2. The method according to claim 1, wherein the particles containing the metal component are powders containing the metal component.
【請求項3】 金属成分を含む粒子が、金属溶液の蒸発
粒子である、 ことを特徴とする請求項1記載のチップ抵抗器の製造方
法。
3. The method for manufacturing a chip resistor according to claim 1, wherein the particles containing a metal component are particles evaporated from a metal solution.
【請求項4】 金属成分を含む粒子が、レーザアブレー
ションで発生した粒子である、 ことを特徴とする請求項1記載のチップ抵抗器の製造方
法。
4. The method for manufacturing a chip resistor according to claim 1, wherein the particles containing a metal component are particles generated by laser ablation.
JP9080634A 1997-03-31 1997-03-31 Manufacture of chip resistor Pending JPH10275717A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9080634A JPH10275717A (en) 1997-03-31 1997-03-31 Manufacture of chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9080634A JPH10275717A (en) 1997-03-31 1997-03-31 Manufacture of chip resistor

Publications (1)

Publication Number Publication Date
JPH10275717A true JPH10275717A (en) 1998-10-13

Family

ID=13723808

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9080634A Pending JPH10275717A (en) 1997-03-31 1997-03-31 Manufacture of chip resistor

Country Status (1)

Country Link
JP (1) JPH10275717A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006165117A (en) * 2004-12-03 2006-06-22 Toppan Printing Co Ltd Substrate with built-in resistive element and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006165117A (en) * 2004-12-03 2006-06-22 Toppan Printing Co Ltd Substrate with built-in resistive element and its manufacturing method
JP4626282B2 (en) * 2004-12-03 2011-02-02 凸版印刷株式会社 Manufacturing method of resistance element built-in substrate

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