JPH1027035A - Information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect data in an information processor by calculating a total of information in a nonvolatile memory by an adding circuit and stopping the information processor unless the value totalized by the adding circuit matches a set value. SOLUTION: This information processor is equipped with a main control part 1, a nonvolatile memory 2a, a setting part 3a, a nonvolatile memory read part 4a, the adding circuit 5a, a comparing circuit 6a, a power source part 8, and a reset control part 9. Then the adding circuit 5a of hardware constitution calculates the total of information in the nonvolatile memory 2a and the comparing circuit 6a of hardware constitution compares the value totalized by the adding circuit 5a with a set value and stops the information processor unless the value totalized by the adding circuit 5a matches with the set value. Consequently, even if the nonvolatile memory 2a is illegally rewritten, the information processor can be stopped to protect data in the information processor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus capable of improving security. In recent years, crimes caused by computer viruses and the like have frequently occurred in information processing apparatuses. Therefore, it is desired that important information is not erased or destroyed by a computer virus or the like.

[0002]

2. Description of the Related Art In a conventional information processing apparatus, a BIOS (bass) written in a non-volatile memory at the time of startup is used.
ic input-output system) or I
An operating system is started by a program such as PL (initial program load). Non-volatile memory is rewritable, BIOS
If the IPL unit is destroyed or infected by a computer virus or the like, the information processing apparatus is stopped by a process such as a check by the IPL program at startup.

[0003]

In the prior art as described above, the check data itself is also written in the non-volatile memory, and if the check processing program itself in the IPL is changed, the information is not changed. There is a problem that the processing device is started up as it is, and important information is erased by a computer virus.

[0004] The present invention solves such a conventional problem, and destroyed and infected BIO with a computer virus or the like.
An object of the present invention is to prevent the information processing apparatus from being activated by S or IPL.

[0005]

FIG. 1 is a diagram illustrating the principle of the present invention. In FIG. 1, 1 is a main control unit, 2a is a nonvolatile memory, 3a is a setting unit, 4a is a nonvolatile memory reading unit,
5a is an addition circuit, 6a is a comparison circuit, 8 is a power supply unit, and 9 is a reset control unit.

The present invention has the following configuration to solve the above-mentioned conventional problems. (1): A non-volatile memory 2a for storing information, an addition circuit 5a having a hardware configuration for calculating the sum of the information in the non-volatile memory 2a, and a value summed by the addition circuit 5a and a set value are compared. A comparison circuit having a hardware configuration, wherein the information processing device is stopped when the comparison result of the comparison circuit does not match the value summed by the addition circuit and the set value.

(2): A normally used nonvolatile memory 2A for storing information, and a check nonvolatile memory 2B used for checking the normally used nonvolatile memory 2A
And comparing means for comparing information between the two non-volatile memories 2A and 2B. If there is a mismatch in the comparison by the comparing means, the non-volatile memory for checking 2B and the non-volatile memory 2A for normal use are compared. Copy the information to

(Operation) The operation based on the above configuration will be described. The sum of the information in the non-volatile memory 2a is calculated by an addition circuit 5a having a hardware configuration, and the value obtained by the addition circuit 5a is compared with a set value by a comparison circuit 6a having a hardware configuration. If the set value does not match the set value, the information processing device is stopped. Therefore, even if the nonvolatile memory 2a is illegally rewritten, the information processing device can be stopped, and data in the information processing device can be protected.

Also, a nonvolatile memory 2A for storing information
Is used normally, the non-volatile memory for checking 2B is used for checking the non-volatile memory 2A for normal use, and information between the two non-volatile memories 2A and 2B is compared by comparing means. If there is a mismatch, the information is copied from the checking nonvolatile memory 2B to the normally used nonvolatile memory 2A. For this reason,
Even if the non-volatile memory 2A for normal use has been illegally rewritten, the data in the information processing apparatus can be protected because it is rewritten correctly before use.

[0010]

2 to 5 are views showing an embodiment of the present invention. The embodiment of the present invention will be described below with reference to the drawings. (1): Description when Using Addition Circuit a: Description of Device Configuration FIG. 2 is a device configuration diagram when using an addition circuit according to an embodiment of the present invention. Hereinafter, description will be given based on FIG.

The information processing apparatus includes a main control unit 1 and a flash ROM (read only memory) as a nonvolatile memory.
A section 2, a jumper section 3, a flash ROM reading section 4, an addition circuit section 5, a comparison circuit section 6, a clock generation circuit section 7, a power supply section 8, and a reset control section 9 are provided.

The main control section 1 is a section for controlling the entire apparatus. The flash ROM section 2 is a section in which programs such as IPL and BIOS are written. The jumper section 3 is a section for setting the total of data when the contents of the flash ROM are correct. The flash ROM reading section 4 is a section for reading the contents of the flash ROM. The addition circuit unit 5 includes a flash ROM reading unit 4
Is a part for calculating the sum of the contents read out in step (1).

The comparison circuit section 6 is a section for comparing whether the sum of the addition circuit section 5 and the setting of the jumper section 3 match. The clock generation circuit 7 is a part that determines the processing speed of the device. The power supply unit 8 is a part that supplies power to the device. The reset control section 9 is a section that generates an initialization signal of the device when the power is turned on by the power supply section 8.

B: Description of Operation First, when power is supplied to the apparatus by the power supply section 8, a reset signal is given to the entire apparatus by the reset control section 9. Upon detecting a change in the state of the reset signal, the flash ROM reading section 4 reads the contents of the flash ROM section 2 one after another and sends the contents to the addition circuit section 5, and the addition circuit section 5 calculates the sum. After reading the contents of the flash ROM section 2 in all spaces, the flash ROM reading section 4 notifies the comparison circuit section 6 of the end of reading.

When the reading of the comparison circuit section 6 is completed,
The sum of the addition circuit 5 and the setting of the jumper unit 3 are compared to see if they match, and if they match, a reset release signal is given to the reset control unit 9 to release the reset.
And operation of BIOS and the like. If they do not match, the reset will not be released, so the damaged or infected IP
It is possible to prevent the information processing apparatus from being activated by L or BIOS.

The comparison result of the addition circuit 5 in the comparison circuit section 6 and the setting of the jumper section 3 are compared by comparing the determined lower digits without performing all the digits. , The comparison circuit and the like can be simplified.

FIG. 3 is a processing flowchart using an adding circuit. Hereinafter, description will be given according to the processing S1 to the processing S8 in FIG. S1: When power is supplied to the device by the power supply unit 8, the reset control unit 9 gives a reset signal to the entire device,
The main controller 1 is initialized, and the process proceeds to step S2.

S2: The flash ROM reading section 4
Detects a change in the state of the reset signal, and flash ROM
The contents of the section 2 are successively read out and sent to the addition circuit section 5 for processing S
Move to 3.

S3: In the addition circuit 5, the flash RO
The sum of the contents of the flash ROM unit 2 read by the M reading unit 4 is calculated, and the process proceeds to step S4. S4: The flash ROM reading unit 4 reads the flash R
It is determined whether the contents of the OM section 2 have been read in all spaces.
If the contents of the flash ROM section 2 have been read in the entire space, the process proceeds to step S5. If the contents have not been read, the process returns to step S2.

S5: When the reading is completed, the comparing circuit 6 compares the sum of the result of the adding circuit 5 and the setting of the jumper 3 with each other. In this comparison, if the sum of the addition circuit unit 5 and the setting of the jumper unit 3 match, the process proceeds to step S6, and if not, the process proceeds to step S8.

S6: The comparison circuit section 6 informs the reset control section 9 of the coincidence, the reset control section 9 releases the output of the reset signal, and proceeds to processing S7. S7: The main control unit 1 starts to operate, and the I
Execute PL and BIOS.

S8: In the comparison of the processing S5, when the sum result of the adding circuit section 5 does not match the setting of the jumper section 3, the comparing circuit section 6 informs the reset control section 9 that it does not match, and resets the reset control section 9. The unit 9 does not release the output of the reset signal.

As described above, the flash R
The data in the information processing device can be protected by checking (checksum) the OM and preventing the information processing device from being activated by the destroyed or infected IPL or BIOS.

(2) Description of a case having two nonvolatile memories a: Description of a device configuration FIG. 4 shows two nonvolatile memories according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an example of a device configuration in a case where the device has two devices. Hereinafter, description will be given based on FIG.

The information processing apparatus includes a main controller 1, a flash ROM 2A as a nonvolatile memory, a flash ROM 2B as a nonvolatile memory, a flash ROM controller 4A, a comparator 6, a power supply 8, A control unit 9 is provided.

The main control section 1 is a section for controlling the entire apparatus. The flash ROM section 2A is a section in which programs such as IPL and BIOS are written, and the main control section 1 reads the contents and operates the device. The flash ROM section 2B is for comparing the flash ROM section 2A, and the contents of the flash ROM are normally not rewritten.

The flash ROM control section 4A is a section for reading the contents of the flash ROM. Comparison circuit section 6
Is the data in the flash ROM 2A and the flash R
This is a part for comparing the data of the OM unit 2B to determine whether they match.
The power supply unit 8 is a part that supplies power to the device. The reset control section 9 is a section that generates an initialization signal of the device when the power is turned on by the power supply section 8.

B: Description of the Operation First, when power is supplied to the apparatus by the power supply section 8, the reset control section 9 supplies a reset signal to the entire apparatus. Upon detecting a change in the state of the reset signal, the flash ROM control unit 4A reads the contents of the flash ROM unit 2A and the flash ROM unit 2B one after another and sends them to the comparison circuit unit 6. When the entire space comparison of the contents of the ROM section 2B is completed, the flash ROM control section 4A notifies the comparison circuit section 6 and the reset control section 9 of the end of reading. The reset control unit 9 releases the reset and sets the IPL or BIOS of the device.
And so on.

If a mismatch is found during the comparison, the flash ROM
By copying the contents of the M unit 2B to the flash ROM unit 2A and performing the compare process again, it is possible to prevent the information processing apparatus from being started by the destructed or infected IPL or BIOS. As described above, since the copy operation requires more time than reading and comparing, the copying is performed in the case of a mismatch.

FIG. 5 is a processing flowchart having two nonvolatile memories. Hereinafter, processing S11 to processing S1 of FIG.
Explanation will be made according to 5. S11: When power is supplied to the apparatus by the power supply section 8, the reset control section 9 supplies a reset signal to the entire apparatus, initializes the main control section 1, and proceeds to processing S12.

S12: The flash ROM controller 4A
Detects a change in the state of the reset signal, and flash ROM
The contents of the unit 2A and the flash ROM unit 2B are read one after another, sent to the comparison circuit 6, and the process proceeds to S13.

S13: The comparison circuit unit 6 determines whether the flash RO
The data contents of the M section 2A and the flash ROM section 2B are compared. In this comparison, if the data contents of the flash ROM 2A and the flash ROM 2B match in all spaces, the process S1
4 and if a mismatch is found during the comparison, the process S
Move to 15.

S14: The comparison circuit unit 6 determines whether the flash RO
The fact that the data contents of the M unit 2A and the flash ROM unit 2B match in all spaces is notified to the reset control unit 9, and the reset control unit 9 cancels the output of the reset signal. As a result, the main control unit 1 starts operating and executes the IPL and BIOS in the flash ROM unit 2A.

S15: If a mismatch is found during the comparison of the data contents of the flash ROM section 2A and the flash ROM section 2B in the comparison of the processing S13, the comparing circuit section 6 informs the flash ROM control section 4A of the mismatch. Tell The flash ROM control unit 4A includes a flash ROM
The contents of the unit 2B are copied to the flash ROM unit 2A, and the process returns to step S12.

As described above, in an information processing apparatus having two rewritable nonvolatile memories, one is normally used, the other is used for checking normal use, and the two memories are compared and checked by hardware for a mismatch. If there is, the data is copied from the check memory to the memory on the normal use side, so that the information processing device is not activated by the destroyed or infected IPL or BIOS, and the data in the information processing device can be protected. .

It should be noted that flash R is used as a non-volatile memory.
Although the OM has been described, other non-volatile memories such as an EEPROM can be used.

[0037]

As described above, the present invention has the following effects. (1): The sum of the information in the non-volatile memory is calculated by an addition circuit having a hardware configuration, and the value obtained by the addition circuit is compared with a set value by a comparison circuit having a hardware configuration. Since the device is stopped, the information processing device can be stopped even if the nonvolatile memory is illegally rewritten, and data in the information processing device can be protected.

(2) The nonvolatile memory for storing information is normally used, and the nonvolatile memory for checking is used for checking the nonvolatile memory for normal use, and the information between the two nonvolatile memories is compared by the comparing means. If there is a mismatch in the comparison by the comparing means, information is copied from the non-volatile memory for checking to the non-volatile memory for normal use, so that the non-volatile memory for normal use is illegally rewritten. However, to rewrite and use it correctly,
Data in the information processing device can be protected.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a device configuration diagram when an adding circuit according to the embodiment is used.

FIG. 3 is a processing flowchart using an adding circuit according to the embodiment.

FIG. 4 is a device configuration diagram in a case where two nonvolatile memories are provided in the embodiment.

FIG. 5 is a processing flowchart having two nonvolatile memories according to the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Main control part 2a Non-volatile memory 3a Setting part 4a Non-volatile memory reading part 5a Addition circuit 6a Comparison circuit 8 Power supply part 9 Reset control part

Claims (2)

[Claims] A non-volatile memory for storing information, an addition circuit having a hardware configuration for calculating the sum of information in the non-volatile memory, and a hardware configuration for comparing a value summed by the addition circuit with a set value An information processing apparatus comprising: a comparison circuit configured to stop an information processing apparatus when a value summed by the addition circuit does not match the set value in the comparison of the comparison circuit. 2. A non-volatile memory for normal use for storing information, a non-volatile memory for checking used for checking the non-volatile memory for normal use, and a comparing means for comparing information between the two non-volatile memories And an information processing apparatus for copying information from the non-volatile memory for checking to the non-volatile memory for normal use when there is a mismatch in the comparison by the comparing means.