JPH10270329A - Method for determining condition of antireflective film and formation of resist pattern using it - Google Patents

Method for determining condition of antireflective film and formation of resist pattern using it

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Publication number
JPH10270329A
JPH10270329A JP7498497A JP7498497A JPH10270329A JP H10270329 A JPH10270329 A JP H10270329A JP 7498497 A JP7498497 A JP 7498497A JP 7498497 A JP7498497 A JP 7498497A JP H10270329 A JPH10270329 A JP H10270329A
Authority
JP
Japan
Prior art keywords
film
variation
reflectance
antireflection
film thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7498497A
Other languages
Japanese (ja)
Inventor
Akiyoshi Shigeniwa
明美 茂庭
Tsuneo Terasawa
恒男 寺澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7498497A priority Critical patent/JPH10270329A/en
Publication of JPH10270329A publication Critical patent/JPH10270329A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To optimize the condition of an antireflective film by finding the reflectance of the film in the worst case by taking the variation of the optical constant and film thickness of the film into consideration and selecting the optical constant and film thickness at which the reflectance becomes the minimum. SOLUTION: A lower-layer structure inputting section 1 inputs the optical constant, film thickness, and film thickness variation of each layer including a film to be worked and an antireflective film variation inputting section 2 inputs the variation of the optical constant, film thickness, etc., in an antireflective film forming process. A reflectance calculating section 3 finds the reflectance of an antireflective film by changing the film thickness of a lower-layer structure and the film thickness and optical constant of the antireflective film within the inputted variation. Of the found reflectance, the maximum reflectance is determined as the worst-case reflectance at the optical constant and film thickness assumed by a worst-case reflectance calculating section 4 and an optimum condition determining section 5 determining the optical constant and film thickness at which the worst-case reflectance becomes the minimum by finding the worst-case reflectance for various antireflective film optical constants and film thicknesses.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体集積回路等の
製造における光リソグラフィ技術に係わり、特にレジス
トへの下層からの反射光を防止する反射防止膜に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical lithography technique for manufacturing a semiconductor integrated circuit and the like, and more particularly to an antireflection film for preventing light reflected from a lower layer on a resist.

【0002】[0002]

【従来の技術】半導体集積回路等のパターン形成に用い
られる光リソグラフィ工程では、解像限界に近い寸法の
パターン形成がなされ、それに伴って寸法精度への要求
も厳しくなってきている。
2. Description of the Related Art In an optical lithography process used for forming a pattern of a semiconductor integrated circuit or the like, a pattern having a size close to a resolution limit is formed, and accordingly, requirements for dimensional accuracy are becoming stricter.

【0003】寸法精度向上には、フォーカス裕度,ドー
ズ裕度,レジスト膜厚/下地膜厚変動に対する裕度の拡
大が必要である。このうち、レジスト膜厚/下地膜厚変
動に対する裕度はレジストへの反射光強度を抑えること
により実現される。露光光は、レジスト表面から入射し
た後に下層で反射して再びレジスト中に入る。このた
め、実効的にレジスト内への照射量が増加する。下地の
膜厚変動がある場合には、下地中での多重干渉の度合い
が変わるため、レジストへの反射光強度にばらつきが生
じる。また、下地膜厚変動に対する反射光強度が一定と
なる場合でも、定在波効果によりレジスト膜厚変動に伴
う寸法ばらつきが生じる。定在波は反射光と入射光の干
渉によって起きる。段差基板上に塗布されるレジストに
は膜厚分布が生じ、レジスト膜厚により干渉度が異なる
ため潜像分布(=現像速度分布)に違いができる。これ
が、レジスト寸法ばらつきの要因となる。
In order to improve the dimensional accuracy, it is necessary to increase the allowance for the focus allowance, the dose allowance, and the variation of the resist film thickness / base film thickness. Among them, the tolerance for the variation of the resist film thickness / base film thickness is realized by suppressing the intensity of the reflected light to the resist. Exposure light is reflected from the lower layer after entering from the resist surface and enters the resist again. Therefore, the irradiation dose to the resist effectively increases. When the thickness of the underlayer varies, the degree of the multiple interference in the underlayer changes, so that the intensity of the reflected light to the resist varies. Further, even when the intensity of the reflected light with respect to the variation in the base film thickness is constant, the dimensional variation due to the variation in the resist film thickness occurs due to the standing wave effect. A standing wave is caused by interference between reflected light and incident light. The resist applied on the stepped substrate has a film thickness distribution, and the degree of interference varies depending on the resist film thickness, so that the latent image distribution (= development speed distribution) differs. This causes a variation in resist dimensions.

【0004】このような下地からの反射を低減させる技
術の一つとして、レジスト層よりも下層に反射防止膜を
設けてレジストへの反射光強度を低減する技術がある。
反射防止膜としては、レジスト層を抜けて基板方向へ進
む入射光を吸収させる吸収型反射防止膜、反射防止膜の
上下の各界面で反射する光を干渉させて打ち消しあう干
渉型反射防止膜があるが、いずれの場合も反射率低減効
果を得るには反射防止膜の光学定数(=複素屈折率)と
その膜厚を最適化することが必須である。
As one of the techniques for reducing the reflection from the underlayer, there is a technique for providing an antireflection film below the resist layer to reduce the intensity of light reflected on the resist.
As the anti-reflection film, an absorption-type anti-reflection film that absorbs incident light that passes through the resist layer and travels toward the substrate, and an interference-type anti-reflection film that interferes and cancels light reflected at each of the upper and lower interfaces of the anti-reflection film. However, in any case, in order to obtain the effect of reducing the reflectance, it is essential to optimize the optical constant (= complex refractive index) of the antireflection film and its film thickness.

【0005】この反射防止膜条件の求め方が、特開平5
−299338号、及び特開平6−196400号に記載されてい
る。特開平5−299338 号に記載の方法では、レジストと
反射防止膜界面の反射を抑える範囲と反射防止膜の下層
の反射率の最も厳しい条件下で反射を抑える範囲から一
般性を持つ反射防止膜光学定数範囲を求めている。ま
た、特開平6−196400 号に記載の方法では、複数のレジ
スト膜厚の吸光量がほぼ等しくなる反射防止光学定数を
求め、これを種々の反射防止膜厚について繰り返すこと
により反射防止膜条件の最適値を見いだしている。
[0005] The method of determining the conditions of the antireflection film is disclosed in
-299338 and JP-A-6-196400. In the method described in JP-A-5-299338, an antireflection film having generality is selected from a range in which the reflection at the interface between the resist and the antireflection film is suppressed and a range in which the reflection of the lower layer of the antireflection film is suppressed under the strictest conditions. The optical constant range is determined. Further, according to the method described in JP-A-6-196400, an antireflection optical constant at which the light absorption amounts of a plurality of resist film thicknesses are substantially equal is obtained, and this is repeated for various antireflection film thicknesses, whereby the conditions of the antireflection film condition are obtained. Finding the optimal value.

【0006】さらに、特開平7−273010 号には、多層の
被加工膜中の透明な酸化膜下に反射防止膜を設けて反射
防止効果をあげる構造が記載されている。すなわち、膜
厚変動によりレジストへの反射率の変化量が大きくなる
透明な被加工層(反射率変動要因層)の下に反射防止膜
を設けることにより反射率変動要因層へ入る反射光量を
小さくし、全体の反射率変動を抑えて反射防止効果を大
きくしている。
Further, Japanese Patent Application Laid-Open No. 7-273010 describes a structure in which an antireflection film is provided under a transparent oxide film in a multilayer film to be processed to improve the antireflection effect. That is, by providing an anti-reflection film under a transparent layer to be processed (reflectance variation factor layer) in which the amount of change in the reflectance to the resist increases due to the film thickness variation, the amount of reflected light entering the reflectance variation factor layer is reduced. In addition, the variation of the entire reflectance is suppressed to increase the anti-reflection effect.

【0007】[0007]

【発明が解決しようとする課題】従来技術の特開平5−2
99338 号では、下層からの反射が最大となる条件下での
反射防止膜条件を求めていることから、ここで求められ
る反射防止膜は吸収型となる。このため、反射防止膜が
必要以上に厚膜であるなど過度の反射防止を行う膜条件
が設定される可能性がある。また、構造としてはレジス
トのすぐ下に反射防止膜を置く場合に限定される。
Problems to be Solved by the Invention Japanese Patent Laid-Open No. 5-2 of the prior art
In 99338, the antireflection film condition under the condition that the reflection from the lower layer is maximized is obtained, and thus the antireflection film obtained here is of the absorption type. For this reason, there is a possibility that a film condition for performing excessive antireflection, such as an antireflection film having an unnecessarily thick film, may be set. Further, the structure is limited to the case where an antireflection film is placed immediately below the resist.

【0008】一方、特開平6−196400 号では、反射防止
膜を必要とする下地基板構造に変動がある場合について
は記載がない。実デバイスでは基板上に段差があり、そ
の上に堆積される膜の厚さには変動が生じる。また、平
坦基板上であっても、プロセス起因の膜厚ばらつきが存
在する。このため、ある仕様の膜構造についてのみ反射
防止膜の最適条件を設定しても、段差/プロセスに起因
して仕様と異なる膜構成となってしまう箇所では反射防
止の役をなさない場合がある。
On the other hand, JP-A-6-196400 does not describe a case where there is a change in the structure of a base substrate requiring an antireflection film. In an actual device, there is a step on the substrate, and the thickness of a film deposited thereon fluctuates. Further, even on a flat substrate, there is a variation in film thickness due to the process. For this reason, even if the optimum condition of the antireflection film is set only for the film structure of a certain specification, there is a case where the antireflection function does not play a role where the film configuration is different from the specification due to the step / process. .

【0009】さらに、上記2つの従来例に掲載されてい
るいずれの技術も反射防止膜自体のプロセス変動につい
ては考慮されていない。すなわち、反射防止膜成膜時の
膜厚変動、光学定数変動を加味して反射防止膜の最適化
を行っていない。
Further, none of the techniques disclosed in the above two conventional examples takes into account the process variation of the antireflection film itself. That is, the antireflection film is not optimized in consideration of the film thickness variation and the optical constant variation at the time of forming the antireflection film.

【0010】また、特開平7−273010 号にある反射防止
膜は、デバイス中に残ることになり、反射防止膜がその
直下の膜に対して悪影響を及ぼす可能性があるが、その
対策が取られていない。
The anti-reflection film disclosed in Japanese Patent Application Laid-Open No. 7-273010 remains in the device, and the anti-reflection film may adversely affect the film immediately below the anti-reflection film. Not been.

【0011】本発明の第一の課題は、下層の膜構造の変
動、及び反射防止膜のプロセス変動も含めて最適な反射
防止膜条件を選定する反射防止膜条件決定方法を提供す
ることにある。
A first object of the present invention is to provide an anti-reflection film condition determining method for selecting an optimum anti-reflection film condition including a change in a film structure of a lower layer and a process fluctuation of an anti-reflection film. .

【0012】また、本発明の第2の課題は、反射防止膜
の被加工層への影響を排除したレジストパターン形成方
法を提供することにある。
A second object of the present invention is to provide a method of forming a resist pattern which eliminates the influence of an antireflection film on a layer to be processed.

【0013】[0013]

【課題を解決するための手段】上記第一の課題は、以下
の手順により反射防止膜の光学定数と膜厚を最適化する
ことにより解決される。(1)被加工膜/基板の光学定
数,膜厚及び膜厚変動量を入力する。(2)反射防止膜
の光学定数変動量と膜厚変動量を入力する。(3)反射
防止膜の設定光学定数と設定膜厚を任意に定める。
(4)下層の膜厚を(1)で入力した変動量内で変化さ
せ、かつ反射防止膜の光学定数と膜厚について(3)で
定めた設定値から(2)で入力した変動量内で変化させ
てレジストへの反射率を計算し、これらの変動量内での
最大反射率、即ちプロセス変動量を考慮したワーストケ
ースの反射率を求める。(5)上記(3),(4)を繰り
返し、ワーストケースの反射率が最小となる反射防止膜
の光学定数と膜厚を選定する。
The above first object is solved by optimizing the optical constant and the film thickness of the antireflection film according to the following procedure. (1) Input the optical constant, film thickness and film thickness variation of the film / substrate to be processed. (2) Input the optical constant fluctuation amount and the film thickness fluctuation amount of the antireflection film. (3) The set optical constant and the set film thickness of the antireflection film are arbitrarily determined.
(4) The thickness of the lower layer is changed within the variation input in (1), and the optical constant and the thickness of the antireflection film are set within the variation input in (2) from the set values determined in (3). , The reflectance to the resist is calculated, and the maximum reflectance within these variations, that is, the worst case reflectance in consideration of the process variation is obtained. (5) The above (3) and (4) are repeated to select the optical constant and the film thickness of the antireflection film that minimize the worst-case reflectance.

【0014】また、上記第2の課題は、反射防止膜の下
に薄膜を形成することにより解決される。反射防止膜の
下に新たな膜を設けるとその膜の膜厚変動が、レジスト
への反射率変動の要因となることが考えられる。しか
し、薄膜であれば膜厚変動量は極めて小さく抑えること
ができ、レジストへの反射率の変動要因とはなりにく
い。
[0014] The second problem can be solved by forming a thin film under the antireflection film. When a new film is provided under the anti-reflection film, a change in the thickness of the film may cause a change in the reflectance of the resist. However, if the film is a thin film, the amount of change in the film thickness can be suppressed to a very small value, and the change in the reflectivity to the resist hardly occurs.

【0015】[0015]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

(実施例1)この実施例は、ポリSiゲート加工用のレ
ジストパターンをi線露光装置で形成する場合の反射防
止膜条件決定に適用したものである。図1に反射防止条
件決定方法のフローチャートを示す。
(Embodiment 1) This embodiment is applied to determination of antireflection film conditions when a resist pattern for processing a poly-Si gate is formed by an i-line exposure apparatus. FIG. 1 shows a flowchart of the antireflection condition determination method.

【0016】まず、下層構造入力部1で被加工膜を含め
た各層の光学定数,膜厚、及び膜厚変動量を入力する。
さらに、反射防止膜変動量入力部2で反射防止膜形成プ
ロセス上の変動量、例えば、光学定数変動量,膜厚変動
量等を入力する。各変動量は、膜の形成プロセスによる
ウェハ内,ウェハ間の変動量等である。
First, an optical constant, a film thickness, and a film thickness variation amount of each layer including a film to be processed are inputted in a lower layer structure input section 1.
Further, an antireflection film variation input unit 2 inputs a variation in the antireflection film forming process, such as an optical constant variation and a film thickness variation. Each variation is a variation within a wafer or between wafers due to a film forming process.

【0017】次に、反射防止膜の任意の光学定数と任意
の膜厚について以下の計算を繰り返す(反射防止膜条件
ループ7)。すなわち、入力された変動量内で下層構造
の膜厚,反射防止膜の膜厚/光学定数を変化させて(変
動量ループ8)、反射率を求める(反射率計算部3)。
このうち最大反射率をここで仮定した反射防止膜の光学
定数と膜厚でのワーストケース反射率とする(ワースト
ケース反射率計算部4)。ワーストケース反射率を種々
の反射防止膜光学定数,膜厚について求めて、ワースト
ケース反射率が低くなる条件を反射防止膜の最適光学定
数と膜厚とする(最適条件選定5)。
Next, the following calculation is repeated for an arbitrary optical constant and an arbitrary film thickness of the antireflection film (antireflection film condition loop 7). That is, the film thickness of the lower layer structure and the film thickness / optical constant of the antireflection film are changed within the input fluctuation amount (variation amount loop 8), and the reflectance is obtained (reflectance calculation unit 3).
Among them, the maximum reflectance is defined as the worst-case reflectance at the optical constant and the film thickness of the antireflection film assumed here (worst-case reflectance calculator 4). The worst-case reflectance is determined for various antireflection film optical constants and film thicknesses, and conditions under which the worst-case reflectance is reduced are determined as the optimum optical constant and film thickness of the antireflection film (optimum condition selection 5).

【0018】以上の方法を、図2に示すポリSiゲート
加工用のSiON系反射防止膜における最適条件決定に
適用し、ワーストケース反射率を0.1 以下にできる最
も薄膜の反射防止膜条件を求めた。
The above method is applied to the determination of the optimum conditions in the SiON-based antireflection film for processing the poly-Si gate shown in FIG. 2, and the condition of the thinnest antireflection film capable of reducing the worst case reflectance to 0.1 or less is set. I asked.

【0019】被加工膜を含めた層構造は、ゲート酸化膜
22上に被加工膜である200nmのポリSi21と2
00nmのゲート保護酸化膜20がのっている。ゲート
酸化膜22の膜厚は10nmであるが、LOCOS部で
は400nmとなる。また、ポリSi21とその上のゲ
ート保護酸化膜20はそれぞれの仕様に対して±10%
の膜厚変動がプロセス上発生する。
The layer structure including the film to be processed has a 200 nm poly-Si film 21 and 2 to be processed on the gate oxide film 22.
A gate protection oxide film 20 of 00 nm is deposited. The thickness of the gate oxide film 22 is 10 nm, but is 400 nm in the LOCOS portion. Further, the poly Si 21 and the gate protection oxide film 20 thereon are ± 10% of each specification.
The variation in film thickness occurs in the process.

【0020】そこで、下層構造入力部1で、Si基板2
3,ゲート酸化膜22,ポリSi21,ゲート保護酸化膜
20の光学定数としてそれぞれ6.5−2.61i,1.
51−0.0i,3.9−2.66i,1.51−0.0i
を入力した。また、ゲート酸化膜22,ポリSi21,
ゲート保護酸化膜20の膜厚と膜厚変動量は、それぞれ
10nm+390nm,200nm±20nm,200
nm±20nmとした。反射防止膜変動量入力部2で入
力した値は、反射防止膜の光学定数のウェハ内均一性は
非常に良いので光学定数変動量は0とし、膜厚変動量を
設定膜厚に対して±10%とした。
Therefore, in the lower layer structure input section 1, the Si substrate 2
3, 6.5-2.61i and 1.1.6 as the optical constants of the gate oxide film 22, the poly-Si 21 and the gate protection oxide film 20, respectively.
51-0.0i, 3.9-2.66i, 1.51-0.0i
Was entered. Further, the gate oxide film 22, poly-Si 21,
The thickness of the gate protection oxide film 20 and the thickness variation amount are 10 nm + 390 nm, 200 nm ± 20 nm, 200 nm, respectively.
nm ± 20 nm. Since the uniformity of the optical constant of the anti-reflection film in the wafer is very good, the value input in the anti-reflection film variation input unit 2 is 0, and the optical constant variation is 0, and the film thickness variation is ± 10%.

【0021】次に、図13に示すようなゲート保護酸化
膜20の上に設けた反射防止膜24の種々の光学定数と
膜厚の組み合わせについて、ワーストケース反射率計算
部4でレジスト25への最大反射率を求めた。ここで、
反射防止膜の光学定数の範囲は、SiON系膜の取りう
る範囲であるnが1.8から3.8,kが0.0から−1.
9 までとした。
Next, a combination of various optical constants and film thicknesses of the antireflection film 24 provided on the gate protection oxide film 20 as shown in FIG. The maximum reflectance was determined. here,
The range of the optical constant of the antireflection film is 1.8 to 3.8 and k is 0.0 to -1.
9

【0022】反射防止膜の設定膜厚10nm毎に反射防
止膜光学定数に対するワーストケース反射率の等高線を
図3に示す。各光学定数毎に求められた反射率は、ゲー
ト酸化膜厚,ポリSi膜厚,ゲート保護酸化膜厚,反射
防止膜膜厚がそれぞれの範囲で変動したときの最大反射
率を表している。最適条件選定5で、図3の中からワー
ストケース反射率が0.1 以下となる条件のうち、最も
薄膜である光学定数2.5−0.6i膜厚70nmを最適
反射防止膜条件とした。
FIG. 3 shows a contour line of the worst case reflectance with respect to the optical constant of the antireflection film for each set film thickness of the antireflection film of 10 nm. The reflectance determined for each optical constant represents the maximum reflectance when the gate oxide film thickness, the poly-Si film thickness, the gate protection oxide film thickness, and the antireflection film thickness vary within the respective ranges. In the optimum condition selection 5, among the conditions where the worst case reflectivity is 0.1 or less from FIG. 3, the optical constant of 2.5 to 0.6i, which is the thinnest film, and a film thickness of 70 nm was set as the optimum antireflection film condition. .

【0023】この条件を満たす膜をゲート保護酸化膜2
0上にプラズマCVDで堆積し、ポジ型レジストip3
300(東京応化製)を塗布した。波長365nm,N
A0.6,σ0.6の縮小投影露光装置で0.4μmライ
ンアンドスペース(L/S)マスクを用いて露光し、6
0秒現像した場合のレジスト膜厚に対する寸法(スウィ
ングカーブ)を図4に示す。図4(a)は反射防止膜の
ない場合、図4(b)は反射防止膜のある場合で、入力
膜厚変動内で反射率が最大と最小になる条件についての
スウィングカーブを表している。反射防止膜のない場合
のスウィング幅が87nmなのに対し、反射防止膜のあ
る場合には34nmに低減でき、ゲート寸法ばらつきが
少ないため良好なデバイスを得ることができた。
A film satisfying this condition is formed as a gate protection oxide film 2
And a positive resist ip3
300 (manufactured by Tokyo Ohka) was applied. 365 nm wavelength, N
Exposure was performed using a 0.4 μm line and space (L / S) mask with a reduction projection exposure apparatus of A0.6, σ0.6, and
FIG. 4 shows the dimension (swing curve) with respect to the resist film thickness when developed for 0 second. FIG. 4 (a) shows the case where the antireflection film is not provided, and FIG. 4 (b) shows the case where the antireflection film is provided. . While the swing width without the anti-reflection film was 87 nm, when the anti-reflection film was provided, the swing width could be reduced to 34 nm, and a good device could be obtained because of little gate dimensional variation.

【0024】(実施例2)ここでは、実施例1と同じ構
造において、反射率変動要因層を特定して反射防止膜の
最適化を行う方法について述べる。
(Embodiment 2) Here, a method for optimizing an antireflection film by specifying a reflectance variation factor layer in the same structure as in Embodiment 1 will be described.

【0025】図5にフローを示す。まず、実施例1と同
様に下層構造入力部1で被加工膜を含めた各層の光学定
数,膜厚、及び膜厚変動量を入力する。次に、反射防止
膜がない状態でどの膜の膜厚変動がレジストへの反射率
変動要因となっているかを反射率変動要因層特定部6で
求める。この反射率変動要因層の下に反射防止膜を設け
るように層構造を決める(層構造決定部9)。以下、実
施例1のフローと同様に反射率計算部3,ワーストケー
ス反射率計算部4の処理を繰り返し、最適条件選定5で
反射防止膜の最適光学定数と膜厚を求める。
FIG. 5 shows the flow. First, as in the first embodiment, the optical constant, the film thickness, and the film thickness variation of each layer including the film to be processed are input in the lower layer structure input unit 1. Next, the reflectance variation factor layer specifying unit 6 determines which film thickness variation causes the reflectance variation to the resist without the antireflection film. The layer structure is determined so that an anti-reflection film is provided below the reflectivity variation factor layer (layer structure determining unit 9). Thereafter, the processes of the reflectance calculator 3 and the worst-case reflectance calculator 4 are repeated in the same manner as in the flow of the first embodiment, and the optimum optical constant and the film thickness of the antireflection film are obtained by the optimum condition selection 5.

【0026】以上の方法を、実施例1と同じ構造に適用
し、ワーストケース反射率が0.1以下とできる薄膜の
反射防止膜条件を求めた。
The above method was applied to the same structure as in Example 1, and the antireflection film conditions for a thin film capable of making the worst-case reflectance 0.1 or less were obtained.

【0027】まず、下層構造入力部1により下層構造の
光学定数と膜厚,膜厚変動量(Si基板,ゲート酸化
膜,ポリSi,ゲート保護酸化膜の各光学定数として
6.5−2.61i ,1.51−0.0i,3.9−2.6
6i,1.51−0.0i,各膜厚とその変動量として1
0nm+390nm,200nm±20nm,200n
m±20nm)を入力した。次に、反射防止膜のない図
14の構造で、入力した変動内で膜厚を変化させてレジ
スト25への反射率計算を行い、どの膜厚変動が反射率
変動の要因となっているかを求めた(反射率変動要因層
特定部6)。その結果を図6に示す。ポリSi膜が20
0nm±10%,ゲート酸化膜がゲート下の10nmか
らLOCOS部の400nmまで変化してもレジストへ
の反射率は0.39 と一定になっている。一方、ゲート
保護酸化膜が180nmから220nmまで変動すると
反射率は0.41から0.34まで変化している。そこ
で、層構造決定部9で、ゲート保護酸化膜20の下に反
射防止膜24を設けた図15のような構造を決めた。
First, the lower layer structure input unit 1 uses the lower layer structure optical constant, film thickness, and film thickness variation (as the optical constants of the Si substrate, gate oxide film, poly-Si, and gate protection oxide film as 6.5-2. 61i, 1.51-0.0i, 3.9-2.6
6i, 1.51-0.0i, each film thickness and its variation amount were 1
0 nm + 390 nm, 200 nm ± 20 nm, 200 n
m ± 20 nm). Next, in the structure of FIG. 14 having no antireflection film, the reflectivity to the resist 25 is calculated by changing the film thickness within the input fluctuation, and it is determined which film thickness fluctuation is a factor of the reflectivity fluctuation. (Reflectance variation factor layer specifying unit 6). FIG. 6 shows the result. 20 poly-Si film
The reflectivity to the resist is constant at 0.39 even if the gate oxide film changes from 10 nm below the gate to 400 nm in the LOCOS part, at 0 nm ± 10%. On the other hand, when the gate protection oxide film changes from 180 nm to 220 nm, the reflectance changes from 0.41 to 0.34. Therefore, the structure shown in FIG. 15 in which the antireflection film 24 is provided under the gate protection oxide film 20 is determined by the layer structure determination unit 9.

【0028】次に、反射防止膜変動量入力部2で、反射
防止膜の光学定数変動量を0、膜厚変動量を設定膜厚に
対して±10%と入力し、反射率変動要因層であるゲー
ト保護酸化膜20と反射防止膜24の膜厚変動量を考慮
した反射率計算3を行い、ワーストケース反射率を得
た。図7に、反射防止膜厚10nm毎に反射防止膜光学
定数に対するワーストケース反射率の等高線図を示す。
各光学定数の反射率は、ゲート保護酸化膜が200nm
±10%,反射防止膜厚が設定膜厚に対して±10%変化
した時の最大反射率を表している。図7の中より、最適
反射防止膜条件として光学定数2.6−0.3i,膜厚3
0nmを最適条件選定部5で選んだ。
Next, in the antireflection film variation input section 2, the optical constant variation of the antireflection film is input as 0, and the thickness variation as ± 10% with respect to the set film thickness. The reflectance calculation 3 was performed in consideration of the thickness variation of the gate protective oxide film 20 and the antireflection film 24, and the worst case reflectance was obtained. FIG. 7 shows a contour map of the worst case reflectance with respect to the optical constant of the antireflection film for every 10 nm of the antireflection film thickness.
The reflectance of each optical constant is 200 nm for the gate protective oxide film.
It shows the maximum reflectance when the anti-reflection film thickness changes by ± 10% with respect to the set film thickness. From FIG. 7, as the optimum anti-reflection film conditions, an optical constant of 2.6-0.3i and a film thickness of 3 were obtained.
0 nm was selected by the optimum condition selection unit 5.

【0029】この条件を満たすSiON系の反射防止膜
24をポリSi21上にプラズマCVDで堆積し、その
上にゲート保護酸化膜20を200nm堆積し、さらに
ポジ型レジストip3300(東京応化製)を塗布し
た。波長365nm,NA0.6,σ0.6の縮小投影露
光装置で0.4μmL/S マスクを用いて露光し、6
0秒現像した場合のレジスト膜厚に対する寸法(スウィ
ングカーブ)を図8に示す。図8(a)は反射防止膜の
ない場合、図8(b)は反射防止膜のある場合である。
反射防止膜のないスウィング幅が87nmなのに対し、
反射防止膜のある場合には20nmに低減でき、ゲート
寸法ばらつきが少ないため良好なデバイスを得ることが
できた。
An SiON-based antireflection film 24 satisfying the above conditions is deposited on the poly-Si 21 by plasma CVD, a gate protection oxide film 20 is deposited thereon to a thickness of 200 nm, and a positive resist ip3300 (Tokyo Ohka) is applied. did. Exposure was performed using a 0.4 μmL / S mask with a reduction projection exposure apparatus having a wavelength of 365 nm, NA of 0.6 and σ of 0.6, and
FIG. 8 shows the dimension (swing curve) with respect to the resist film thickness when developed for 0 second. FIG. 8A shows the case without the anti-reflection film, and FIG. 8B shows the case with the anti-reflection film.
While the swing width without an anti-reflection film is 87 nm,
In the case where an anti-reflection film was provided, the thickness could be reduced to 20 nm, and a good device could be obtained because of small variations in gate dimensions.

【0030】(実施例3)実施例3では、実施例2と同
様に反射率変動要因層を特定してその下に反射防止膜を
設け、さらに反射防止膜の下にゲート材料保護のための
薄膜を形成する場合について述べる。
(Embodiment 3) In Embodiment 3, as in Embodiment 2, a reflectance variation factor layer is specified, an anti-reflection film is provided thereunder, and further under the anti-reflection film for protecting a gate material. The case of forming a thin film will be described.

【0031】対象としたゲート構造は、図9に示すよう
に50nm厚のポリSi21と120nm厚のWSi26
の2層ゲートの上に200nmのSiN27がのってい
る構造で、露光に用いたのは波長248nmのKrFエ
キシマレーザである。
As shown in FIG. 9, the target gate structure is a poly-Si 21 having a thickness of 50 nm and a WSi 26 having a thickness of 120 nm.
In this structure, a 200 nm SiN 27 is mounted on the two-layer gate, and a 248 nm wavelength KrF excimer laser is used for exposure.

【0032】まず、下層構造入力部1にて、Si基板2
3,ゲート酸化膜22,ポリSi21,WSi26,Si
N27の各膜の光学定数として1.57−3.57i,1.
51−0.0i,1.68−2.76i,2.25−2.8
3i,2.28−0.01i を入力した。膜厚及び膜厚
変動量は、ゲート酸化膜22がゲート部からLOCOS
にかけて10nmから400nmになっており、他は仕
様膜厚に対して±10%の変動がある。
First, in the lower layer structure input unit 1, the Si substrate 2
3, gate oxide film 22, poly Si21, WSi26, Si
The optical constants of each film of N27 are 1.57-3.57i, 1.
51-0.0i, 1.68-2.76i, 2.25-2.8
3i, 2.28-0.01i. The film thickness and the amount of change in film thickness are determined as follows.
From 10 nm to 400 nm, and the others have a variation of ± 10% with respect to the specified film thickness.

【0033】次に、図16の反射防止膜のない状態で入
力した変動内で膜厚を変化させ、レジスト25への反射
率計算を行い、どの膜厚変動が反射率変動の要因となっ
ているかを求めた(反射率変動要因層特定部6)。その
結果を図10に示す。レジスト25への反射率の変動要
因となっているのはSiN27膜のみだったので、この
膜の下に反射防止膜を設けることとした。しかし、この
構造ではデバイス中に反射防止膜が残ることとなり、W
Si26膜への悪影響が懸念されるので、反射防止膜2
4の下に絶縁性の薄膜として10nmの酸化膜28を設
けた図11のような構造を、層構造設定部9で設定し
た。
Next, the film thickness is changed within the fluctuation input without the anti-reflection film shown in FIG. 16, and the reflectance to the resist 25 is calculated. (Reflectance variation factor layer specifying unit 6). The result is shown in FIG. Since only the SiN27 film caused the change in the reflectance of the resist 25, an antireflection film was provided under this film. However, in this structure, an antireflection film remains in the device, and W
The antireflection film 2 may be adversely affected on the Si26 film.
A structure as shown in FIG. 11 in which a 10 nm oxide film 28 was provided as an insulating thin film underneath 4 was set by the layer structure setting section 9.

【0034】この構造で、実施例2と同様に反射防止膜
の最適化を行った。ワーストケースの反射率を求める際
には、この反射防止膜下に挿入した酸化膜28の膜厚変
動量10nm±10%も考慮した。その結果を示す図1
2より、最適反射防止膜条件として光学定数2.35−
0.9i,膜厚20nmを選んだ。
With this structure, the antireflection film was optimized as in the second embodiment. In determining the worst case reflectivity, the thickness variation of 10 nm ± 10% of the oxide film 28 inserted under the antireflection film was also considered. FIG. 1 showing the result
From 2, it can be seen that the optical constant is 2.35-
0.9i and a film thickness of 20 nm were selected.

【0035】ゲート酸化膜22上に、50nmのポリS
i21,120nmのWSiを順次堆積させ、さらに1
0nmの酸化膜28と上記で得られた条件を満たす光学
定数のSiON系反射防止膜24を30nm、その上に
SiN27を200nm形成し、レジストパターニング
後ゲートを作成したところ、ゲート寸法ばらつきが少な
い良好なデバイスを得ることができた。また、デバイス
中に残された反射防止膜もデバイス特性に影響を与える
ことがなかった。
On the gate oxide film 22, a 50 nm poly-S
i21, 120 nm WSi is sequentially deposited, and
An oxide film 28 having a thickness of 0 nm and a SiON-based antireflection film 24 having an optical constant satisfying the conditions obtained above were formed to have a thickness of 30 nm, and a SiN 27 was formed thereon to have a thickness of 200 nm. Device was obtained. Further, the antireflection film left in the device did not affect the device characteristics.

【0036】(実施例4)実施例4では、実施例1と同
じ対象構造、及び反射防止膜条件最適化方法において、
反射防止膜の変動量として光学定数変動量と膜厚変動量
を入力した場合について述べる。
(Embodiment 4) In Embodiment 4, the same target structure and the same antireflection film condition optimization method as those of Embodiment 1 are used.
A case where an optical constant variation and a film thickness variation are input as the variation of the antireflection film will be described.

【0037】ここで用いた反射防止膜形成装置では、ウ
ェハ内,ウェハ間の光学定数均一性がnについては±
0.1、kについては±0.15であり、また、膜厚変動
量は設定膜厚に対して±10%であった。そこで、図1
の反射防止膜条件最適化フローの反射防止膜変動量入力
部2において、反射防止膜光学定数変動量をnを±0.1,
kを±0.15 ,膜厚変動量を±10%と入力した。実
施例1と同様にワーストケース反射率を反射防止膜の種
々の膜厚及び光学定数について求めたところ、図17の
結果を得た。最適条件選定5で、図17の中からワース
トケース反射率が0.1 以下となる条件のうち、最も薄
膜である光学定数2.2−0.7i,膜厚80nmを最適
反射防止膜条件とした。
In the antireflection film forming apparatus used here, the uniformity of the optical constants within the wafer and between the wafers is ±±.
0.1 and k were ± 0.15, and the variation in film thickness was ± 10% with respect to the set film thickness. Therefore, FIG.
In the antireflection film fluctuation amount input section 2 of the antireflection film condition optimization flow of FIG.
k was input as ± 0.15, and the film thickness variation was input as ± 10%. The worst-case reflectance was determined for various thicknesses and optical constants of the antireflection film in the same manner as in Example 1, and the results in FIG. 17 were obtained. In the optimum condition selection 5, the worst case reflectivity of 0.1 or less in FIG. 17 is set as the optimum anti-reflection film condition with the optical constant of 2.2-0.7i and the film thickness of 80 nm being the thinnest. did.

【0038】この条件を仕様として、反射防止膜を堆積
し、レジストの塗布,露光,現像を行ったところ、反射
防止膜光学定数変動がないと仮定して得た最適条件を仕
様とした場合よりも寸法変動量を小さくすることができ
た。
Under these conditions, an anti-reflection film was deposited, resist was applied, exposed, and developed. As a result, the optimum conditions obtained on the assumption that there was no change in the optical constant of the anti-reflection film were used. Also, the dimensional variation could be reduced.

【0039】[0039]

【発明の効果】本発明によれば、対象層構造のプロセス
変動、及び反射防止膜自体のプロセス変動を考慮して反
射防止膜条件の最適化をすることができる。
According to the present invention, it is possible to optimize the conditions of the antireflection film in consideration of the process variation of the target layer structure and the process variation of the antireflection film itself.

【0040】また、透明な被加工膜下に反射防止膜とそ
の下に薄膜を設けることにより、反射防止効果が大き
く、かつ、デバイス中に残る反射防止膜がデバイス特性
に影響を与えないようにすることができる。
Further, by providing an anti-reflection film under a transparent film to be processed and a thin film thereunder, the anti-reflection effect is large and the anti-reflection film remaining in the device does not affect the device characteristics. can do.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施例1の反射防止膜最適方法の流れを示すフ
ローチャート。
FIG. 1 is a flowchart showing a flow of an antireflection film optimizing method according to a first embodiment.

【図2】実施例1,2で対象としたデバイス積層構造の
断面図。
FIG. 2 is a cross-sectional view of a device stack structure according to the first and second embodiments.

【図3】実施例1において最適反射防止膜条件を求める
ために計算したレジストへの反射率の等高線図。
FIG. 3 is a contour diagram of the reflectivity to a resist calculated for obtaining an optimum antireflection film condition in Example 1.

【図4】実施例1において反射防止膜の有無によるレジ
スト寸法制御性を比較する図。
FIG. 4 is a diagram comparing resist dimensional controllability depending on the presence or absence of an antireflection film in Example 1.

【図5】実施例2の反射防止膜最適方法の流れを示すフ
ローチャート。
FIG. 5 is a flowchart showing the flow of an antireflection film optimization method according to a second embodiment.

【図6】下層の膜厚変動に対する反射率変動を表す図。FIG. 6 is a diagram illustrating a change in reflectance with respect to a change in film thickness of a lower layer.

【図7】実施例2において最適反射防止膜条件を求める
ために計算したレジストへの反射率の等高線図。
FIG. 7 is a contour diagram of the reflectivity to a resist calculated for obtaining the optimum anti-reflection film conditions in Example 2.

【図8】実施例2において反射防止膜の有無によるレジ
スト寸法制御性を比較する図。
FIG. 8 is a diagram comparing resist dimensional controllability depending on the presence or absence of an antireflection film in Example 2.

【図9】実施例3で対象としたデバイス積層構造の断面
図。
FIG. 9 is a cross-sectional view of a device stack structure targeted in Example 3.

【図10】下層の膜厚変動に対する反射率変動を表す
図。
FIG. 10 is a diagram illustrating a change in reflectance with respect to a change in thickness of a lower layer.

【図11】実施例3で設定した積層構造を表す断面図。FIG. 11 is a sectional view illustrating a laminated structure set in a third embodiment.

【図12】実施例3において最適反射防止膜条件を求め
るために計算したレジストへの反射率の等高線図。
FIG. 12 is a contour diagram of the reflectivity to a resist calculated for obtaining the optimum antireflection film conditions in Example 3.

【図13】実施例1でワーストケース反射率計算に用い
た積層構造の断面図。
FIG. 13 is a cross-sectional view of a laminated structure used for worst-case reflectance calculation in the first embodiment.

【図14】実施例2で反射率変動要因層を特定する時に
用いた積層構造の断面図。
FIG. 14 is a cross-sectional view of a laminated structure used when specifying a reflectance variation factor layer in the second embodiment.

【図15】実施例2の層構造決定で決めた積層構造の断
面図。
FIG. 15 is a sectional view of a layered structure determined by the layer structure determination in the second embodiment.

【図16】実施例3で反射率変動要因層を特定する時に
用いた積層構造の断面図。
FIG. 16 is a cross-sectional view of a laminated structure used when specifying a reflectance variation factor layer in the third embodiment.

【図17】実施例4において最適反射防止膜条件を求め
るために計算したレジストへの反射率の等高線図。
FIG. 17 is a contour diagram of the reflectivity to the resist calculated in order to determine the optimum antireflection film conditions in Example 4.

【符号の説明】[Explanation of symbols]

1…下層構造入力部、2…反射防止膜変動量入力部、3
…反射率計算部、4…ワーストケース反射率計算部、5
…最適条件選定部、6…反射率変動要因層特定部、7…
反射防止膜条件ループ、8…変動量ループ、9…層構造
設定部、20…ゲート保護酸化膜、21…ポリSi、2
2…ゲート酸化膜、23…Si基板、24…反射防止
膜、25…レジスト、26…WSi、27…SiN、2
8…酸化膜。
Reference numeral 1 denotes a lower layer structure input unit; 2 denotes an antireflection film change amount input unit;
... Reflectance calculator, 4 ... Worst case reflectivity calculator, 5
... Optimum condition selection unit, 6 ... Reflectance variation factor layer identification unit, 7 ...
Antireflection film condition loop, 8: variation loop, 9: layer structure setting unit, 20: gate protection oxide film, 21: poly Si, 2
2: gate oxide film, 23: Si substrate, 24: antireflection film, 25: resist, 26: WSi, 27: SiN, 2
8 ... oxide film.

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】基板上に積層した被加工膜上の感光膜にエ
ネルギ線を部分的に照射して上記感光膜内に潜像を形成
する微細加工の、上記被加工膜及びその下の少なくとも
一層からなる基板の光学定数、膜厚及び膜厚変動量を設
定する下層構造入力工程と、反射防止膜形成プロセス上
の光学定数変動量、膜厚変動量の少なくとも一つを入力
する反射防止膜変動量入力工程と、上記下層構造入力工
程と反射防止膜変動量入力工程で得られた膜厚変動量お
よび光学定数変動量を考慮して上記感光膜への反射率計
算をすることにより反射防止膜の光学定数及び膜厚を最
適化する反射防止膜条件最適化工程を含むことを特徴と
する反射防止膜条件決定方法。
1. A fine processing for forming a latent image in a photosensitive film by partially irradiating an energy beam to a photosensitive film on a film to be processed laminated on a substrate, and at least a part below the film to be processed. A lower layer structure input step of setting an optical constant, a film thickness, and a film thickness variation of a single-layer substrate; and an antireflection film for inputting at least one of an optical constant variation, a film thickness variation in an antireflection film forming process. Antireflection by calculating the reflectance to the photosensitive film in consideration of the film thickness fluctuation amount and the optical constant fluctuation amount obtained in the fluctuation amount input step, the lower layer structure input step, and the antireflection film fluctuation amount input step. An anti-reflection film condition determining method including an anti-reflection film condition optimization step of optimizing an optical constant and a film thickness of the film.
【請求項2】請求項1において、下層膜厚変動により感
光膜への反射率が変化する層を特定する反射率変動要因
層特定工程を含むことを特徴とする反射防止膜条件決定
方法。
2. A method according to claim 1, further comprising the step of specifying a layer in which the reflectance to the photosensitive film changes due to a change in the thickness of the lower layer.
【請求項3】請求項2において、反射防止膜を反射率を
変化させる層の下に設けることを特徴とする反射防止膜
条件決定方法。
3. The method according to claim 2, wherein the antireflection film is provided below the layer that changes the reflectance.
【請求項4】請求項3に記載の反射防止膜の下に薄膜を
設けて反射防止膜の最適化を行うことを特徴とする反射
防止膜条件決定方法。
4. A method for determining anti-reflection film conditions, comprising optimizing an anti-reflection film by providing a thin film under the anti-reflection film according to claim 3.
【請求項5】請求項1において反射防止膜を被加工層の
上に設けることを特徴とする反射防止膜条件決定方法。
5. A method according to claim 1, wherein an anti-reflection film is provided on the layer to be processed.
【請求項6】請求項1に記載の被加工膜及びその下の層
の膜厚変動量は、下地の基板段差による変動量と膜堆積
時のプロセス変動による変動量の少なくとも一つを含む
ことを特徴とする反射防止膜条件決定方法。
6. The film thickness variation of the film to be processed and the layer under the film according to claim 1 includes at least one of a variation due to a step difference of an underlying substrate and a variation due to a process variation during film deposition. A method for determining conditions of an antireflection film, characterized by the following.
【請求項7】基板上に積層した被加工層上の感光膜にエ
ネルギ線を部分的に照射して上記感光膜内に潜像を形成
するレジストパターン形成方法において、上記感光膜よ
りも下に反射防止膜を設け、さらに上記反射防止膜の下
に薄膜を設けることを特徴とするレジストパターン形成
方法。
7. A resist pattern forming method for forming a latent image in a photosensitive film by partially irradiating a photosensitive film on a layer to be processed laminated on a substrate with an energy beam. A method of forming a resist pattern, comprising: providing an antireflection film; and further providing a thin film under the antireflection film.
【請求項8】請求項7に記載の反射防止膜は、被加工層
積層時の膜厚変動により感光膜への反射率が変化する層
のうち一番下にある層の下に設けることを特徴とするレ
ジストパターン形成方法。
8. The antireflection film according to claim 7, wherein the antireflection film is provided below a lowermost layer of the layers whose reflectivity to the photosensitive film changes due to a change in film thickness when the layers to be processed are laminated. Characteristic method of forming a resist pattern.
【請求項9】請求項7記載の反射防止膜は、被加工層の
最上層の上に設けたことを特徴とするレジストパターン
形成方法。
9. A method for forming a resist pattern, wherein the antireflection film according to claim 7 is provided on the uppermost layer of the layer to be processed.
【請求項10】基板上に積層した被加工層上の感光膜に
エネルギ線を部分的に照射して上記感光膜内に潜像を形
成する微細加工装置において、上記被加工膜及びその下
の少なくとも一層からなる基板の光学定数,膜厚及び膜
厚変動量を設定する下層構造入力手段と、反射防止膜形
成プロセス上の光学定数変動量,膜厚変動量の少なくと
も一つを入力する反射防止膜変動量入力手段と、上記下
層構造入力手段と反射防止膜変動量手段工程と考慮した
上記感光膜への反射率計算によって反射防止膜の光学定
数及び膜厚を最適化する反射防止膜条件最適化手段を含
むことを特徴とする反射防止膜条件決定装置。
10. A microfabrication apparatus for forming a latent image in a photosensitive film by partially irradiating an energy beam on a photosensitive film on a layer to be processed laminated on a substrate. Lower layer structure input means for setting the optical constant, film thickness and film thickness variation of at least one substrate, and antireflection inputting at least one of the optical constant variation and film thickness variation in the antireflection film forming process Optimal antireflection film conditions for optimizing the optical constant and film thickness of the antireflection film by calculating the reflectance to the photosensitive film in consideration of the film fluctuation amount input means, the lower layer structure input means, and the antireflection film fluctuation amount means step. An antireflection film condition determining apparatus, comprising:
JP7498497A 1997-03-27 1997-03-27 Method for determining condition of antireflective film and formation of resist pattern using it Pending JPH10270329A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7498497A JPH10270329A (en) 1997-03-27 1997-03-27 Method for determining condition of antireflective film and formation of resist pattern using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7498497A JPH10270329A (en) 1997-03-27 1997-03-27 Method for determining condition of antireflective film and formation of resist pattern using it

Publications (1)

Publication Number Publication Date
JPH10270329A true JPH10270329A (en) 1998-10-09

Family

ID=13563066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7498497A Pending JPH10270329A (en) 1997-03-27 1997-03-27 Method for determining condition of antireflective film and formation of resist pattern using it

Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916749B2 (en) 2002-10-31 2005-07-12 Renesas Technology Corp. Method of manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916749B2 (en) 2002-10-31 2005-07-12 Renesas Technology Corp. Method of manufacturing semiconductor device

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