JPH10257017A - Sliding correlator and its synchronization method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a sliding correlator and its synchronization method by which a synchronization state is attained at a high speed with a simple configuration. SOLUTION: At first switches 25, 26 are thrown to the position (b) to give input data (a) to a shift register 19, a correlation arithmetic section 13 takes correlation the same data (a), and when the shift register 19 are filled by the input data (a), the switches 25, 26 are thrown to the side (a), the arithmetic section 13 takes correlation between a PN code (b) from a PN code generator 12 consisting of the shift register 19 with the input data (a) and when the correlation value reaches a prescribed value Lt or over after the PN code period, a synchronization discrimination section 16 discriminates synchronization and in the case of asynchronization, conventional sliding synchronization is taken.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sliding correlator used for synchronizing a despreading code of an own station with a spread code of an incoming signal in, for example, a spread spectrum communication system, and a synchronization method thereof.

[0002]

2. Description of the Related Art FIG. 8A shows a conventional sliding correlator. Input data from the input terminal 11 is cross-correlated with a PN code from a pseudo-random code (hereinafter referred to as a PN code) generator 12 by a correlation calculator 13. In the correlation operation unit 13, the input data and the PN code are multiplied by the multiplier 14, and the multiplied output is cumulatively added by the adder 15. The output of the correlation operation unit 13 is input to the synchronization determination unit 16, and when the correlation value becomes equal to or more than a predetermined value, it is determined that the PN code is synchronized with the input data. If the correlation value is equal to or less than a predetermined value, it is determined to be asynchronous.

[0003] The determination result of the synchronization determination unit 16 is supplied to a clock control unit 17, which inputs a clock of a clock generator 18 and, in accordance with the determination result of the synchronization determination unit 16, outputs a PN code generator 12. Controls the clock supplied to the The PN code generator 12 is, for example, a shift register 1
For example, the output of the first stage 9 and the output of the last stage of the shift register 19 are added by the adding circuit 21 and fed back to the first stage of the shift register 19, and the output of the adding circuit 21 is output as a PN code from the output terminal 22 to the correlation calculating unit. 13 is also branched and supplied.

The shift register 19 includes a clock control unit 17
The shift control is performed by the clock from. If it is determined that the clock is asynchronous, the clock supplied to the PN code generator 12 is 1
And the relative phase between the PN code and the input data is 1
The clock is shifted, and the accumulated value of the adder 15 is cleared. If the correlation value does not reach the predetermined value even after the code length (one cycle) of the PN code has elapsed, the synchronization determination unit 16 determines that the correlation is asynchronous.

[0005] The operation of this conventional sliding correlator,
That is, as shown in FIG. 8B, the synchronization method first sets an initial value, usually “+ 1, + 1,... +1”, in the shift register 19 (S ₁ ), and cross-correlates the input data with the PN code (S ₁ ). ₂ ) Based on the correlation value, it is determined whether or not a synchronization state has been established (S ₃ ). If not synchronized, one clock to be supplied to the PN code generator 12 is stopped, that is, clock sliding is performed and the correlation is performed. returns to step S ₂ to reset the value (S _4). When the synchronization is determined, the mode shifts to the synchronization tracking mode.

[0006]

The configuration of the sliding correlator is simple, but the longer the code length, the longer the time until the synchronization state is established. In the worst case, the PN code length (2 ⁿ -1) ² (N is the number of stages of the shift register 19). Although a matched filter can be used for high-speed synchronization, the matched filter has a drawback that when the code length is increased, the circuit scale becomes extremely large.

An object of the present invention is to provide a sliding correlator and a method for synchronizing the sliding correlator which can be synchronized at high speed with a simple configuration.

[0008]

In a sliding correlator according to the present invention, input data from an input terminal is represented by P
A first switch for switching to the feedback code of the shift register of the N code generator and inputting to the shift register; and a second switch for switching to a PN code supplied to the correlation means and supplying input data to the correlation means, The first switch is set to input the input data to the shift register, and the second switch is set to supply the input data to the correlation means. Means are provided so that one switch inputs the feedback code to the shift register and the second switch inputs the PN code to the correlation means, that is, a normal connection state.

According to a second aspect of the present invention, first, input data is input to the shift register of the PN code generator by the number of stages, and during that time, the input data is correlated with the input data instead of the PN code. Is stopped, the input data and the PN code are correlated, and the relative phases of the input data and the PN code are sequentially shifted by one clock and synchronized in an asynchronous state.

According to a third aspect of the present invention, in the method of the present invention, the PN signal is inputted after the input data is further inputted to the shift register.
After one code period has elapsed, it is checked whether the code is synchronous or asynchronous. If it is asynchronous, the input data is input again for the number of shift stages of the shift register, the input data is correlated, and then the input data is shifted. The supply to the register is stopped, and the input data is correlated with the PN code.

According to a fourth aspect of the present invention, the number of times of re-input of the input data to the shift register is counted, and when the value reaches a predetermined number, the relative phase is shifted by one clock to synchronize. Let it.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A shows an embodiment of the first aspect of the present invention, and portions corresponding to those in FIG. 8A are denoted by the same reference numerals. In the present invention, at the first stage of the shift register 19,
A first switch 25 capable of supplying input data of the input terminal 11 instead of the output code of the adder circuit 21 is provided, and a second switch 25 capable of supplying input data instead of the PN code of the correlation operation unit 13 is provided. A switch 26 is provided. The first and second switches 25 and 26 are interlocked, and are normally connected to the fixed contact a side, that is, the output side of the addition circuit 21, and are connected to the fixed contact b side, that is, the input terminal 11 side as necessary. . The first and second switches 25 and 26 are controlled by a switch control signal on a control line 27 from the clock controller 17.

Referring to FIG. 2, the operation of the correlator of FIG. 1A, that is, the synchronization method according to the second aspect of the present invention will be described. First,
The second switches 25 and 26 are connected to the contact b side (S ₁ ), input data from the input terminal 11 is input to the shift register 19 (S ₂ ), and the correlation operation unit 13 calculates the correlation between the two inputs. take (S _3). At this time, the correlation operation unit 13
Then, the correlation between the same input data is obtained. It is checked whether or not the input data is buried in all the shift stages of the shift register 19 (S ₄ ). When all the shift stages become the input data, the first and second switches 25 and 26 are connected to the a side (S ₄ ).
_5), taking the correlation between the PN code from the input data and the PN code generator 12 (S _6), checks whether one period from the start PN codes input to the shift register 19 the input data has elapsed (S ₇ ) When the time has elapsed, the synchronization judgment unit 16 makes a synchronization judgment (S ₈ ). When the synchronization is judged to be out of synchronization, the clock control unit 17 stops one clock supply and adds the adder of the correlation operation unit 13. 15 to clear the return to the step S ₆ (S _9). In other words, the conventional synchronization method is executed in which the relative phase between the input data and the PN code is sequentially shifted by one clock to achieve synchronization. If it is determined that synchronization in step S ₈ proceeds to synchronous tracking mode (S _10).

FIG. 1B shows an example of the state of each part in a specific operation. The shift register 19 has three stages, and one cycle (code length) TPN of the _PN code is 7 clocks. Input data (a) and PN code (b) of the input terminal 11 are both +1 or -1.
Is taken at each clock. The period of the clock (g) supplied from the clock controller 17 to the PN code generator 12 is T _C , and the switch control signal from the clock controller 17 is three clocks from the time t ₁ as shown in (f). During the cycle, the first and second switches 25 and 26 are set to the contact b side. During the three clocks, the same input data is supplied to the correlation calculator 13, so that the output (c) of the multiplier 14 is always +1 and the output (d) of the adder 15 increases by one step. I do.

In this example, no error occurs during transmission of the input data (a). Therefore, first at time t ₂ to the shift register 19 is filled with input data, when the second switches 25 and 26 back to the contact a side, the shift register 1
9, since the generated PN code and the input data have the same phase, the output of the adder 15, that is, the correlation value (d) further increases by one step every clock. When the correlation value (d) exceeds a predetermined level L _t, it is determined by the synchronization state and the synchronization determination unit 11, the output (e) is in a state indicating synchronization from a state indicating asynchronous to the time t _3. In this way, the synchronization state is established in a short time.

FIG. 3 shows the operation when a transmission error occurs in the input data, particularly in the data input to the shift register 19.
The same Roman characters are added to the signals corresponding to FIG. 1B. In this example, the second data in the input data (a) input to the shift register 19 is originally +1 and becomes -1 due to a transmission error. Therefore PN code generated from the PN code generator 12 are different in signal and the phase when the correct input data is received, first, input data at time t ₂ after the second switches 25 and 26 are returned A mismatch between (a) and the PN code (b) occurs, and the output (c) of the multiplier 14 becomes −1. Therefore, _one PN from the time t ₁ at which the input data (a) starts to be input to the shift register 19.
Even if the time t ₄ when code period T _PN elapsed, correlation output (d) are not reach the predetermined level L _t. Therefore, one clock supplied to the PN code generator 12 is removed as shown in the clock (g), the addition value of the adder 15 is reset to zero, and the conventional sliding synchronization operation is performed. In this example, from the time t ₁ when the synchronization acquisition operation is started,
It is determined that synchronization with the fifth clock of the 3PN code period (time t _5), that is, when the synchronization is established.

FIG. 4 shows a processing procedure according to the third embodiment of the present invention. As in the case of FIG. 2, first, the first and second switches 25 and 26 are connected to the b side, the input data is taken into the shift register 19, and the correlation operation is performed (S ₁ , S ₂ ,
S ₃ , S ₄ ) and the first and second switches 2
₅ and 26 are returned to the a side, a correlation operation is performed, and a synchronization determination is performed when one PN code period elapses (S ₅ , S ₆ , S ₇ ,
S ₈ ) is the same as FIG. But step S
If it is determined that the asynchronous performing synchronization determination with _8, and incorporation of the input data to the shift register 19 switches the b side again in the present invention, performs a correlation operation (S _11), the switch 25 and 26 a (S ₁₂ ) and performs a correlation operation to determine whether or not synchronization has occurred when the 1PN code period is reached.
For asynchronous performing sliding synchronous operation for re-correlation operation performed and clear clock lighting correlation value (S _13).

FIG. 5 shows a signal waveform of each part of the specific example in this case.
FIG. 1B and FIG. 3 correspond to FIGS. When the input data (a) is first taken into the shift register 19 as in FIG.
This is the case where the data of the th has received a transmission error. In this case, since it is determined that asynchronously from the time t ₁ that initiated the synchronization acquisition operation with 1PN code period T _PN elapsed time t _4, capture the input data (a) is a shift register 19 again, this time taken Since no error has occurred in the embedded data and no transmission error has occurred in the subsequent input data (a), in the second PN code cycle, as in the case of FIG. synchronization is established at the time t _6. Therefore, the synchronization state is established earlier than in the case shown in FIG.

Therefore, when the synchronization is determined and the operation is asynchronous,
Operation of taking input data into shift register 19 (S ₁₁ )
It is better to do. However, when there are relatively many errors in the input data, the synchronization establishment is delayed. Therefore, it is preferable to count the number of times the input data is fetched into the shift register, and switch to the sliding synchronization operation when this count reaches a predetermined value. That is, FIG. 6 shows the processing procedure. That is, switch 2
5 and 26 are set to the b side, and the input data is
, A correlation operation is performed, the shift register 19 is filled with the input data (S ₁ , S ₂ , S ₃ , S ₄ ), and then the switches 25 and 26 are returned to the a side (S ₅ ). When one PN code period has elapsed, a synchronization determination is made (S ₆ , S ₇ , S ₈ ). In the case of non-synchronization, whether the number of times input data has been input to the shift register 19 has reached a predetermined value, that is, a synchronization acquisition operation is performed. if the time elapsed from the start becomes a predetermined PN code period number examined (S _14), if not already predetermined value the process returns to step S _1, repeated be incorporated into the shift register 19 the input data again. Uptake times in step S ₁₄ is performed clock slides when it becomes a predetermined value (S _9), the flow returns to step S _6. Accordingly, the sliding synchronization operation is performed from this.

FIG. 7 shows the waveform of each signal of the specific example in the processing shown in FIG. 6 as in FIG. 1B. In this example, the input data (a) has no error after the fourth PN cycle from the synchronization capture start time t _1, and the shift register 1 of the input data is used.
Even if the data is loaded into the memory 9 three times, the data is not synchronized when a sliding synchronous operation is performed. In this example, synchronization is established in the seventh PN code cycle. In the case of an error of up to two steps within one _PN code cycle TPN, synchronization is similarly established in the seventh cycle.

[0021]

As described above, according to the present invention, at the start of the synchronization operation, input data is input to the shift register, and the correlation operation between the same input data is performed by PN.
When the shift register is filled with the input data, the correlation between the input data and the PN code is performed when the shift register is filled with the input data. This is effective when the length is long.

Further, as compared with the conventional sliding correlator, the configuration is very simple with only two switches added.

[Brief description of the drawings]

FIG. 1A is a block diagram showing an embodiment of the first aspect of the present invention, and FIG. 1B is a time chart showing signal waveforms of various parts during operation.

FIG. 2 is a flowchart showing a processing procedure according to the embodiment of the invention of claim 1;

FIG. 3 is a time chart showing waveforms of signals of respective parts at the time of operation corresponding to FIG. 1B when an error is included in input data.

FIG. 4 is a flowchart showing a processing procedure according to the embodiment of the third invention.

FIG. 5 is a time chart showing signal waveforms of respective parts in FIG. 1A to which the invention of claim 3 is applied.

FIG. 6 is a flowchart showing a processing procedure according to an embodiment of the invention of claim 4;

FIG. 7 is a time chart showing signal waveforms of respective parts in FIG. 1A to which the invention of claim 4 is applied.

FIG. 8A is a block diagram showing a conventional sliding correlator, and FIG. 8B is a flowchart showing a processing procedure thereof.

Claims (4)

[Claims] 1. Correlation means for correlating input data from an input terminal with a pseudo random code from a pseudo random code generator, and using the correlation output to determine whether the pseudo random code is synchronized with the input data. A sliding correlator that determines by a determining means, when it is determined to be asynchronous, a synchronous acquisition mode in which the relative phase between the input data and the pseudo random code is shifted by one clock, and when it is determined to be synchronous, switches to a synchronous tracking mode. And a first switch for switching input data from the input terminal to a feedback code of a shift register constituting the pseudo random code generator and supplying the feedback data to the shift register; and a pseudo random code supplied to the correlation means. A second switch for switching the output code of the generator and supplying input data to the input terminal; The first switch is set on the side that supplies data to the shift register, the second switch is set on the side that supplies the input data to the correlation means, and the input data is shifted to the shift register. Means for switching to the synchronous acquisition mode after inputting the number of stages, and a sliding correlator. 2. A correlation between input data and a pseudo-random code from a pseudo-random code generator, and it is determined from the correlation value whether or not the pseudo-random code is synchronized with the input data. A sliding correlator synchronization method in which the relative phase between the input data and the pseudo-random code is sequentially shifted by one clock and synchronized to set a synchronous tracking mode. First, the input data is shifted by a shift register constituting the pseudo-random code generator At the same time as the number of shift stages, and in the meantime, take the correlation using the input data instead of the pseudo-random code, and then stop supplying the input data to the shift register, and Correlate with the pseudo-random code and then synchronize by shifting by one clock. Sliding correlator synchronization method characterized by the. 3. The input data is input to the shift register by the number of shift stages, and after one period of the pseudo random code has elapsed since the start of the input, it is checked whether the input data is synchronous or asynchronous. The method according to claim 1, further comprising: inputting the data into the shift register as many as the number of shift stages, and stopping the supply of the input data to the shift register by correlating the input data, and correlating the input data with the pseudo random code. 3. The method for synchronizing a sliding correlator according to claim 2. 4. The method according to claim 3, wherein the number of times of re-input of the input data to the shift register is counted, and when the value reaches a predetermined number, the relative phase is shifted by one clock and synchronized. Sliding correlator.