JPH10256919A - Error correction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a satisfactory encoding gain with a small calculational volume even with respect to general 2N-element linear black codes other than complete codes. SOLUTION: A soft decision circuit 10 performs soft decision of a reception sequence to give soft decision data Yj to a hard decision decoder 11 and a soft decision decoder 15. If a syndrome corresponding to soft decision data Yj is a syndrome corresponding to plural error data, the hard decision decoder 11 regards this syndrome as a syndrome corresponding to error data having the least number of errors out of these plural error data to perform hard discrimination encoding and outputs hard decision decoded data Ch. The soft decision decoder 15 performs soft decision decoding of soft decision data Yj to output soft decision decoded data Cs. Exclusive OR between hard decision decoded data Ch and soft decision decoded data Cs is operated in an adder 18, and the operation result is outputted as decoded data Ch+Cs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an error correction circuit for correcting a bit error of data transmitted by a 2 ^m (m is an integer of 1 or more) elementary linear block code, and more particularly, to a B error correction circuit.
The present invention relates to an error correction circuit for correcting a bit error of data transmitted by an incomplete code such as a CH code and a Reed-Solomon code.

[0002]

2. ^{Description of the} Related Art Hard-decision decoding (algebraic decoding) and soft-decision decoding (maximum likelihood decoding) have been known as methods for decoding data sent by 2 ^m- ary linear block codes. I have. Hard decision decoding is widely used because of its simplicity, but generally has a problem that the coding gain is not good. On the other hand, the soft decision decoding method can improve the coding gain by about 2.0 dB as compared with the case of using the hard decision decoding method. There is a problem that a storage area is required.

In order to solve such a problem, conventionally,
An error correction circuit as shown in FIG. 3 has been proposed (for example,
JP-A-8-37465).

The error correction circuit shown in FIG. 3 includes a hard decision decoder 30, a correlation circuit 31, and an adder 32.

The hard decision decoder 30 and the correlation circuit 31 are provided with soft decision data Y _i (i = 0, 1,..., N−1). The soft-decision data Y _i is obtained by soft-decision of the received and demodulated binary linear block code (n, k) capable of correcting a t-bit error. Here, n is the code length, k
Represents the number of information symbols. Also, in the following description, the codeword is assumed to be Cm = ( _{Cm0, Cm1,} ..., Cm _(n-1) ).

[0006] The hard decision decoder 30, the soft decision data Y _i is given, it hard decision decoding, and outputs the hard decision decoded data Ch.

When given the soft decision value Y _i , the correlation circuit 31 determines a predetermined code word C ₀ = (0,0,
..., 0) and the code word C ₀ and the minimum distance d _min = (2t
For all codeword C _m in +1), defined by the number 1, we obtain the correlation value U _m of the soft decision data Y _i. In equation (1), M represents the number of codewords in which the Hamming weight W _H (C _m ) has the minimum distance d _min .

[0008]

(Equation 1)

Thereafter, the correlation circuit 31 outputs the soft decision data Y
_The code word having the maximum correlation value U _i with _i is output as soft-decision decoded data Cs.

Then, an exclusive OR of the hard decision decoded data Ch and the soft decision decoded data Cs is obtained by an adder 32,
The result is output as decoded data Ch + Cs soft decision data Y _i.

[0011]

[SUMMARY OF THE INVENTION] The prior art described above, the soft-decision correlation value between the data Y _i, as determined only for code words in the code word and the code word and the minimum distance predetermined Therefore, the amount of calculation can be reduced, and the hard decision decoded data C
Since the exclusive OR of h and the soft-decision decoded data Cs by the correlation circuit is used as the decoded data, the coding gain can be improved as compared with the case where only the hard-decision decoding is used. However, according to the above-described conventional technique, when the 2 ^m- ary linear block code capable of t-bit error correction is a perfect code such as a Golay code or a Hamming code, that is, the reception space is a sphere having a radius t around each codeword. There is a problem that it can be applied only to the case of completely filled complete codes.

When the 2 ^m-element linear block code capable of correcting t bits is a perfect code, the received sequence always has a radius t centered on each codeword, even if the received sequence contains errors of (t + 1) bits or more. Since it is included in any of the spheres, the hard decision decoding is performed by the hard decision decoder to obtain the hard decision decoded data Ch.
Can be obtained. Therefore, the hard decision decoded data C
By taking the exclusive OR of h and the soft-decision decoded data Cs obtained by the correlation circuit, errors of (t + 1) bits or more can be corrected, and the coding gain can be improved.

However, if a t-bit error-correctable 2
^{If the m-} ary linear block code is a non-perfect code such as a BCH code or a Reed-Solomon code, a received sequence including an error of (t + 1) bits or more includes a radius t centered on each codeword. Some are not included in the sphere. For this reason, the hard decision decoder Ch may not be able to obtain the hard decision decoded data Ch. In such a case, the exclusive OR with the soft decision decoded data Cs obtained by the correlation circuit must be obtained. And correct decoded data cannot be obtained.

By the way, among the 2 ^m elementary linear block codes capable of correcting t-bit errors, few perfect codes such as Golay codes and Hamming codes are used, and most non-perfect codes such as BCH codes and Reed-Solomon codes are used. Occupy. For this reason, there is a demand for an error correction circuit capable of obtaining a good coding gain with a small amount of calculation even for an incomplete code.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an error correction circuit capable of obtaining a good coding gain with a small amount of calculation even for an incomplete code.

[0016]

Since SUMMARY OF THE INVENTION The present invention to achieve the above object, a 2 ^m based on a linear block code, in the receiver for receiving the t bit errors correctable incomplete code,
If the syndrome of the received sequence is a syndrome corresponding to a plurality of error data, the syndrome is regarded as a syndrome corresponding to the error data with the smallest number of errors among the plurality of error data, and hard decision decoding is performed. And a hard-decision decoder that outputs hard-decision decoded data, and soft-decision data obtained by soft-deciding the received sequence for a predetermined codeword and each codeword that is at a minimum distance from the codeword. And a soft-decision decoder that outputs, as soft-decision decoded data, a code word having a maximum correlation value with the soft-decision data, and hard-decision decoded data output from the hard-decision decoder; An adder that takes an exclusive OR with the soft-decision decoded data output from the soft-decision decoder.

In this configuration, if the syndrome of the received sequence is a syndrome corresponding to a plurality of error data, the hard decision decoder converts the syndrome into the most error number of the plurality of error data. Hard decision decoding assuming that the syndrome corresponds to error data with less
Output hard decision decoded data. Also, the soft decision decoder is
For each of a predetermined codeword and a codeword located at a minimum distance from the codeword, a correlation value with soft-decision data obtained by soft-decision of the received sequence is obtained, and a correlation value with the soft-decision data is maximized. Are output as soft-decision decoded data. The adder performs an exclusive OR operation on the hard decision decoded data output from the hard decision decoder and the soft decision decoded data output from the soft decision decoder, and outputs the operation result as decoded data.

According to the present invention, in order to obtain a better coding gain, the soft decision decoder may be arranged such that a distance from the predetermined codeword exceeds a minimum distance and the predetermined codeword exceeds a minimum distance. For each code word whose distance from the given code word is equal to or less than a predetermined distance, a correlation value with the soft decision data is obtained, and a code word having a maximum correlation value with the soft decision data is subjected to soft decision decoding. A configuration for outputting data is provided.

[0019]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. An error correction circuit of a receiver for receiving a 2 ^m- ary linear block code (n, k) and an incomplete code capable of t-bit error correction. This is a diagram showing the configuration of FIG. As shown in the figure, the error correction circuit of this embodiment, a soft-decision circuit 10 for outputting a soft decision data Y _i the received sequence with soft decision, hard and hard decision decoding soft decision data Y _i determined A hard decision decoder 11 that outputs decoded data Ch, a soft decision decoder 15 that performs soft decision decoding on soft decision data Y _i and outputs soft decision decoded data Cs, a hard decision decoded data Ch and a soft decision decoded data Cs
And an adder 18 for calculating an exclusive OR with the result and outputting the operation result Ch + Cs as decoded data.

The hard decision decoder 11 performs a hard decision on the soft decision data Y _i and outputs hard decision data,
A syndrome generator 13 for generating a syndrome based on the hard decision data output from the hard decision circuit 12, a syndrome / error position converter 14 for mapping the syndrome generated by the syndrome generator 13 to an error position,
A delay circuit 21 for delaying the hard decision data output from the hard decision circuit 12, and an exclusive OR of the hard decision data delayed by the delay circuit 21 and the output of the syndrome / error position converter 14 is calculated. The result is hard-decision decoded data Ch
, And an adder 20 that outputs

The syndrome / error position converter 14 has a table 14a for mapping the syndrome to an error position.
It has. The table 14a includes a syndrome and error data with the smallest number of errors among error data corresponding to the syndrome (however, only when there is only one error data with the smallest number of errors for the syndrome). Is registered correspondingly. Such a table 14a can be generated using a computer, for example, as follows.

First, a syndrome is obtained for all possible error data, and the error data and the syndrome are recorded as a set (S1 in FIG. 2).

Next, of the set of the recorded error data and syndrome, all the sets including the error data having the number of errors of t bits or less are registered in the table 14a (S2). Here, the detailed explanation of the syndrome is omitted,
The syndrome is based on the codeword C _i (i =
0, 1,..., N−1), and the error data e
_i (i = 0, 1,..., n-1). Further, in the case of a 2 ^m elementary linear block code capable of correcting t bits of error, the syndromes of the error data e _i having the number of errors of t bits or less are different from each other. Therefore, all sets including error data having the number of errors of t bits or less satisfy the above condition.

Then, the number of errors in the unprocessed set is (t)
Attention is paid to one of the sets including error data of +1) bits or more, and a set including the same syndrome as the noted set is searched for from among unprocessed sets (S3, S4). At first,
All sets recorded in S1 are unprocessed sets. Also,
The set noticed in S3 and the set found in S4 are processed sets.

Then, if a set including the same syndrome as the currently focused set cannot be found (S5: NO)
After registering the currently focused set in the table 14a (S6), the process of S3 is performed. Here, the inability to find a set that includes the same syndrome as the currently focused set means that the syndrome may be uniquely determined even for error data with the number of errors of (t + 1) bits or more. Such a phenomenon cannot occur in the case of a perfect code, but the 2 ^m- ary linear block code capable of correcting a t-bit error to be processed in the present invention is a non-perfect code. Things can happen.

On the other hand, if a set including the same syndrome as the currently focused set can be found (YES in S5), the error with the smallest number of errors is selected from the currently focused set and the set found in S4. Find the set containing the data (S
7).

Then, the number of errors in the error data included in the set found in S7 is checked. If the number is equal to or smaller than t bits (YES in S8), the process in S3 is performed again, and (t +
1) If the number of bits is equal to or greater than (S8: NO), it is checked whether or not a plurality of sets have been found in S7 (S9).

If a plurality of sets have been found in S7 (YES in S9), the process in S3 is performed again, and
If only one set has been found in 7 (NO in S9)
Checks whether the number of error data is equal to the number of error data included in the currently focused set (S10). As a result, if it is determined that they are the same (YES in S10), the process of S3 is performed again, and if they are not the same (S10 is N
O), in the set found in S7, the set including the error data with a small number of errors among the sets currently focused on is registered in the table 14a (S11). The reason why the group with the smaller number of errors is registered in the table 14a is that the smaller the number of errors, the higher the frequency of occurrence. That is, the error correction is performed by giving priority to the error that is likely to occur.

The above processing is repeated until there is no unprocessed group (until S12 becomes NO), thereby generating the table 14a. In the above-described method of generating the table 14a, if a plurality of sets are found in S7, and if it is determined in S10 that the number of errors is the same as the number of errors of the currently focused set, registration in the table 14a is performed. Is not performed, but one set may be registered in the table 14a from the set found in S7 and the set currently focused on. At this time, which pair is registered in the table 14a can be determined, for example, by displaying all of the plurality of pairs on a display device and allowing the user to select a pair to be registered.

The soft decision decoder 15 includes a correlator 16 and a maximum value decision unit 17.

The correlator 16 calculates the code word C ₀ ^-1 = (0,0,
.., 0) and this codeword C ₀ ^-1 Is the minimum distance d
_{min, d min + 1, ...} , the code word C _m ⁰ in the d _min + a,
For each of C _m ¹ ,..., C _m ^a , soft decision data Y _i
It has a function of obtaining the correlation values U _m with.

The maximum value determiner 17 calculates the code words C ₀ ^-1 _and C _{m
^{0, C m 1, ...,}} C m of ^a, the soft decision data Y _i and the correlation value U _m soft decision decoding a codeword is the maximum value data Cs of
As a function.

Next, the operation of this embodiment will be described.

The receiver uses a 2 ^m- ary linear block code (n,
When the code sequence of k) is received, a demodulated received sequence is provided to the soft decision circuit 10.

The soft decision circuit 10 makes a soft decision on the received sequence,
The soft decision data Y _i (i = 0, 1,..., N−1) is output. The soft decision data Y _i is provided to the hard decision decoder 11 and the soft decision decoder 15.

[0037] In the hard-decision decoder 11, the soft decision data Y _i is given, it is determined hard decision circuit 12 is hard, and outputs the hard decision data. This hard decision data is provided to the syndrome generator 13 and the delay circuit 2
After being delayed at 1, it is provided to adder 20.

The syndrome generator 13 generates a syndrome of the hard decision data provided from the hard decision circuit 12.

The syndrome generated by the syndrome generator 13 is input to the syndrome / error position converter 14, and the syndrome / error position converter 14 is configured to input the syndrome among the error data registered in the table 14a. And outputs the registered error data.

The adder 20 performs an exclusive OR operation on the error data output from the syndrome / error position converter 14 and the hard decision data delayed by the delay circuit 21. Output as Ch.

On the other hand, the soft-decision decoder 15, the soft decision data Y _i is given, the correlator 16 is the code word C ₀ ^-1 =
(0, 0,..., 0) and the distance from this codeword C ₀ ^-1 is d
_{min, d min + 1, ...} , the code word C _m ^0, C _m ¹ in d _min + a, ..., for each C _m ^a, defined by the number 2, obtains the correlation value U _m of the soft decision data Y _i .

[0042]

(Equation 2)

The correlator 16 determines that the code word C ₀ ^-1 And the distance from this codeword C ₀ ^-1 is d _min, d _min +1,..., D _min +
For each of the code words C _m ⁰ , C _m ¹ ,..., C _m ^{a in a} , the correlation value U _m with the soft decision value Y _i is obtained.
The maximum value determiner 17 calculates each of the code words C ₀ ^-1 , C _m ⁰ , C
_m ^1, ..., of the C _m ^a, and outputs a code word correlation value becomes the maximum value as a soft decision decoding data Cs.

Here, not only the code word C ₀ ^-1 but also the distance from the code word C ₀ ^-1 is d _min, d _min +1,..., D _min + a.
Codeword C _m ^0, C _m ¹ is, ..., to that to obtain the correlation value of the C _m ^a soft decision value Y _i also, depending on the 2 ^m based on linear block code used, C _m ^{( a-1)}
May become the total number of the total number << C _m ^a of, because the error rate of the code word will depend on the total number of codeword C _m ^a.
Therefore, the value of a is, find the total number of codeword C _m ^j of 2 ^m based on a linear block code is used, it is necessary to select an optimum value considering the circuit size.

The exclusive OR of the hard decision decoded data Ch output from the hard decision decoder 11 and the soft decision decoded data Cs output from the soft decision decoder 15 is obtained by an adder 18, and the result is soft Decoded data Ch + C of decision data Y _i
Output as s.

[0046]

As described above, according to the present invention, when a syndrome of a received sequence is a syndrome corresponding to a plurality of error data, the syndrome is determined by the most error number among the plurality of error data. Since a hard decision decoder for performing hard decision decoding assuming that the syndrome corresponds to a small number of error data and outputting hard decision decoded data is provided, when there is an error of (t + 1) bits or more, the hard decision decoding data is obtained. Is less likely to be obtained. As a result, even if the 2 ^m- ary linear block code capable of t-bit error correction is an incomplete code, a good coding gain can be obtained with a small amount of calculation.

Further, the present invention is not limited to the present invention, wherein not only a predetermined code word and each code word at a minimum distance from the code word, but also the distance between the predetermined code word and the predetermined code word exceeds the minimum distance, and For each code word whose distance from the determined code word is equal to or less than the predetermined distance, the correlation value with the soft decision data is obtained, and the code word with the maximum correlation value with the soft decision data is defined as the soft decision data. Since a soft decision decoder for outputting is provided, a better coding gain can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a flowchart illustrating an example of a method for generating a table 14a.

FIG. 3 is a block diagram showing an example of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Soft decision circuit 11 ... Hard decision decoder 12 ... Hard decision circuit 13 ... Syndrome generator 14 ... Syndrome / error position converter 15 ... Soft decision decoder 16 ... Correlator 17 ... Maximum value decision unit 18 ... Adder 20 ... Adder 21 ... Delay circuit 30 ... Hard decision decoder 31 ... Correlation circuit 32 ... Adder

Claims (3)

[Claims] 1. A 2 ^m based on a linear block code, in the receiver for receiving the t bit errors correctable incomplete code, if the syndrome of the received sequence is a syndrome corresponding to a plurality of error data A hard decision decoder that performs hard decision decoding by regarding the syndrome as a syndrome corresponding to the error data with the smallest number of errors among the plurality of error data, and outputs hard decision decoded data; For each of the determined codeword and each codeword located at a minimum distance from the codeword, a correlation value with soft-decision data obtained by soft-decision of the received sequence is obtained, and a correlation value with the soft-decision data is maximized. A soft-decision decoder that outputs a code word that becomes as soft-decision decoded data; a hard-decision decoded data output from the hard-decision decoder; and a soft-decision decoded data output from the soft-decision decoder. Error correction circuit, characterized in that it comprises an adder for taking the exclusive OR of the. 2. The soft decision decoder, wherein a distance from the predetermined codeword exceeds a minimum distance,
Also, for each code word whose distance from the predetermined code word is equal to or less than the predetermined distance, the correlation value with the soft decision data is obtained, and the code word with the maximum correlation value with the soft decision data is obtained. 2. The error correction circuit according to claim 1, further comprising a configuration for outputting the data as soft-decision decoded data. 3. The hard decision decoder, performs a hard decision on the received sequence and outputs hard decision data, and a syndrome generator that generates a syndrome of the hard decision data output from the hard decision circuit. And a table in which a syndrome and error data with the smallest number of errors among error data corresponding to the syndrome are registered, and the table corresponding to the syndrome generated by the syndrome generator. A syndrome / error position converter that outputs the error data registered in the error detection unit; an exclusive OR of the error data output from the syndrome / error position converter and the hard decision data output from the hard decision circuit 3. The error correction circuit according to claim 2, wherein the error correction circuit comprises: