JPH10247649A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To contrive the effect of a migration resistance in a multilayer interconnection structure or the like by a method wherein columnar structures, which contain a metal different from Al as its main component and cross a wiring layer containing the Al as its main component, are provided in this wiring layer. SOLUTION: Columnar structures 16 containing a large quantity of metallic impurities are formed in a wiring layer 12 consisting of a conductive film constituted of three layers of a TiN film 12a, an Al film 12b and a TiN film 12c, which are formed on an Si oxide film 11 in the longitudinal direction of the layer 12, and these structures 16 have the effect of a barrier, which prevents diffusion of Al atoms. That is, even if the Al atoms come moving in the direction shown by an arrow 15, the structures 16 block the movement and prevent the Al atoms from being moved to the side of an anode electrode 14 more than that. Moreover, the layer 12 is divided into regions shorter than some regions in the longitudinal direction of the layer 12 by the structures 16 and an Al concentration has each concentration gradient in the divided regions. Owing to this, the concentration gradient becomes steep, a force 18 that the moved Al atoms flow backward is increased, lack of the Al atoms on the side of the cathode electrode 13 is decreased and the generation of voids is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to improvement in reliability of a semiconductor device when metal wiring mainly composed of Al is used, and particularly to prevention of a failure due to migration. .

[0002]

2. Description of the Related Art Al is a material most commonly used as a wiring layer of a semiconductor integrated circuit. This is Al
This is because they have characteristics such as easy formation of an ohmic contact with Si, excellent adhesion to an insulating film such as a SiO ₂ film, easy film formation, and easy bonding.

[0003] However, it has been known that Al wiring has a problem of stress migration caused by movement of metal ions due to electromigration caused by movement of metal ions under a large current density and stress caused by heat treatment. I have. Such migration is a serious problem that causes local disconnection, generation of voids, increase in resistance, etc., impairs the reliability of the semiconductor device and shortens its life. In particular, the current density of wiring tends to increase with the miniaturization of integrated circuit elements in recent years, and the wiring width also tends to decrease, so that the problem of migration has become more and more serious.

In order to solve such a problem, the following countermeasures have been considered. The first is a method of forming an Al wiring layer having a crystal structure called a bamboo structure. In other words, the Al crystal structure is made as large as the cross section of the Al wiring layer to form an Al wiring layer, thereby reducing the crystal grain boundaries and suppressing migration due to the movement of Al atoms along the crystal grain boundaries. It is to do.

A second method is to align the crystal directions of Al crystal grains in the Al wiring layer in the <111> direction. That is, <
By aligning them in the 111> direction, the bonding between Al atoms and crystal grains is increased to make Al atoms difficult to move, thereby suppressing migration. Third, a method of forming an Al alloy wiring layer using an alloy of Al and a metal such as Cu or Ti. As a result, Cu atoms and the like are arranged in the movement path of the Al atoms along the crystal grain boundaries, and diffusion of the Al atoms at the crystal grain boundaries is prevented to suppress migration.

[0006] Of the above three methods, the third method is most often used in actual devices.

[0007]

However, the first method, the bamboo structure, and the second method, <11
1> It is practically impossible at the production level to completely form the structure, and even if a perfect structure is obtained, electromigration due to bulk diffusion and diffusion at the surface / interface still occurs. Further, the third method using an alloy such as Cu has a disadvantage that the resistance value of the wiring increases due to the inclusion of Cu, so that the amount that can be added is limited. Even if the first and third methods are combined and large crystal grains are formed in the Al alloy wiring layer mixed with Cu, if the stress is large, stress migration may eventually occur and voids may occur. There are various problems.

[0008] Incidentally, such a defect due to migration is likely to occur particularly when the wiring length is long. The reason for this will be described with reference to FIG. 5 showing a case where the wiring length is short and FIG. 6 showing a case where the wiring length is long. Here, FIGS. 5 (a) and 6 (a) are cross-sectional views of a wiring structure schematically showing a wiring structure mainly composed of Al, and FIG. 5 (b) and FIG.
(b) is a diagram showing a change in the Al concentration in the wiring length direction.

In FIG. 5A, 50 is a silicon substrate,
Reference numeral 51 denotes a silicon oxide film formed on the silicon substrate 50, and reference numeral 52 denotes a wiring layer formed on the silicon oxide film 51. The wiring layer includes a TiN layer 52a, an Al layer 52b,
It is formed of a three-layer conductive film of the TiN layer 52c. Further, 53 is a cathode electrode, and 54 is an anode electrode. Al layer T
The three-layer structure sandwiched between the iN layers is such that the Al layer 52
Even when a void is generated in b, there is an effect that a conductive path is secured by the TiN layers 52a and 52c above and below the Al layer 52b. Further, the TiN layers 52a and 52c also have the effect of increasing the adhesive force between the wiring layer 52 and the insulating region.

When a current flows from the anode electrode 54 of the wiring layer 52 to the cathode electrode 53, electrons in the wiring metal flow in the opposite direction 55. Since the metal atoms of the wiring move in the same direction 55 as the electrons, the Al atoms move from the direction of the cathode electrode 53 to the direction of the anode electrode 54. For this reason, the Al atoms are low near the cathode electrode 53 as shown in FIGS.
In the vicinity, a concentration gradient of high is generated.

When the wiring length is short as shown in FIG. 5 (a), the concentration gradient becomes steep, so that the force for eliminating the concentration imbalance acts strongly, and In the opposite direction. In a short wiring, since the backflow phenomenon 56 is strong, the moved Al atoms are pushed back to the cathode electrode 53 side, and the cathode electrode 53
Since deficiency of Al atoms on the side is less likely to occur, voids due to migration are less likely to occur.

On the other hand, in the case of a long wiring length as shown in FIG. 6 (a), as compared with the case of a short wiring length as shown in FIG. 5 (b), as shown in FIG. Since the concentration gradient is gradual, the force of the backflow of the transferred Al atoms 5
6 gets weaker. Therefore, in the long wiring, Al moved by migration accumulates more and more near the anode electrode 54, while Al atoms gradually become depleted near the cathode electrode 53, and finally Al atoms to be supplied disappear and voids 57 are lost. Is likely to occur.

The above problem is more likely to occur due to an increase in the length of the wiring compared to the cross-sectional area of the wiring as the integration degree of the semiconductor circuit increases. In a multilayer wiring structure, an Al plug may be used in a contact hole for internal connection between wirings. In such a case, Al atoms can move between the wirings through the Al plug in the contact hole. Therefore, the same problem as in the case where the wiring length is long occurs, and the concentration gradient of Al atoms becomes small and backflow does not easily occur. Therefore, Al atoms are deficient near the cathode electrode 55, and voids are easily generated.

The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to realize a wiring structure having a migration resistance effect particularly in a wiring having a long wiring length or a multilayer wiring structure. An object of the present invention is to provide a semiconductor device having high reliability and long life.

[0015]

SUMMARY OF THE INVENTION The above-mentioned problem is caused by a problem that a semiconductor device having a wiring layer mainly composed of Al formed on a semiconductor substrate has a structure in which the wiring layer mainly composed of Al is disposed in a longitudinal direction of the wiring layer. The problem is solved by a semiconductor device having at least one columnar structure mainly composed of a metal different from Al crossing the column.

Here, "mainly" means that the material accounts for 50% or more. FIG. 1 is a diagram illustrating the principle of the present invention. In FIG. 1A, reference numeral 10 denotes a silicon substrate, 11 denotes a silicon oxide film formed on the silicon substrate 10, and 12 denotes a T oxide formed on the silicon oxide film 11.
A wiring layer composed of three conductive films of an iN film 12a, an Al film 12b, and a TiN film 12c, 13 is a cathode electrode, and 14 is an anode electrode. The current is applied to the anode electrode 1 in the wiring layer 12.
When Al atoms flow from the 4 side to the cathode electrode 13 side, the Al atoms move from the cathode electrode 13 side to the anode electrode 14 side, which is the opposite direction 15.

As shown in FIG. 1A, the wiring layer 12 has
A columnar structure 16 containing a large amount of metal impurities is formed in the longitudinal direction of the wiring. The columnar structure 16 has a barrier effect of preventing diffusion of Al atoms. That is, arrow 15
, The columnar structure 16 blocks the movement and prevents the Al atom from moving further to the anode electrode side 14.

Further, as shown in FIG.
Is divided by the columnar structure 16 into several shorter regions in the wiring length direction, so that the Al concentration has a respective concentration gradient not in the entire length of the wiring but in the divided region. For this reason, the concentration gradient becomes steep as in the case of the short wiring, and the force 18 in which the moved Al atoms flow back is increased. As a result, the deficiency of Al atoms on the cathode electrode 13 side is reduced, and the generation of voids is prevented.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIG. 2A to 2C are schematic process sectional views of a method for manufacturing a semiconductor device according to this embodiment. In FIG. 2A, 30 is a silicon semiconductor substrate, 31 is a BPSG film, 32 is a first barrier metal layer composed of a Ti film 32a and a TiN film 32b formed on the BPSG film 31, and 33 is a lower barrier metal layer 32 A
1 layer.

As shown in FIG. 2A, a base insulating film made of a BPSG film 31 having a thickness of about 1 μm is formed on a silicon substrate 30 by CVD. Next, a first barrier metal layer 32 composed of a Ti film 32a and a TiN film 32b each having a thickness of about 50 nm is sequentially deposited on the surface of the BPSG film 31 by sputtering or CVD, and then N ₂ and O ₂ are deposited. 400 ° C., 30 in an atmosphere of mixed gas
Heat treatment for about a minute. This first barrier metal layer 32
Is the Al layer 33 to be formed next and the silicon semiconductor substrate 3
It is formed in order to prevent a mutual reaction with 0. In addition, heat treatment is performed to strengthen the prevention of the mutual reaction. Next, an Al layer 33 is deposited to a thickness of about 400 nm by a PVD method.

Subsequently, a photoresist layer 34 is applied on the surface of the Al layer 33, and an opening 35 is formed at a location where impurities are to be implanted. This step can be performed by a usual photolithography step. The positions of the openings 35 are formed, for example, at intervals of 5 μm in the wiring length direction of the Al wiring layer 33, and the size of one opening 35 is, for example, about 0.5 μm square. The spacing and size of the impurity columnar structures may be determined in consideration of the balance between the effect of suppressing electromigration and the wiring resistance.

Using the mask in which the openings 35 are formed as described above, as shown in FIG.
Cu ions are implanted. The condition of ion implantation is 200 ke
The implantation is performed with an acceleration energy of about V and an implantation amount of about 10 ¹⁵ to 10 ¹⁸ / cm ² . Under this condition, the thickness of the Al film is about 400 nm.
Cu ions reach the center of the layer 33 exactly. Subsequently, the photoresist layer 34 is removed by ashing or the like. Thereafter, heat treatment is performed at about 400 ° C. for about 30 minutes. By the above processing, a columnar structure 37 having a Cu content of, for example, about 1% is formed at a predetermined position in the Al layer 33. Although Cu is used as the ion to be implanted here, Ti, Ni, Pd, or the like can be used instead of Cu.

Next, as shown in FIG.
A second barrier metal layer 38 including a Ti layer 38a and a TiN layer 38b is deposited thereon. The second barrier metal layer 38 is formed to prevent an interaction between the Al layer 33 and a layer formed thereon in a subsequent step. The deposited film thickness is, for example, about 20 nm for the Ti layer 38a,
The thickness of the TiN layer 38b is about 50 nm.

Next, in order to pattern a required wiring layer, a resist is applied to the whole, and is exposed and developed to form a resist pattern. Subsequently, anisotropic etching such as RIE (reactive ion etching) is performed using the resist pattern as an etching mask. That is, the Ti film 3
2a, TiN film 32b, Al layer 33, Ti layer 38a, T
After etching the five conductive films of the iN layer 38b, the resist pattern is removed to form a wiring layer.

The reason why the impurity columnar structures 37 are arranged at intervals of 5 μm is that if the wiring length is as short as 5 μm or less, almost no electromigration occurs. This is because electromigration can be expected to be suppressed as in the case of a short wiring. Next, a second embodiment of the present invention will be described with reference to FIGS. 3A to 3C and FIGS. 4A to 4C are schematic process cross-sectional views of a method for manufacturing a semiconductor device according to this embodiment. In the figure, the same symbols as those in FIGS. 2A to 2C indicate the same or corresponding elements.

First, as shown in FIG. 3A, the BP is formed on the silicon substrate 30 in the same process as in the first embodiment.
An SG film 31 is formed, and a first barrier metal layer (TiN film in the present embodiment) 32 and an Al layer 3 are formed on the BPSG film 31.
3. Second barrier metal layer (TiN in this embodiment)
A film 38 is formed sequentially, and an impurity columnar structure 37 is formed in the Al layer.

Then, the second barrier metal layer 38, the Al layer 33, and the first barrier metal layer 31 are sequentially patterned by using a well-known photolithography method to form a first wiring layer 41. Subsequently, the film thickness is about 1 μm by the CVD method.
An interlayer insulating film 40 made of m BPSG films is formed on the first wiring layer 41. Next, as shown in FIG. 3B, the interlayer insulating film 40 is patterned to form a first wiring layer 41.
An opening 42 is provided on each of the upper cathode side and the upper side.
a and 42b are formed.

Next, as shown in FIG. 3C, the interlayer insulating film 40 and the opening 42 are formed by sputtering or CVD.
a, 42b, a TiN film 43 having a thickness of about 100 nm
To form Next, as shown in FIG. 4A, the Al film 44 is formed by sputtering or CVD into the openings 42a, 4a.
A film thickness of about 100 nm that is thicker than 2b is completely buried
Deposits on the surface.

Subsequently, as shown in FIG.
4 is etched back so that only the Al film 45 deposited in the openings 42a and 42b remains. At this time, the etch back is adjusted so that the previously deposited TiN film 43 remains on the interlayer insulating film 40. The Al plugs 45a and 45b embedded in the openings 42a and 42b are connected to the first wiring layer 4
1 and a second wiring layer 46 formed in the following steps.

Next, as shown in FIG. 4C, the second Al layer 47 is formed to a thickness of 400 nm by sputtering of Al.
Deposit to a degree. Further, a TiN layer 48 is deposited on this Al layer 47 by about 50 nm. After that, the second wiring layer 46 is formed by patterning. Here, an example in which the impurity columnar structure 37 is formed in the first wiring layer 41 has been described. However, even if the impurity columnar structure is formed in the second wiring layer 46, the first and second wiring layers 41 may be formed. , 46 may be formed with impurity columnar structures.

In the above embodiment, Al is used as the plug for filling the contact hole, but W may be used. Further, pure A is used as the Al wiring layer.
In addition to the l layer, an Al layer obtained by ion-implanting Cu ions into the Al layer as an impurity for enhancing electromigration resistance.
An alloy of —Cu or an alloy of Al—Si—Cu may be used. In addition, it is also possible to use an alloy of Al with Ti, Ni, Pd, or the like. The Al layer may have bamboo-structured crystal grains, or may have a crystal orientation of Al crystal grains in the <111> direction.

In the above embodiment, the wiring layer has a three-layer structure of a TiN film, an Al layer, a TiN film, a Ti film,
Although a five-layer structure of a TiN film, an Al layer, a TiN film, and a Ti film is used, a single-layer structure made of an Al film or the like may be used instead.

[0033]

As described above, according to the semiconductor device of the present invention, by providing a columnar structure mainly composed of a metal of a different type from that of the wiring layer at a predetermined position of the wiring layer, Al atoms formed by electromigration can be obtained. It becomes a barrier to prevent the diffusion of Al, and the long wiring is substantially divided so that the concentration gradient of Al atoms is made the same as that of the short wiring. To prevent defects from occurring. As a result, an excellent effect of improving the reliability of the miniaturized wiring is obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view of a wiring and an Al concentration gradient diagram illustrating the principle of the present invention.

FIG. 2 is a schematic process sectional view of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a schematic process cross-sectional view (part 1) of the method for manufacturing a semiconductor device according to the second embodiment of the present invention;

FIG. 4 is a schematic cross-sectional view (Part 2) of the method for manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 5 is a cross-sectional view of a conventional Al wiring and an Al concentration gradient diagram (when the wiring length is short).

FIG. 6 is a cross-sectional view of a conventional Al wiring and an Al concentration gradient diagram (when the wiring length is long).

[Explanation of symbols]

10, 30, 50 Silicon substrate 11, 31, 51 Silicon oxide film 12, 52, 41 Wiring layer 12a, 32, 52a First barrier metal layer 12b, 33, 52b Al wiring layer 12c, 52c Second barrier metal layer 13, 53 Cathode electrode 14, 54 Anode electrode 15, 55 Flow of Al atoms 16, 37 Columnar structure containing metal impurities 18, 56 Force for moving back Al atoms 19, 53 Cathode electrode 20 Position of columnar structure 21, 54 Anode electrode 32b, 38a Ti film 32b, 38b, 43, 48 TiN film 34 Photoresist layer 35 Opening of photoresist layer 38 Second barrier metal layer 40 Interlayer insulating film 41 First wiring layer 44, 47 Al wiring layer 42a, 42b Opening of interlayer insulating film 45a, 45b Al plug 46 Second wiring Layer 57 void

Claims (4)

[Claims] 1. A semiconductor device having a wiring layer mainly composed of Al formed on a semiconductor substrate, wherein the wiring layer mainly composed of Al crosses a longitudinal direction of the wiring layer.
A semiconductor device having at least one columnar structure mainly composed of a metal different from l. 2. A first wiring layer formed on a semiconductor substrate, an insulating layer formed on the first wiring layer, and an Al formed in the insulating layer and connected to the first wiring layer. A second wiring layer formed on the insulating layer and connected to the first wiring layer via the plug;
At least one columnar structure mainly composed of a metal different from Al is traversed in the longitudinal direction of at least one of the first and second wiring layers to form the first or second wiring layer. A semiconductor device characterized by having the semiconductor device inside. 3. The metal different from Al is Cu, Ti,
2. The semiconductor device according to claim 1, wherein the semiconductor device is Ni or Pd. 4. A step of forming a wiring layer mainly composed of Al on a semiconductor substrate; and forming a metal layer mainly composed of the wiring layer in the wiring layer mainly composed of Al by traversing a longitudinal direction of the wiring layer. Introducing a conductor mainly composed of a semiconductor device.