JPH10242632A - Forming method for solder bump - Google Patents

Forming method for solder bump

Info

Publication number
JPH10242632A
JPH10242632A JP9041937A JP4193797A JPH10242632A JP H10242632 A JPH10242632 A JP H10242632A JP 9041937 A JP9041937 A JP 9041937A JP 4193797 A JP4193797 A JP 4193797A JP H10242632 A JPH10242632 A JP H10242632A
Authority
JP
Japan
Prior art keywords
solder
chip
electrode
bump
cream solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9041937A
Other languages
Japanese (ja)
Other versions
JP3341616B2 (en
Inventor
Ken Maeda
憲 前田
Tadahiko Sakai
忠彦 境
Seiji Sakami
省二 酒見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP04193797A priority Critical patent/JP3341616B2/en
Publication of JPH10242632A publication Critical patent/JPH10242632A/en
Application granted granted Critical
Publication of JP3341616B2 publication Critical patent/JP3341616B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1216Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3485Applying solder paste, slurry or powder

Landscapes

  • Screen Printers (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming a solder bump for forming the higher bump by eliminating occurrence of a solder bridge. SOLUTION: A print mask in which a pattern hole is opened is superposed on an upper surface of a chip 1, and an electrode of the chip 1 is coated with cream solder. When the coated cream solder 5 is heated by reflowing, the solder 5 is melted, but the solder 5 coating the adjacent electrodes is burred reversely to one another. Accordingly, the solders 5 on the adjacent electrodes do not generate a solder bridge due to combining. Further, the solder 5 is burred from above the electrode to coat in a large quantity, melted and sucked onto the electrode, thereby forming a solder bump with a high height.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ワークに半田バン
プを形成する半田バンプの形成方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder bumps on a work.

【0002】[0002]

【従来の技術】フリップチップやBGA(Ball G
rid Array)などのバンプ付き電子部品のバン
プを形成する方法として、チップや基板のワークの電極
上に半田バンプを形成することが知られている。また半
田バンプの形成方法として、ワークの電極上にスクリー
ン印刷によりクリーム半田を塗布した後、このクリーム
半田をリフロー処理して電極上に半田バンプを形成する
ことが知られている。
2. Description of the Related Art A flip chip or a BGA (Ball G
As a method of forming a bump of an electronic component with a bump such as a lid array, it is known to form a solder bump on an electrode of a chip or a work of a substrate. As a method of forming solder bumps, it is known that cream solder is applied to electrodes of a work by screen printing, and then the cream solder is reflowed to form solder bumps on the electrodes.

【0003】このようにして形成された半田バンプを基
板に半田付けする場合、半田バンプの高さはより高いこ
とが望まれる。これは、高い半田バンプの方がリフロー
時や半田付け後に基板とチップの熱膨張の差によって生
じる熱変形をより吸収しやすいこと、また基板のそりや
うねりなどによる基板表面の高低差をより吸収して、す
べての半田バンプを基板の電極にしっかりと半田付けで
きることによる。
[0003] When the solder bumps thus formed are soldered to a substrate, it is desired that the height of the solder bumps be higher. This is because the higher solder bumps are easier to absorb the thermal deformation caused by the difference in thermal expansion between the board and the chip during reflow or after soldering, and also better absorb the height difference of the board surface due to warpage or undulation of the board. Then, all the solder bumps can be firmly soldered to the electrodes of the substrate.

【0004】このため、ワークの電極上に塗布されるク
リーム半田の量をできるだけ多くして半田バンプの高さ
を高くすることが行われている。
For this reason, it has been practiced to increase the amount of cream solder applied on the electrodes of the work as much as possible to increase the height of the solder bumps.

【0005】以下、従来のバンプの形成方法を図面を参
照して説明する。図9、図10、図11、図12、図1
3、図14は、従来のバンプの形成方法の工程説明図、
図15(a)、(b)は同チップの部分平面図である。
図9において、1はチップであり、その表面には基板の
回路パターンの電極との接続用の電極2が形成されてい
る。この電極2上に以下に説明する工程により半田バン
プが形成される。
Hereinafter, a conventional bump forming method will be described with reference to the drawings. 9, 10, 11, 12, and 1
3, FIG. 14 is a process explanatory view of a conventional bump forming method,
FIGS. 15A and 15B are partial plan views of the same chip.
In FIG. 9, reference numeral 1 denotes a chip, on the surface of which are formed electrodes 2 for connection to electrodes of a circuit pattern on a substrate. A solder bump is formed on the electrode 2 by a process described below.

【0006】図10において3はクリーム半田印刷用の
印刷マスクであり、チップ1の電極2に合わせてパター
ン孔4が設けられている。パターン孔4は長方形状で、
短辺は電極2の幅とほぼ同じであるが、長辺は電極2上
に塗布されるクリーム半田の量をできるだけ多くするた
め電極2の長さより長くなっている。
In FIG. 10, reference numeral 3 denotes a printing mask for cream solder printing, in which pattern holes 4 are provided in accordance with the electrodes 2 of the chip 1. The pattern hole 4 is rectangular,
The short side is almost the same as the width of the electrode 2, but the long side is longer than the length of the electrode 2 in order to increase the amount of cream solder applied on the electrode 2 as much as possible.

【0007】次に、図11に示すように、印刷マスク3
をチップ1に重ね、図12に示すように、印刷マスク3
上をスキージ6を右方へ摺動させてパターン孔4の内部
にクリーム半田5を充填する。次いで、印刷マスク3を
チップ1から分離すれば、チップ1の電極上には図13
に示すように、クリーム半田5が塗布される。
[0007] Next, as shown in FIG.
On the chip 1, and as shown in FIG.
The squeegee 6 is slid to the right to fill the pattern holes 4 with the cream solder 5. Next, when the print mask 3 is separated from the chip 1, the electrodes of the chip 1 are placed on the electrodes of FIG.
As shown in FIG. 7, the cream solder 5 is applied.

【0008】この後、チップ1はリフロー装置に送ら
れ、そこで加熱されることにより、クリーム半田5は溶
融し、冷却固化すると図14に示すように電極2上に半
田バンプ5aが形成される。
Thereafter, the chip 1 is sent to a reflow device, where it is heated, whereby the cream solder 5 is melted and cooled and solidified to form solder bumps 5a on the electrodes 2 as shown in FIG.

【0009】[0009]

【発明が解決しようとする課題】図15(a)は、図1
3に示すクリーム半田5を塗布したチップ1の部分平面
図である。上述したように、印刷マスク3のパターン孔
4の長さを長くしたことにより、クリーム半田5はチッ
プ1の電極2からばりだして長く塗布されている。図1
5(b)は、図14に示すリフロー後のチップ1の部分
平面図である。リフローにより、クリーム半田5を加熱
して溶融させると、溶融したクリーム半田5は電極2上
へ吸い寄せられ、その表面張力により電極2上に略球状
のバンプ5aが形成される。
FIG. 15 (a) is a view similar to FIG.
FIG. 4 is a partial plan view of the chip 1 to which the cream solder 5 shown in FIG. 3 is applied. As described above, since the length of the pattern hole 4 of the print mask 3 is increased, the cream solder 5 is applied long from the electrode 2 of the chip 1. FIG.
FIG. 5B is a partial plan view of the chip 1 after the reflow shown in FIG. When the cream solder 5 is heated and melted by reflow, the melted cream solder 5 is attracted to the electrode 2, and a substantially spherical bump 5 a is formed on the electrode 2 by the surface tension.

【0010】しかしながら流動状態のクリーム半田5は
その挙動が不安定であり、相隣る電極2上のクリーム半
田5は合流して図15(b)に示すように電極2間に半
田ブリッジ5bを生じやすいものであった。
However, the behavior of the cream solder 5 in a flowing state is unstable, and the cream solder 5 on the adjacent electrodes 2 merges to form a solder bridge 5b between the electrodes 2 as shown in FIG. It was easy to occur.

【0011】そこで本発明は、半田ブリッジの発生を解
消し、かつより高い半田バンプを形成することができる
半田バンプの形成方法を提供することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for forming a solder bump which can eliminate the occurrence of a solder bridge and can form a higher solder bump.

【0012】[0012]

【課題を解決するための手段】本発明は、ワークの上面
に印刷マスクを重ね、この印刷マスク上をスキージを摺
動させることにより、この印刷マスクに開孔されたパタ
ーン孔を通してワークの上面に並設された電極上にクリ
ーム半田をスクリーン印刷して塗布した後、このクリー
ム半田をリフロー処理により加熱溶融固化させて電極上
に半田バンプを形成するようにした半田バンプの形成方
法であって、前記スクリーン印刷において互いに相隣る
電極にクリーム半田を互いに逆方向にばり出して塗布す
ることにより、前記リフロー処理において半田ブリッジ
が生じないようにした。
According to the present invention, a print mask is placed on the upper surface of a work, and a squeegee is slid on the print mask, so that the pattern is formed on the upper surface of the work through a pattern hole formed in the print mask. A method of forming solder bumps, in which cream solder is screen-printed and applied on the side-by-side electrodes, and the cream solder is heated and melted and solidified by a reflow process to form solder bumps on the electrodes. In the screen printing, cream solder was applied to the electrodes adjacent to each other in a direction opposite to each other to prevent solder bridges from being generated in the reflow process.

【0013】[0013]

【発明の実施の形態】上記構成の本発明において、ワー
クの電極上に塗布されたクリーム半田をリフロー処理に
より加熱するとクリーム半田は溶融するが、相隣る電極
上に塗布されたクリーム半田は互いに逆方向へばり出し
ているので、相隣る電極上のクリーム半田が合流して半
田ブリッジを生じることはない。またクリーム半田を電
極上からばりだして多量に塗布し、これを溶融させて電
極上に吸い寄せることにより、高さの高い半田バンプを
形成することができる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention having the above-mentioned structure, the cream solder applied on the electrodes of the work is melted when heated by the reflow process, but the cream solder applied on the adjacent electrodes is not melted. Since they protrude in the opposite direction, the cream solders on the adjacent electrodes do not merge to form a solder bridge. In addition, a large amount of cream solder is laid out on the electrode and applied, melted and sucked onto the electrode, whereby a high-height solder bump can be formed.

【0014】次に、本発明の実施の形態を図面を参照し
て説明する。図1、図2、図3、図4、図5、図6は、
本発明の一実施の形態のバンプの形成方法の工程説明
図、図7は同バンプの形成方法の印刷マスクとチップの
部分拡大図、図8(a)、(b)は同バンプの形成方法
のチップの部分断面図である。なお、上記従来の方法と
同一の要素には同一符号を付している。
Next, an embodiment of the present invention will be described with reference to the drawings. 1, 2, 3, 4, 5, and 6 are:
FIG. 7 is a process explanatory view of a bump forming method according to an embodiment of the present invention, FIG. 7 is a partially enlarged view of a print mask and a chip of the bump forming method, and FIGS. FIG. 4 is a partial cross-sectional view of the chip of FIG. The same elements as those in the conventional method are denoted by the same reference numerals.

【0015】図1において、1はチップであり、その表
面には基板の回路パターンの電極との接続用の電極2が
多数形成されている。この電極2上に以下に説明する工
程により半田バンプが形成される。
In FIG. 1, reference numeral 1 denotes a chip, on the surface of which are formed a large number of electrodes 2 for connection to electrodes of a circuit pattern on a substrate. A solder bump is formed on the electrode 2 by a process described below.

【0016】図2において13はクリーム半田印刷用の
印刷マスクであり、チップ1の電極2に合わせてパター
ン孔14が設けられている。パターン孔14は長方形状
で、短辺は電極2の幅とほぼ同じであるが、長辺は電極
2上に塗布されるクリーム半田の量をできるだけ多くす
るため電極2の長さより長くなっている。ここで、図2
および図7に示すように、パターン孔14は、相隣る電
極2について電極2から交互に逆方向へばり出す方向に
長尺に形成されており、全体として千鳥状に配列されて
いる。
In FIG. 2, reference numeral 13 denotes a print mask for cream solder printing, in which pattern holes 14 are provided in accordance with the electrodes 2 of the chip 1. The pattern hole 14 has a rectangular shape, and the short side is almost the same as the width of the electrode 2, but the long side is longer than the length of the electrode 2 in order to increase the amount of cream solder applied on the electrode 2 as much as possible. . Here, FIG.
As shown in FIG. 7, the pattern holes 14 are formed to be long in the direction in which adjacent electrodes 2 alternately protrude from the electrodes 2 in the opposite direction, and are arranged in a staggered shape as a whole.

【0017】次に、図3に示すように、印刷マスク13
をチップ1に重ね、図4に示すように、印刷マスク3上
をスキージ6を右方へ摺動させてパターン孔4の内部に
クリーム半田5を充填する。次いで、印刷マスク3をチ
ップ1から分離すれば、チップ1の電極2上には図5に
示すように、クリーム半田5が塗布される。このように
して塗布されたクリーム半田5は、交互に逆方向にばり
出している(図7も参照)。
Next, as shown in FIG.
The squeegee 6 is slid to the right on the print mask 3 to fill the pattern holes 4 with the cream solder 5 as shown in FIG. Next, when the print mask 3 is separated from the chip 1, the cream solder 5 is applied on the electrodes 2 of the chip 1 as shown in FIG. The cream solder 5 applied in this manner protrudes alternately in the opposite direction (see also FIG. 7).

【0018】この後、チップ1はリフロー装置に送ら
れ、クリーム半田5を加熱して溶融させた後、冷却して
固化させることにより、半田バンプ5aが形成される。
図6はこのようにして半田バンプ5aが形成されたチッ
プを示している。
Thereafter, the chip 1 is sent to a reflow device, where the cream solder 5 is heated and melted, and then cooled and solidified to form a solder bump 5a.
FIG. 6 shows a chip on which the solder bumps 5a are formed as described above.

【0019】図8(a)、(b)は、リフロー時の半田
バンプ5aの生成過程を示している。図8(a)に示す
ように、電極2上に塗布されたクリーム半田5は加熱さ
れることにより溶融し、チップ1上で電極2側へ吸い寄
せられる(矢印a参照)。吸い寄せられたクリーム半田
5は、図8(b)に示すように半田ぬれ性のよい電極2
上に凝集し、表面張力により略球状の半田バンプ5aを
形成する。図8(b)において、鎖線で示すクリーム半
田5は、凝集途中の状態を示している。このクリーム半
田5の溶融過程において、相隣る電極2上に塗布された
クリーム半田5は、そのばり出し方向が互いに逆方向と
なっており、相互に離れているためクリーム半田5が合
流することがなく、従って半田ブリッジを生じない。
FIGS. 8A and 8B show a process of forming the solder bump 5a at the time of reflow. As shown in FIG. 8A, the cream solder 5 applied on the electrode 2 is melted by heating, and is attracted to the electrode 2 side on the chip 1 (see arrow a). The sucked cream solder 5 is applied to the electrode 2 having good solder wettability as shown in FIG.
The solder bumps agglomerate on each other to form a substantially spherical solder bump 5a due to surface tension. In FIG. 8B, the cream solder 5 indicated by a dashed line shows a state in the middle of aggregation. In the melting process of the cream solder 5, the cream solder 5 applied on the adjacent electrodes 2 has the protruding directions opposite to each other and is separated from each other, so that the cream solder 5 may merge. No solder bridges.

【0020】[0020]

【発明の効果】本発明において、ワークの電極上に塗布
されたクリーム半田をリフロー処理により加熱するとク
リーム半田は溶融するが、相隣る電極上に塗布されたク
リーム半田は互いに逆方向へばり出しているので、相隣
る電極上のクリーム半田が合流して半田ブリッジを生じ
ることはない。またクリーム半田を電極上からばりだし
て多量に塗布し、これを溶融させて電極上に吸い寄せる
ことにより、高さの高い半田バンプを形成することがで
きる。
According to the present invention, when the cream solder applied on the electrode of the work is heated by the reflow treatment, the cream solder is melted, but the cream solder applied on the adjacent electrodes protrudes in opposite directions. Therefore, the cream solders on the adjacent electrodes do not merge to form a solder bridge. In addition, a large amount of cream solder is laid out on the electrode and applied, melted and sucked onto the electrode, whereby a high-height solder bump can be formed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 1 is a process explanatory view of a bump forming method according to an embodiment of the present invention;

【図2】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 2 is a process explanatory view of a bump forming method according to an embodiment of the present invention;

【図3】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 3 is a process explanatory view of a bump forming method according to an embodiment of the present invention;

【図4】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 4 is a process explanatory view of a bump forming method according to one embodiment of the present invention;

【図5】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 5 is a process explanatory view of a bump forming method according to one embodiment of the present invention;

【図6】本発明の一実施の形態のバンプの形成方法の工
程説明図
FIG. 6 is a process explanatory view of a bump forming method according to an embodiment of the present invention;

【図7】本発明の一実施の形態のバンプの形成方法の印
刷マスクとチップの部分拡大図
FIG. 7 is a partially enlarged view of a print mask and a chip in a bump forming method according to an embodiment of the present invention.

【図8】(a)本発明の一実施の形態のバンプの形成方
法のチップの部分断面図 (b)本発明の一実施の形態のバンプの形成方法のチッ
プの部分断面図
8A is a partial cross-sectional view of a chip in a bump forming method according to one embodiment of the present invention; FIG. 8B is a partial cross-sectional view of a chip in a bump forming method according to one embodiment of the present invention;

【図9】従来のバンプの形成方法の工程説明図FIG. 9 is a process explanatory view of a conventional bump forming method.

【図10】従来のバンプの形成方法の工程説明図FIG. 10 is a process explanatory view of a conventional bump forming method.

【図11】従来のバンプの形成方法の工程説明図FIG. 11 is a process explanatory view of a conventional bump forming method.

【図12】従来のバンプの形成方法の工程説明図FIG. 12 is a process explanatory view of a conventional bump forming method.

【図13】従来のバンプの形成方法の工程説明図FIG. 13 is a process explanatory view of a conventional bump forming method.

【図14】従来のバンプの形成方法の工程説明図FIG. 14 is a process explanatory view of a conventional bump forming method.

【図15】(a)従来のバンプの形成方法のチップの部
分平面図 (b)従来のバンプの形成方法のチップの部分平面図
FIG. 15A is a partial plan view of a chip in a conventional bump forming method. FIG. 15B is a partial plan view of a chip in a conventional bump forming method.

【符号の説明】[Explanation of symbols]

1 チップ 2 電極 3 印刷マスク 4 パターン孔 5 クリーム半田 5a 半田バンプ 6 スキージ 13 印刷マスク 14 パターン孔 Reference Signs List 1 chip 2 electrode 3 print mask 4 pattern hole 5 cream solder 5a solder bump 6 squeegee 13 print mask 14 pattern hole

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】ワークの上面に印刷マスクを重ね、この印
刷マスク上をスキージを摺動させることにより、この印
刷マスクに開孔されたパターン孔を通してワークの上面
に並設された電極上にクリーム半田をスクリーン印刷し
て塗布した後、このクリーム半田をリフロー処理により
加熱溶融固化させて電極上に半田バンプを形成するよう
にした半田バンプの形成方法であって、前記スクリーン
印刷において互いに相隣る電極にクリーム半田を互いに
逆方向にばり出して塗布することにより、前記リフロー
処理において半田ブリッジが生じないようにしたことを
特徴とする半田バンプの形成方法。
1. A print mask is placed on the upper surface of a work, and a squeegee is slid on the print mask, so that cream is applied to electrodes arranged side by side on the upper surface of the work through pattern holes formed in the print mask. A method of forming solder bumps in which solder is screen-printed and applied, and the cream solder is heated and melted and solidified by a reflow process to form a solder bump on an electrode, wherein the solder bumps are adjacent to each other in the screen printing. A method of forming solder bumps, wherein cream solder is applied to electrodes in a direction opposite to each other to prevent solder bridges from being generated in the reflow process.
JP04193797A 1997-02-26 1997-02-26 Method of forming solder bumps Ceased JP3341616B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04193797A JP3341616B2 (en) 1997-02-26 1997-02-26 Method of forming solder bumps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04193797A JP3341616B2 (en) 1997-02-26 1997-02-26 Method of forming solder bumps

Publications (2)

Publication Number Publication Date
JPH10242632A true JPH10242632A (en) 1998-09-11
JP3341616B2 JP3341616B2 (en) 2002-11-05

Family

ID=12622143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04193797A Ceased JP3341616B2 (en) 1997-02-26 1997-02-26 Method of forming solder bumps

Country Status (1)

Country Link
JP (1) JP3341616B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7378296B2 (en) 2003-02-25 2008-05-27 Kyocera Corporation Print mask and method of manufacturing electronic components using the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI552824B (en) * 2011-10-18 2016-10-11 千住金屬工業股份有限公司 Method and apparatus for forming solder bump

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7378296B2 (en) 2003-02-25 2008-05-27 Kyocera Corporation Print mask and method of manufacturing electronic components using the same
US7638420B2 (en) 2003-02-25 2009-12-29 Kyocera Corporation Print mask and method of manufacturing electronic components using the same

Also Published As

Publication number Publication date
JP3341616B2 (en) 2002-11-05

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