JPH10242034A - Exposure method of charged particle ray apparatus and manufacturing method of semiconductor integrated circuit using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten correction time by shortening a stage movement distance for correcting position variations of charged particle rays such as electron rays (electron beam). SOLUTION: A wafer 6 to be exposed is set to a stage 7, and a marker 9 is disposed on the stage 7 located in the vicinity of the side of an exposure starting point 11 in an exposure region 10 of the wafer 6 for correcting position variations of electron rays (electron beam) with the passage of time upon exposure. In this state, the marker 9 is used to correct the position variations of the electron rays upon exposure with the passage of time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for exposing a charged particle beam apparatus and a method for manufacturing a semiconductor integrated circuit device using the same, and more particularly, to correcting a position fluctuation of a charged particle beam such as an electron beam (electron beam). The present invention relates to an exposure method for a charged particle beam apparatus such as an electron beam exposure apparatus and a method for manufacturing a semiconductor integrated circuit device using the same, which can shorten a stage moving distance and a correction time for performing the operation.

[0002]

2. Description of the Related Art The present inventors have proposed an electron beam (electron beam) used in a method of manufacturing a semiconductor integrated circuit device.
The exposure method of the exposure apparatus was studied. The following is a technique studied by the present inventors, and the outline is as follows.

That is, in an exposure method of an electron beam exposure apparatus, in a column held in a vacuum, an electron beam emitted from an electron gun is focused on a wafer (sample) fixed on a stage, and exposure data is obtained. A pattern is formed on the wafer while deflecting a predetermined exposure area in the X and Y directions by a deflector while controlling the blanking plate on / off (ON / OFF) according to the above.

The stage controls the movement of the wafer so that the exposure of the entire area is completed. During exposure, the electron beam is generally subject to positional variations due to disturbance noise over time and the accumulation of contaminants in the column.

[0005] In order to suppress such position fluctuation of the electron beam and maintain exposure accuracy, correction is performed. In this case, as shown in FIG. 16, a marker 9c for correcting the position of the electron beam is mounted and fixed on the stage 7 in addition to the wafer 6 to be exposed. In the lower left of FIG. 16, the XY coordinate directions on the wafer 6 are shown. For the position correction, for example, the stage 7 is moved from the replacement position of the wafer 6 as in the beam position correction start direction S1, and the marker 9c is placed immediately below the electron beam. At this moment, the initial position of the marker 9c is initialized by detecting the mark.

Subsequently, after the stage 7 moves to the exposure start point 11 in the exposure area 10 on the wafer 6, the drawing is continued while moving the stage 7 along the arrow in the direction of the stripe 12. After the predetermined exposure time has elapsed, the stage 7
Performs the second position correction after moving to the marker 9c in the beam position correction start direction S2. After that, it moves to the next exposure start point in the exposure resuming movement direction E2 to expose the stripe in the direction of the arrow. Further, this operation is repeated as in the beam position correction start direction S3,..., And this operation is performed for all the exposure regions.

A document describing the exposure method of the electron beam exposure apparatus described above includes, for example, Japanese Patent Publication No. Sho 5
There is one described in JP-A-9-22326.

[0008]

However, in the above-described electron beam exposure apparatus, the marker 9c located on the side opposite to the exposure start point 11 is used when periodically correcting the position fluctuation of the electron beam. Therefore, it is necessary to repeat the reciprocating movement of the stage 7 each time until the exposure of the entire area is completed over a large distance therefrom. Further, the correction time in that case substantially depends on and is proportional to the size of the wafer 6 to be exposed.

Therefore, as the diameter of the wafer 6 becomes larger, the correction time tends to increase, and there is a problem that the throughput is reduced. In actual exposure, there are other methods such as electron beam dimension correction, beam current correction, and field deflection distortion correction.To improve throughput, how to save these correction times is an important issue. ing.

SUMMARY OF THE INVENTION An object of the present invention is to provide an exposure method for a charged particle beam apparatus capable of shortening a stage moving distance for correcting a positional variation of a charged particle beam such as an electron beam (electron beam) and shortening the correction time, and an exposure method thereof To provide a method of manufacturing a semiconductor integrated circuit device using the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, according to the exposure method of the charged particle beam apparatus of the present invention, a wafer to be exposed is set on a stage, and the positional fluctuation of a charged particle beam such as an electron beam (electron beam) at the time of exposure is corrected over time. In the state where the marker for the exposure is set on a stage near the exposure start point side in the exposure area of the wafer, the marker is used to correct the positional fluctuation of the charged particle beam with time during exposure.

Further, according to a method of manufacturing a semiconductor integrated circuit device of the present invention, a lithography technique using the above-described exposure method of a charged particle beam device is used to form a pattern of a connection hole or a wiring layer formed in an insulating film. A pattern of a semiconductor integrated circuit device such as a pattern is formed.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

(Embodiment 1) FIG. 1 is a schematic diagram showing an electron beam exposure apparatus used in an exposure method of a charged particle beam apparatus according to an embodiment of the present invention.

FIG. 2 is a plan view for explaining a method of correcting the position of an electron beam in the exposure method of the charged particle beam apparatus according to the first embodiment of the present invention.

As shown in FIG. 1, the electron beam exposure apparatus used in the exposure method of the charged particle beam apparatus according to the first embodiment includes an electron beam 3 in a column 1 held in a vacuum.
An electron gun 2 that emits light is provided, and an electron beam 3 emitted from the electron gun 2 is turned on / off according to the exposure data.
A blanking plate 4 that is controlled to be off (ON / OFF);
A deflector 5 for deflecting the electron beam 3 is provided in the column 1.

A sample chamber 8 is provided below the column 1, and a stage 7 on which a wafer (sample) 6 is set is disposed in the sample chamber 8. The movement of the wafer 6 can be controlled in order to expose the entire area of the wafer 6.

Further, in the exposure method of the charged particle beam apparatus according to the first embodiment, as shown in FIG. 2, an orientation flat having an exposure start point 11 in an exposure area 10 of a wafer 6 to be exposed is provided on a stage 7. A new position correction marker 9 is set near the side. A conventional marker 9c is provided on the stage 7 on the side opposite to the orientation flat with respect to the wafer 6 to be exposed.
Is installed, but this marker 9c may be removed as necessary.

In the exposure method of the charged particle beam apparatus according to the first embodiment, the electron beam 3 emitted from the electron gun 2 in the column 1 held in vacuum is placed on the wafer 6 fixed on the stage 7. The pattern is formed on the wafer 6 while being converged and deflecting a predetermined exposure area 10 in the XY directions by the deflector 5 while controlling the blanking plate 4 on / off according to the exposure data.

The stage 7 controls the movement of the wafer 6 so as to end the exposure of the entire area. In this case, during the exposure, the position of the electron beam 3 is generally changed due to disturbance noise over time or accumulation of contaminants in the column.

Correction is performed in order to suppress such position fluctuation of the electron beam 3 and maintain exposure accuracy.

That is, when starting the actual exposure,
The stage 7 is moved from the wafer exchange place or the like to the position correcting marker 9 in the beam position correction start direction S1.
The initial position is initialized by mark detection. Immediately after this, the exposure start point 11 in the exposure area 10
After the movement in the direction E1 of the exposure resumption movement, the exposure is started.

In this case, the stripe 12 is
The exposure area 10 is divided into stripes 12 having a width that can be deflected along the moving direction of the stage 7, and is divided into snakes (sn) at the first turning point as shown in FIG.
ake), and exposure is continued in the opposite direction.

By controlling the position correction time of the electron beam 3,
After one turn of this return exposure, the stage 7 is moved to the position correcting marker 9 as shown in the beam position correction start direction S2.
After the is moved, the second position correction is performed.

Subsequently, the stage 7 moves in the exposure resuming movement direction E2, and exposure is continued from the next starting point.

This stripe 12 is exposed in the form of a snake in the same manner as at the beginning. The beam position correction start directions S3,... Are repeated in the same manner, and the entire exposure is performed while correcting the position of the electron beam 3.
In this case, in the exposure method of the charged particle beam apparatus according to the first embodiment, the position correction cycle of the electron beam 3 as a charged particle beam is performed by an integral multiple of the reciprocating unit of the stripe 12. Therefore, the moving distance of the stage 7 can be reduced,
By shortening the time required for correction during exposure,
Throughput can be improved.

In the exposure method of the charged particle beam apparatus according to the first embodiment, the position of the electron beam 3 is corrected by the stripe 12
Is performed in one round trip. When the exposure area 10 has an odd number of stripes, the position correction after the final stripe exposure can be omitted.

Further, in the exposure method of the charged particle beam apparatus according to the first embodiment, the position of the electron beam 3 is corrected by one reciprocation of the stripe 12 so that the exposure start point 11 is on the left end side with respect to the position correction marker 9. However, as another mode, the exposure start point 11 can be set to the right end side with respect to the position correction marker 9 and the exposure can be performed leftward from the right end side.

In the exposure method of the charged particle beam apparatus according to the first embodiment, the marker 9c is used and used as a marker for position correction, and the exposure start point is set at the lower right of the marker 9c. Exposure is performed downward, and the exposure area 1
With respect to 0, a mode in which the entire exposure is performed from right to left.

Further, in the exposure method of the charged particle beam apparatus according to the first embodiment, an electron beam exposure apparatus is used as the charged particle beam apparatus, but the charged particle beam is charged using an ion beam which is another charged particle beam. An embodiment of the exposure method of the particle beam device can be adopted.

According to the exposure method of the charged particle beam apparatus of the first embodiment, the electron beam 3 as a charged particle beam is used.
When correcting the positional fluctuation over time, a marker 9 for position correction, which is a reference for correction, is set near the exposure start point 11 in the exposure area 10 of the wafer 6, and the exposure area 10 is The stage 7 is divided into stripes 12 having a width that can be deflected along the moving direction, and the stage 7 is moved in a snake shape so that all the ends of the stripes 12 immediately before each position correction come to the marker 9 side.
Since the distance between the position correction marker 9 and the correction location can be greatly reduced, the stage movement distance for correcting the position fluctuation of the charged particle beam such as the electron beam 3 can be reduced, and the time required for correction can be reduced. And the throughput can be improved.

(Embodiment 2) FIG. 3 is a plan view for explaining a method of correcting a position of an electron beam in an exposure method of a charged particle beam apparatus according to another embodiment of the present invention.

As shown in FIG. 3, in the exposure method of the charged particle beam apparatus according to the second embodiment, the exposure start point 1 in the exposure area 10 of the wafer 6 to be exposed is placed on the stage 7.
1, a new position correction marker 9a is provided. Further, similarly to the above-described exposure method of the charged particle beam apparatus of the first embodiment, a marker 9 for position correction is provided in the vicinity of the orientation flat of the wafer 6 to be exposed, and a conventional marker is provided on the anti-ori flat side with respect to the wafer 6 to be exposed. Marker 9c is installed,
If necessary, the position correction marker 9 and the marker 9
c may be removed. Reference numeral 9b denotes a marker for position correction used in an exposure method of a charged particle beam apparatus according to another aspect of Embodiment 2 described later.

The exposure method of the charged particle beam apparatus according to the second embodiment differs from the exposure method of the charged particle beam apparatus according to the first embodiment in that the stage 7 is controlled by the X-axis driving. Therefore, the marker 9a for position correction is provided at the left end with respect to the wafer 6 to be exposed.
The exposure start point 11 at 0 is at the upper left of the wafer 6 with respect to the exposure area 10. Exposure area 1 in this case
0 is represented by a stripe 12 in the X direction as shown in the figure.
It is divided, exposed by the respective stripes 12, and moves as a whole in the Y direction.

Therefore, the stripe 12 moves in the X direction,
The electron beam 3 is moved in accordance with the movement of the stage 7 to expose the wafer 6 in that direction. At the turning point, the wafer 6 is turned back into a snake shape, and the position of the electron beam 3 is corrected. Similarly to the above, the subsequent exposure is repeatedly and continuously performed.

As a result, the position correction of the electron beam 3 is repeated in a short time between each predetermined position on the left end side of the exposure area 10 and the position correction marker 9a until the entire exposure is completed. In this case, as another mode of the exposure method of the charged particle beam apparatus according to the second embodiment, a marker 9b for position correction is provided at the right end of the wafer 6 to be exposed, and the exposure start point in the exposure region 10 is It can be located at the lower right of the wafer 6 with respect to 10.

In the exposure method of the charged particle beam apparatus according to the second embodiment, an electron beam exposure apparatus is used as the charged particle beam apparatus, but an ion beam exposure using another charged particle beam such as an ion beam is performed. The present invention can be applied to an exposure method of a charged particle beam apparatus using an apparatus or the like.

According to the exposure method of the charged particle beam apparatus according to the second embodiment, the electron beam 3 as a charged particle beam is used.
When correcting the positional variation over time, a marker 9a for position correction, which is a reference for correction, is placed near the exposure start point 11 in the exposure area 10 of the wafer 6, and the exposure area 10 is The stage 7 is divided into stripes 12 having a width that can be deflected along the moving direction, and the stage 7 is moved in a snake shape so that all the ends of the stripes 12 immediately before the position correction come to the marker 9a side. The distance between the marker 9a for use and the correction location can be greatly reduced, so that the stage movement distance for correcting the position fluctuation of the charged particle beam such as the electron beam 3 can be reduced, and the time required for correction can be reduced. And throughput can be improved.

(Embodiment 3) FIGS. 4 to 15 are schematic sectional views showing the steps of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention. The method for manufacturing the semiconductor integrated circuit device according to the third embodiment will be described with reference to FIG.

First, a field insulating film 1 made of a silicon oxide film is applied to an element isolation region of a semiconductor substrate (wafer) 13 made of, for example, p-type silicon single crystal by using a thermal oxidation process.
4 (FIG. 4).

Next, in the element forming region of the semiconductor substrate 13,
A MOSFET is formed (FIG. 5). That is, after a gate insulating film 15 made of, for example, a silicon oxide film is formed on the semiconductor substrate 13, a polycrystalline silicon film containing, for example, phosphorus as an impurity is formed thereon as the gate electrode 16. After an insulating film 17 made of, for example, a silicon oxide film is formed thereon, a pattern such as a gate electrode is formed by using a lithography technique and a selective etching technique.

Thereafter, the CVD is performed on the semiconductor substrate 13.
After a silicon oxide film is formed using a (Chemical Vapor Deposition) method, a sidewall spacer 18 is formed on the side wall of the gate electrode 16 using a lithography technique and a selective etching technique. Next, using the gate region 19 composed of the gate electrode 16 and the like as a mask, an ion implantation method is used to ion-implant an n-type impurity such as phosphorus into the semiconductor substrate 13, and then a thermal diffusion process is performed. A semiconductor region 20 to be a drain is formed.

Next, an insulating film 21 made of, for example, a silicon oxide film is formed on the semiconductor substrate 13 by using the CVD method (FIG. 6). Next, if necessary, for example, CMP
The surface of the insulating film 21 is planarized by removing the insulating film 21 in the surface layer using a polishing technique such as a (Chemical Mechanical Polishing) method.

Thereafter, after the resist film 22 is applied on the semiconductor substrate 13, the resist film 22 is exposed using the above-described exposure method of the charged particle beam apparatus of the first embodiment (FIG. 7). In this case, 22a indicates an exposed area of the resist film 22.

Next, after the resist film 22 is developed, baking is performed to remove an unexposed region of the resist film 22 to form a resist film 22 as an etching mask. Thereafter, using the resist film 22 as an etching mask, a connection hole 23 is formed in the insulating film 21 by using a selective etching technique such as dry etching (FIG. 8).

Thereafter, after the unnecessary resist film 22 is removed, a plug 24 is formed by embedding, for example, tungsten or the like into the connection hole 23 using a selective CVD method (FIG. 9).

Next, after a wiring layer 25 made of, for example, an aluminum layer is formed on the semiconductor substrate 13 by using a sputtering method, the resist film 2 is formed on the wiring layer 25.
6 is applied. After that, the resist film 26 is exposed using the above-described exposure method of the charged particle beam apparatus according to the first embodiment (FIG. 10). In this case, 26a is the resist film 26
3 shows an exposed area of FIG.

Next, after developing the resist film 26, baking is performed to remove an unexposed region of the resist film 26, thereby forming a resist film 26 as an etching mask. Then, using the resist film 26 as an etching mask, a pattern of the wiring layer 25 is formed by using a selective etching technique such as dry etching (FIG. 11).

Next, after the unnecessary resist film 26 is removed, an interlayer insulating film 27 made of, for example, a silicon oxide film is formed on the semiconductor substrate 13 by using the CVD method. Next, if necessary, the surface of the interlayer insulating film 27 is removed and the surface of the interlayer insulating film 27 is planarized by using a polishing technique such as a CMP method.

Then, after applying a resist film 28 on the semiconductor substrate 13, the resist film 28 is exposed using the above-described exposure method of the charged particle beam apparatus of the first embodiment (FIG. 12). In this case, 28a is the resist film 28
3 shows an exposed area of FIG.

Next, after the resist film 28 is developed, baking is performed to remove an unexposed region of the resist film 28 to form a resist film 28 as an etching mask. Thereafter, using the resist film 28 as an etching mask, a connection hole 29 is formed in the interlayer insulating film 27 by using a selective etching technique such as dry etching (FIG. 13).

After removing the unnecessary resist film 28, the wiring layer 30 made of, for example, an aluminum layer is formed on the semiconductor substrate 13 by using a sputtering method.
Is formed, if necessary, by using a polishing technique such as a CMP method to remove the wiring layer 30 in the surface layer,
The surface of the wiring layer 30 is flattened. Next, a resist film 31 is applied on the wiring layer 30. Thereafter, the resist film 31 is exposed using the above-described exposure method of the charged particle beam apparatus according to the first embodiment (FIG. 14). In this case, 31a
Indicates an exposed area of the resist film 31.

Next, after the resist film 31 is developed, baking is performed to remove an unexposed region of the resist film 31 to form a resist film 31 as an etching mask. Thereafter, using the resist film 31 as an etching mask, a pattern of the wiring layer 30 is formed by using a selective etching technique such as dry etching (FIG. 15).

Thereafter, by using the above-described manufacturing process of the interlayer insulating film and the wiring layer, the interlayer insulating film and the wiring layer are laminated on the semiconductor substrate 13 as necessary, and then the passivation film is formed. This completes the manufacturing process of the semiconductor integrated circuit device.

According to the method of manufacturing a semiconductor integrated circuit device of the present embodiment described above, the lithography technique of exposing the resist films 22 and 28 using the above-described exposure method of the charged particle beam device of the first embodiment. Are formed, resist films 22 and 28 are formed as etching masks, and the resist films 22 and 28 are used as etching masks and are connected to the insulating film 21 and the interlayer insulating film 27 using a selective etching technique. Holes 23 and 29 are formed. Therefore, by adopting the lithography technique for exposing the resist films 22 and 28 using the above-described exposure method of the charged particle beam apparatus according to the first embodiment, it is possible to improve the throughput, improve the accuracy, and improve the throughput. The patterns of the resist films 22 and 28 and the connection holes 23 and 29 as etching masks for fine processing can be formed with a high production yield.

According to the method of manufacturing a semiconductor integrated circuit device of the present embodiment, the resist film 26, the resist film 26,
A lithography technique for exposing 31 is used to form resist films 26 and 31 as etching masks, and using the resist films 26 and 31 as an etching mask, the wiring layer 25 is formed using a selective etching technique. , 3
0 pattern is formed. Therefore, by adopting the lithography technique for exposing the resist films 26 and 31 using the exposure method of the charged particle beam apparatus according to the first embodiment, the throughput is improved.
The patterns of the resist films 26, 31 and the wiring layers 25, 30 as etching masks for fine processing with high precision can be formed with a high production yield.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, the method of manufacturing a semiconductor integrated circuit device of the present invention employs a lithography technique for exposing a resist film using the above-described exposure method of the charged particle beam apparatus of the first or second embodiment. Then, a resist film as an etching mask is formed, and various patterns can be formed by using a selective etching technique using the resist film as an etching mask.

Further, according to the method of manufacturing a semiconductor integrated circuit device of the present invention, a semiconductor substrate on which a semiconductor element is formed
licon on Insulator) Substrates such as substrates, MOSFETs, CMOSFETs
And a method for manufacturing a semiconductor integrated circuit device in which various semiconductor elements such as bipolar transistors are combined.

Further, the present invention relates to a MOSFET, a CMO
D composed of SFET, BiCMOSFET, etc.
RAM (Dynamic Random Access Memory), SRAM
(Static Random Access Memory) or various semiconductor integrated circuit devices having a logic system or the like.

[0063]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). According to the exposure method of the charged particle beam apparatus of the present invention, when correcting a temporal change in the position of a charged particle beam such as an electron beam (electron beam), a position correction marker serving as a correction reference is exposed on the wafer. The exposure area is set near the exposure start point, and the exposure area is divided into stripes of a width that can be deflected along the stage movement direction, and the end of each stripe immediately before each position correction comes to the marker side Since the movement of the stage is snake-shaped as described above, the distance between the marker for position correction and the correction position can be significantly reduced, so that the electron beam (electron beam) can be used.
Thus, the stage movement distance for correcting the position fluctuation of the charged particle beam can be shortened, the time required for the correction can be shortened, and the throughput can be improved.

(2). According to the method for manufacturing a semiconductor integrated circuit device of the present invention, using the above-described exposure method for a charged particle beam device, employing a lithography technique for exposing a resist film, forming a resist film as an etching mask, Using the resist film as an etching mask, connection holes are formed in the insulating film and the interlayer insulating film using a selective etching technique. Therefore, by using the lithography technique of exposing the resist film using the above-described exposure method of the charged particle beam apparatus, the throughput as an etching mask for high-precision and fine processing can be improved with improved throughput. The pattern of the resist film and the connection hole can be formed with a high production yield.

(3). According to the method for manufacturing a semiconductor integrated circuit device of the present invention, using the above-described exposure method for a charged particle beam device, employing a lithography technique for exposing a resist film, forming a resist film as an etching mask, Using the resist film as an etching mask, a pattern of a wiring layer is formed by using a selective etching technique. Therefore, by using the lithography technique of exposing the resist film using the above-described exposure method of the charged particle beam apparatus, the throughput as an etching mask for high-precision and fine processing can be improved with improved throughput. The pattern of the resist film and the wiring layer can be formed with a high production yield.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an electron beam exposure apparatus used in an exposure method of a charged particle beam apparatus according to an embodiment of the present invention.

FIG. 2 is a plan view for describing a method of correcting a position of an electron beam in an exposure method of a charged particle beam apparatus according to an embodiment of the present invention.

FIG. 3 is a plan view for explaining a position correcting method of an electron beam in an exposure method of a charged particle beam apparatus according to another embodiment of the present invention.

FIG. 4 is a schematic sectional view showing a manufacturing process of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 5 is a schematic sectional view showing a manufacturing process of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 6 is a schematic sectional view showing a manufacturing process of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 7 is a schematic sectional view showing a manufacturing process of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 9 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 10 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 11 is a schematic cross-sectional view showing a manufacturing step of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 12 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 13 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 14 is a schematic cross-sectional view showing a manufacturing step of a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 15 is a schematic cross-sectional view showing a step of manufacturing a semiconductor integrated circuit device according to still another embodiment of the present invention.

FIG. 16 is a plan view for explaining a method of correcting a position of an electron beam in an exposure method of a conventional charged particle beam apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Column 2 Electron gun 3 Electron beam 4 Blanking plate 5 Deflector 6 Wafer 7 Stage 8 Sample chamber 9 Marker 9a-9c Marker 10 Exposure area 11 Exposure start point 12 Stripe 13 Semiconductor substrate (wafer) 14 Field insulating film 15 Gate insulating Film 16 Gate electrode 17 Insulating film 18 Side wall spacer 19 Gate region 20 Semiconductor region 21 Insulating film 22 Resist film 22a Resist film in exposed region 23 Connection hole 24 Plug 25 Wiring layer 26 Resist film 26a Resist film in exposed region 27 Interlayer insulating film 28 Resist film 28a Resist film in exposed region 29 Connection hole 30 Wiring layer 31 Resist film 31a Resist film in exposed region E1 to E3 Exposure resuming movement direction S1 to S3 Beam position correction start direction

Claims (6)

[Claims] 1. A wafer to be exposed is set on a stage, and a marker for correcting a positional change of a charged particle beam with time during exposure is set on the stage near an exposure start point in an exposure area of the wafer. An exposure method for a charged particle beam apparatus, wherein the marker is used to correct a temporal change in the position of the charged particle beam during exposure. 2. An exposure method for a charged particle beam apparatus according to claim 1, wherein said exposure area of said wafer is divided by a stripe into a size capable of maximum deflection along a moving direction of said stage. An exposure method for a charged particle beam apparatus, wherein exposure is performed by moving the stage on which the wafer is set in a snake shape at a turning point of the stripe. 3. An exposure method for a charged particle beam apparatus according to claim 1, wherein the position correction cycle of the charged particle beam is performed at an integral multiple of a reciprocating unit of the stripe. Exposure method for line device. 4. An exposure method for a charged particle beam apparatus according to claim 1, wherein said charged particle beam is an electron beam, and said charged particle beam apparatus is an electron beam exposure apparatus. An exposure method for a charged particle beam apparatus, comprising: 5. A semiconductor, wherein a pattern of a semiconductor integrated circuit device is formed by using a lithography technique using the exposure method of a charged particle beam device according to claim 1. A method for manufacturing an integrated circuit device. 6. The method of manufacturing a semiconductor integrated circuit device according to claim 5, wherein the pattern of the semiconductor integrated circuit device is a pattern of a connection hole and a pattern of a wiring layer. Manufacturing method.