JPH10240312A - Debugging device for ladder program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device for easily performing debugging even in the case of ladder program for which the high-grade instruction of repeated address operation with index addition is supported. SOLUTION: This device has a ladder program part 10 describing input and output instructions including the repeated operation having the address with index addition, index editing picture 20 for determining the index value of this address and index operating means 30 for translating the address with index addition to a real address and further, a monitor part 40 accesses the real address of input/output instruction, grasps an ON/OFF state and displays it on a monitor screen 50. For the purpose to monitor the input/output instruction with the real address, a real address picture 60 is displayed. Then, in the case of successive change just determining the initial value of index value, each time of successive change, the real address is updated and displayed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a debugger used for correcting errors in a ladder program used for describing an instruction in a sequencer for controlling a machine tool or the like, and more particularly to a debugger for using an address with index addition. It relates to an improvement suitable for debugging.

[0002]

2. Description of the Related Art The applicant of the present invention has disclosed, for example,
No. 14 publication, etc., the programmable controller (PL
A display device for a ladder program suitable for use in C) is proposed. By the way, the function of the PLC has been dramatically improved in recent years, and in addition to a control operation for controlling an operation command for a conventional machine, it also performs information processing for processing information possessed by the machine and transmitting the processed information to a host computer. It has become.
Therefore, ladders, which are the main languages of PLC, have come to support advanced instructions such as repetitive operations in high-level languages.

In the repetitive operation, an index modification is often used for device designation in order to change a designated device every time. Therefore, it is desired that the debugging work also corresponds to the address with the index addition. FIG. 3 is a ladder circuit diagram using an address with index addition. In the figure, the input instruction 12 contains the contents of the address I ₁₀ + V 1 obtained by adding the absolute address 13 and the relative address 14. The output instruction 16 contains the contents of the address I ₁₀₀ + V 2 obtained by adding the absolute address 17 and the relative address 18. In this instruction, when the input instruction 12 at the address I ₁₀ + V1 is turned on, the output instruction 16 at the address I ₁₀₀ + V2 is turned on.

[0004]

However, in order to ensure high speed, the PLC does not check whether the range specified by the address with index addition exceeds the device range at the time of execution. . Therefore, there has been a problem that a user may specify an unintended index value and access the PLC beyond the device range, which may cause the PLC to malfunction.

[0005] In addition, there are monitor devices for addresses with index addition, but their functions are insufficient. The first type is to monitor the state of the address while ignoring the index part. The second type is a monitor that takes into account the index portion. However, since the address collection is performed at the end of the scan of the PLC operation, the address obtained by adding the final value of the index is always monitored when the address is used in the repetitive operation. . In the debugging work, although it is necessary to display the address to which the index value is sequentially added, there is a problem that the address is not displayed for each successive addition.

The present invention solves the above-mentioned problem. Even in a ladder program which supports advanced instructions such as repetition operation of an address with an index addition, it is easy to debug by displaying an address to which an index value is sequentially added. It is an object of the present invention to provide a device capable of performing the above.

[0007]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a ladder program unit 10 in which an input instruction or an output instruction including a repetitive operation having an address with an index addition is described, Index value edit screen 20 for determining the index value of the address with index addition to be performed, and the absolute value address and index value of the address with index addition are calculated,
An index calculating means 30 for obtaining a real address; a monitor means 40 for recognizing an on / off state of an input command or an output command at the real address obtained by the index calculating means; and an address with index addition described in the ladder program section. A monitor screen 50 for displaying the input command and the output command by using the input command and the output command recognized by the monitor means, and displaying the address with index addition described in the ladder program section. And a real address screen 60 for displaying an input command and an output command by converting the data into a real address obtained by the index calculating means.

According to the configuration of the present invention, the index calculating means 30 calculates the real address by calculating the absolute value address of the address with index addition and the index value. The monitor means 40 recognizes the on / off state of the input command or output command at the real address, and displays on / off of the input command or output command using the address with index addition on the monitor screen 50. The real address screen 60 displays an input instruction and an output instruction using an address with an index addition,
It is displayed with the real address. Debugging can be performed smoothly by displaying the actual address.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a configuration block diagram showing a first embodiment of the present invention. In the figure, the ladder program unit 10 describes an input instruction and an output instruction including a repetitive operation having an address with index addition. The index value editing screen 20 defines an index value of an address with index addition described in the ladder program unit 10, and sets the index value to 10, for example, for the index register V1. Index calculating unit 30 calculates the absolute value address I ₁₀ and index value V1 of the index addition with address, obtains the real address I ₁₀ + V1.

The monitor unit 40 recognizes an on / off state of an input command or an output command at a real address obtained by the index calculation unit 30. That is, the on / off state of the controlled device can be determined by taking in the value of the real address of the input command or the output command. The monitor screen 50 displays the input command and the output command using the address with the index addition described in the ladder program unit 10 and also displays the on / off state of the input command and the output command recognized by the monitor unit 40. . The on-off state display is, for example, a bold line display for an on-state input command or an output instruction, and a thin line display for an off-state input or output instruction. The real address screen 60 displays the address with index addition described in the ladder program section 10 on the index operation section 3.
The input command and the output command are displayed after being converted to the real address obtained by 0. Note that the on / off state of the input command and the output command recognized by the monitor unit 40 may also be displayed on the real address screen 60.

Next, the operation of the thus constructed apparatus will be described. The ladder program unit 10, the absolute value address I ₁₀ and index addition with address represented by the index value V1 as an input command is present. The absolute value address I _{10 0} and index addition with address represented by the index value V2 is present as an output instruction. The index values V1 and V2 are defined in advance on the index value editing screen 20, but may change sequentially only by defining the initial values. For example, if the index value is V1 + 1, the index value is incremented by one at each repetition.

The real addresses for these input / output instructions are calculated by the index calculation unit 30. Monitor section 40
Accesses the real address of the input / output instruction, grasps the on / off state, and displays it on the monitor screen 50. If the user wants to monitor an input / output instruction at a real address, the real address screen 60 is displayed. Then, when the index value changes sequentially only by defining the initial value, the real address is updated and displayed each time the index value changes.

Next, a case where the range specified by the address with index addition exceeds the device range will be described. In this case, the index operation unit 30
Define a device range in advance. Then, the real address is calculated by the index calculating unit 30, and if it exceeds the device range, the conversion to the real address is stopped and an alarm is output. This makes it possible to prevent unintended execution stoppage of the PLC.

FIG. 2 is a block diagram showing the configuration of a second embodiment of the present invention. Here, an improvement suitable for an application in which the screen area that can be displayed is limited, such as a bass computer, is shown. The display switching unit 70 is provided between the index calculation unit 30 and the real address screen 60, and selects whether to display the monitor screen 50 or the real address screen 60 on the screen. By providing the display switching unit 70 in this way,
Screen area can be used efficiently.

[0015]

As described above, according to the present invention, since the index operation unit 30 is provided to convert an address with an index addition into a real address, debugging of input / output instructions can be performed smoothly. Further, according to the second aspect of the present invention, if the data exceeds the device range, it cannot be converted to a real address, so that there is an effect that the inoperability of the PLC can be prevented.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram showing a first embodiment of the present invention.

FIG. 2 is a configuration block diagram showing a second embodiment of the present invention.

FIG. 3 is a ladder circuit diagram using an address with index addition.

[Explanation of symbols]

 10 Ladder program section 20 Index value editing screen 30 Index calculation means 40 Monitoring means 50 Monitor screen 60 Real address screen

Claims (4)

[Claims] A ladder program section (10) in which an input instruction or an output instruction including an iterative operation having an address with an index addition is described, and an index for determining an index value of the address with an index addition described in the ladder program section. A value editing screen (20), an index operation means (30) for calculating an absolute value address of the address with index addition and an index value to obtain a real address, and an input using the real address obtained by the index operation means Monitor means (4) for recognizing on / off states of commands and output commands.
0) and a monitor that displays an input command and an output command using the address with the index addition described in the ladder program section, and also displays an on / off state of the input command and the output command recognized by the monitor unit. A screen (50), and a real address screen (60) for converting an address with index addition described in the ladder program section into a real address obtained by the index calculating means and displaying an input command or an output command. A debugging device for a ladder program, comprising: 2. The method according to claim 1, wherein the index calculating means defines in advance a range of an absolute value address which is allowed as a device range, and when the calculated real address exceeds the range of the absolute value address, the index address is added to the real address. 2. The debugging device for a ladder program according to claim 1, wherein conversion is not performed. 3. The on / off display of the monitor screen is characterized by a bold line display for an on-state input command or an output instruction, and a thin line display for an off-state input or output command. The debugging device for a ladder program according to claim 1. 4. The ladder program unit according to claim 1,
0), index value editing screen (20), index calculating means (30), monitoring means (40), monitor screen (5
The debugger for a ladder program having a real address screen (0) and a real address screen (60), further comprising: display switching means (70) for switching and displaying the monitor screen and the real address screen on the screen. Ladder program debugging device.