JPH10233667A - Snubber circuit for protecting semiconductor element - Google Patents
Snubber circuit for protecting semiconductor elementInfo
- Publication number
- JPH10233667A JPH10233667A JP3447997A JP3447997A JPH10233667A JP H10233667 A JPH10233667 A JP H10233667A JP 3447997 A JP3447997 A JP 3447997A JP 3447997 A JP3447997 A JP 3447997A JP H10233667 A JPH10233667 A JP H10233667A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- diode
- snubber
- main
- semiconductor switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、パルス電源装置の
スイッチ部分に使用している半導体スイッチ、または一
般的な電力変換装置に使用している半導体素子の保護回
路としてのスナバ回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor switch used in a switch portion of a pulse power supply device or a snubber circuit as a protection circuit for a semiconductor element used in a general power conversion device.
【０００２】[0002]
【従来の技術】一般的に使用されている電力変換装置の
スナバ回路は、図４に示すように半導体素子ＴＨＹと並
列に、抵抗ＲS0及びコンデンサＣS0の直列回路を接続
し、ターンオフ時に半導体素子ＴＨＹに加わる急峻なｄ
ｖ／ｄｔを持った過電圧の抑制及びスイッチング損失の
低減を行ったり、ターンオン時に急峻な電流の立ち上が
りによるｄｉ／ｄｔの抑制を目的とする保護回路として
使用されている。2. Description of the Related Art As shown in FIG. 4, a snubber circuit of a power converter generally used includes a series circuit of a resistor R S0 and a capacitor C S0 connected in parallel with a semiconductor element THY. Steep d added to element THY
It is used as a protection circuit for suppressing overvoltage and switching loss with v / dt, and for suppressing di / dt due to a sharp rise of current at turn-on.
【０００３】また、急峻なパルス電流を作成するパルス
電源装置においては、図５に示すように主半導体スイッ
チ（サイリスタ）ＴＨＹと直列に逆サージ電圧吸収用の
ダイオード（主回路ダイオード）Ｄを接続し、主半導体
スイッチＴＨＹにスナバ回路Ｓ1を、主回路ダイオード
Ｄにスナバ回路Ｓ2をそれぞれ並列に接続して、過電圧
の抑制及びスイッチング損失の低減を目的とする保護回
路として使用されている。スナバ回路Ｓ1（Ｓ2）は、抵
抗ＲS1（ＲS2）とコンデンサＣS1（ＣS2）を直列接続し
た構成としている。In a pulse power supply for generating a steep pulse current, a diode (main circuit diode) D for absorbing a reverse surge voltage is connected in series with a main semiconductor switch (thyristor) THY as shown in FIG. the snubber circuits S 1 to the main semiconductor switches THY, by connecting the snubber circuit S 2 in parallel to the main circuit diode D, and is used as a protection circuit for the purpose of reducing the suppression and switching loss of the overvoltage. The snubber circuit S 1 (S 2 ) has a configuration in which a resistor R S1 (R S2 ) and a capacitor C S1 (C S2 ) are connected in series.
【０００４】[0004]
【発明が解決しようとする課題】スナバ回路のコンデン
サＣS0（ＣS1，ＣS2）はｄｖ／ｄｔによる過電圧の抑制
を行い、抵抗ＲS0（ＲS1，ＲS2）はターンオン時のｄｉ
／ｄｔの抑制を行っており、素子にとってはどちらも大
きなものを使用することで、素子の負荷は低減される。The capacitor C S0 (C S1 , C S2 ) of the snubber circuit suppresses overvoltage by dv / dt, and the resistance R S0 (R S1 , R S2 ) is di at turn-on.
/ Dt is suppressed, and the load on the element is reduced by using a large element for both.
【０００５】しかしながら、スナバ回路での電力損失
は、ＣSＶ2ｆ／２となり、回路の定数に比例して大きく
なる。即ち、回路の効率に大きく影響する。従って、ス
ナバ回路定数は適切に選択しなければならない。また、
スナバ回路の配線のインダクタンスも素子に与えるｄｉ
／ｄｔの傾きに影響を及ぼすので、配線方法にも十分な
配慮が必要となる。However, the power loss in the snubber circuit is C S V 2 f / 2, which increases in proportion to the circuit constant. That is, it greatly affects the efficiency of the circuit. Therefore, the snubber circuit constant must be appropriately selected. Also,
Di which gives the inductance of the snubber circuit wiring to the element
Since this affects the slope of / dt, it is necessary to give due consideration to the wiring method.
【０００６】本発明は上記事情に鑑みてなされたもの
で、電力損失の軽減が図れる半導体素子保護用スナバ回
路を提供することを目的とする。The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor device protection snubber circuit capable of reducing power loss.
【０００７】[0007]
【課題を解決するための手段】本発明は、直列接続の主
半導体スイッチ素子と主回路ダイオードの各々に設けた
スナバ回路において、主半導体スイッチ素子側のスナバ
抵抗にダイオードを主半導体スイッチ素子と逆並列とな
るように並列接続したことを特徴とする。According to the present invention, in a snubber circuit provided in each of a main semiconductor switch element and a main circuit diode connected in series, a diode is connected to a snubber resistor on the side of the main semiconductor switch element in reverse to the main semiconductor switch element. It is characterized by being connected in parallel so as to be in parallel.
【０００８】本発明は、直列接続の主半導体スイッチ素
子と主回路ダイオードの各々に設けたスナバ回路におい
て、主半導体スイッチ素子側のスナバ抵抗を主半導体ス
イッチ素子と主回路ダイオードの直列接続点側に設け、
主半導体スイッチ素子側スナバ回路の抵抗とコンデンサ
の接続点に主回路ダイオード側スナバ回路の一端を接続
したことを特徴とする。According to the present invention, in a snubber circuit provided in each of a main semiconductor switch element and a main circuit diode connected in series, a snubber resistor on the main semiconductor switch element side is connected to a series connection point side of the main semiconductor switch element and the main circuit diode. Provided,
One end of the main circuit diode side snubber circuit is connected to a connection point of the resistor and the capacitor of the main semiconductor switch element side snubber circuit.
【０００９】また本発明は、直列接続の主半導体スイッ
チ素子と主回路ダイオードの各々に設けたスナバ回路に
おいて、主半導体スイッチ素子側スナバ回路のコンデン
サを省き、代わりにダイオードを主半導体スイッチ素子
と主回路ダイオードの直列接続点側に位置し、かつ主半
導体スイッチ素子と逆並列となるように設け、このダイ
オードとスナバ抵抗の接続点に主回路ダイオード側スナ
バ回路の一端を接続したことを特徴とする。Further, in the present invention, in the snubber circuit provided in each of the main semiconductor switch element and the main circuit diode connected in series, the capacitor of the snubber circuit on the main semiconductor switch element side is omitted, and a diode is used instead of the main semiconductor switch element. It is located on the side of the series connection point of the circuit diode and is provided in anti-parallel with the main semiconductor switch element, and one end of the main circuit diode side snubber circuit is connected to the connection point of this diode and the snubber resistor. .
【００１０】[0010]
【発明の実施の形態】図１に本発明の実施形態１を示
す。図中、ＴＨＹは主回路のサイリスタ、Ｄはこのサイ
リスタＴＨＹと直列に接続した主回路ダイオードで、サ
イリスタＴＨＹには抵抗ＲS1及びコンデンサＣS1の直列
回路を、またダイオードＤには抵抗ＲＳ２及びコンデン
サＣＳ２の直列回路をそれぞれ並列接続している。サイ
リスタＴＨＹ側の抵抗ＲS1にはサイリスタＴＨＹと逆並
列となるようダイオードＤSを並列に接続している。つ
まり、サイリスタＴＨＹとダイオードＤのそれぞれにス
ナバ回路を接続している。FIG. 1 shows a first embodiment of the present invention. In the figure, THY is a thyristor of the main circuit, D is a main circuit diode connected in series with the thyristor THY, a series circuit of a resistor R S1 and a capacitor C S1 is provided for the thyristor THY, and a resistor RS2 and a capacitor are provided for the diode D. CS2 series circuits are connected in parallel. The resistor R S1 of the thyristor THY side connecting the diode D S so that thyristor THY and antiparallel in parallel. That is, a snubber circuit is connected to each of the thyristor THY and the diode D.
【００１１】このようにサイリスタＴＨＹと直列にダイ
オージＤを接続した場合、サイリスタＴＨＹのスナバ回
路の抵抗ＲS1に並列にダイオージＤSを接続すると、サ
イリスタＴＨＹに逆電圧が印加された時、電流は抵抗Ｒ
S1を通らずにダイオードＤSを通るようになる。つま
り、配線のインダンタンスが実質的に小さくなる。ま
た、ターンオン時には、従来と同様に抵抗ＲS1が存在し
ており、ｄｉ／ｄｔの抑制効果がある。When the diage D is connected in series with the thyristor THY as described above, and when the diage D S is connected in parallel with the resistor R S1 of the snubber circuit of the thyristor THY, when a reverse voltage is applied to the thyristor THY, the current becomes Resistance R
It will pass through the diode D S without passing through S1. That is, the inductance of the wiring is substantially reduced. At the time of turn-on, the resistor R S1 exists as in the conventional case, and has an effect of suppressing di / dt.
【００１２】図２に本発明の実施形態２を示す。この実
施形態２では、サイリスタＴＨＹのスナバ回路の抵抗Ｒ
S1をサイリスタＴＨＹとダイオードＤの接続点側に設
け、この抵抗ＲS1とコンデンサＣS1の接続点にダイオー
ドＤ側のスナバ回路の一端を接続している。この場合
は、実施形態１のダイオードＤSを省略している。FIG. 2 shows a second embodiment of the present invention. In the second embodiment, the resistance R of the snubber circuit of the thyristor THY
S1 is provided at the connection point between the thyristor THY and the diode D, and one end of the snubber circuit on the diode D side is connected to the connection point between the resistor R S1 and the capacitor C S1 . In this case, it is omitted diode D S of the first embodiment.
【００１３】このような構成とすると、インダクタンス
の小さい配線となり、実施形態１同様な効果が期待でき
る。With this configuration, the wiring has a small inductance, and the same effect as in the first embodiment can be expected.
【００１４】図３に本発明の実施形態３を示す。この実
施形態では、図３（ａ）のようにサイリスタＴＨＹ側の
スナバ回路のコンデンサを省き、実施形態２の抵抗ＲS1
の位置にダイオードＤSを設けている。FIG. 3 shows a third embodiment of the present invention. In this embodiment, as shown in FIG. 3A, the capacitor of the snubber circuit on the thyristor THY side is omitted, and the resistor R S1 of the second embodiment is omitted.
It is provided a diode D S in position.
【００１５】このような構成とすると、サイリスタＴＨ
Ｙに逆電圧が印加された時にサイリスタＴＨＹの逆サー
ジ電圧の分圧比が下がる。また、ターンオン時には図３
（ｂ）の等価回路となり、従来回路と同様にｄｉ／ｄｔ
の抑制効果がある。With such a configuration, the thyristor TH
When a reverse voltage is applied to Y, the voltage dividing ratio of the reverse surge voltage of the thyristor THY decreases. Also, at the time of turn-on, FIG.
The equivalent circuit of (b) is obtained, and di / dt as in the conventional circuit.
There is an effect of suppressing.
【００１６】上記各実施形態は、サイリスタの順方向阻
止電圧よりも逆回復サージ電圧の方が高い回路方式にお
いて、Ａ．使用電圧をサイリスタ順方向阻止能力の定格
近辺とし、逆サージはサイリスタとダイオードの直列回
路で分担させること、Ｂ．この時、サイリスタの損失と
逆方向のサージ電圧分担を低減させるため、サイリスタ
側スナバ回路の抵抗をサイリスタとダイオードの直列接
続点側に位置させるとともに、ダイオード側スナバ抵抗
の一部として利用すること、を意図したものである。Each of the embodiments described above relates to a circuit system in which the reverse recovery surge voltage is higher than the forward blocking voltage of the thyristor. B. The operating voltage should be around the rated value of the thyristor forward blocking capability, and the reverse surge should be shared by the series circuit of the thyristor and the diode. At this time, in order to reduce the surge voltage sharing in the opposite direction to the thyristor loss, the resistance of the thyristor-side snubber circuit is located on the side of the series connection point of the thyristor and the diode, and is used as a part of the diode-side snubber resistance. It is intended.
【００１７】[0017]
【発明の効果】以上のように本発明によれば、配線のイ
ンダンタンスが実質的に小さくなるので、ｄｉ／ｄｔ及
びｄｖ／ｄｔの抑制効果が高くなる。また、主回路のサ
イリスタに並列接続していたコンデンサを取り除き、代
わりにダイオードを設けたので、サイリスタの逆サージ
電圧の分圧比を低下させることが可能となり、主半導体
スイッチ素子の過電圧保護効果が向上する。更に、定数
の小さい回路素子で構成するため、電力損失の軽減が図
れ、装置効率の向上が期待できる、といった利点が生じ
る。As described above, according to the present invention, since the inductance of the wiring is substantially reduced, the effect of suppressing di / dt and dv / dt is enhanced. In addition, the capacitor connected in parallel to the thyristor in the main circuit has been removed, and a diode has been provided instead, so that the voltage division ratio of the reverse surge voltage of the thyristor can be reduced, improving the overvoltage protection effect of the main semiconductor switch element. I do. Furthermore, since the circuit is constituted by a circuit element having a small constant, there is an advantage that power loss can be reduced and an improvement in device efficiency can be expected.
【図１】本発明の実施形態１を示す回路図。FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
【図２】本発明の実施形態２を示す回路図。FIG. 2 is a circuit diagram showing a second embodiment of the present invention.
【図３】本発明の実施形態３を示すもので、（ａ）は回
路図、（ｂ）はターンオン時の等価回路図。3A and 3B show a third embodiment of the present invention, in which FIG. 3A is a circuit diagram, and FIG. 3B is an equivalent circuit diagram at the time of turn-on.
【図４】スナバ回路の一般的な回路図。FIG. 4 is a general circuit diagram of a snubber circuit.
【図５】サイリスタにダイオードを直列接続した場合の
スナバ回路の構成例を示す回路図。FIG. 5 is a circuit diagram showing a configuration example of a snubber circuit when a diode is connected to a thyristor in series.
ＴＨＹ…主回路のサイリスタ Ｄ…主回路ダイオード ＲS1，ＲS2…スナバ抵抗 ＣS1，ＣS2…スナバコンデンサ ＤS…スナバダイオードTHY: thyristor of main circuit D: main circuit diode R S1 , R S2 : snubber resistance C S1 , C S2 : snubber capacitor D S : snubber diode
Claims (3)
路ダイオードの各々に設けたスナバ回路において、主半
導体スイッチ素子側のスナバ抵抗にダイオードを主半導
体スイッチ素子と逆並列となるように並列接続したこと
を特徴とする半導体素子保護用スナバ回路。In a snubber circuit provided in each of a main semiconductor switch element and a main circuit diode connected in series, a diode is connected in parallel to a snubber resistor on the main semiconductor switch element side so as to be antiparallel to the main semiconductor switch element. A snubber circuit for protecting a semiconductor element.
路ダイオードの各々に設けたスナバ回路において、主半
導体スイッチ素子側のスナバ抵抗を主半導体スイッチ素
子と主回路ダイオードの直列接続点側に設け、主半導体
スイッチ素子側スナバ回路の抵抗とコンデンサの接続点
に主回路ダイオード側スナバ回路の一端を接続したこと
を特徴とする半導体素子保護用スナバ回路。2. A snubber circuit provided in each of a main semiconductor switch element and a main circuit diode connected in series, wherein a snubber resistor on the main semiconductor switch element side is provided on a series connection point side between the main semiconductor switch element and the main circuit diode. A snubber circuit for protecting a semiconductor element, wherein one end of a snubber circuit on a main circuit diode side is connected to a connection point of a resistor and a capacitor of the snubber circuit on a main semiconductor switch element side.
路ダイオードの各々に設けたスナバ回路において、主半
導体スイッチ素子側スナバ回路のコンデンサを省き、代
わりにダイオードを主半導体スイッチ素子と主回路ダイ
オードの直列接続点側に位置し、かつ主半導体スイッチ
素子と逆並列となるように設け、このダイオードとスナ
バ抵抗の接続点に主回路ダイオード側スナバ回路の一端
を接続したことを特徴とする半導体素子保護用スナバ回
路。3. A snubber circuit provided in each of a main semiconductor switch element and a main circuit diode connected in series, the capacitor of the main semiconductor switch element side snubber circuit is omitted, and a diode is used instead of the main semiconductor switch element and the main circuit diode. The semiconductor element protection is characterized in that it is provided on the side of the series connection point and is provided in anti-parallel with the main semiconductor switch element, and one end of the main circuit diode side snubber circuit is connected to the connection point of the diode and the snubber resistor. For snubber circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3447997A JPH10233667A (en) | 1997-02-19 | 1997-02-19 | Snubber circuit for protecting semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3447997A JPH10233667A (en) | 1997-02-19 | 1997-02-19 | Snubber circuit for protecting semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10233667A true JPH10233667A (en) | 1998-09-02 |
Family
ID=12415394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3447997A Pending JPH10233667A (en) | 1997-02-19 | 1997-02-19 | Snubber circuit for protecting semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10233667A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012198661A (en) * | 2011-03-18 | 2012-10-18 | Panasonic Corp | Load control device |
-
1997
- 1997-02-19 JP JP3447997A patent/JPH10233667A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012198661A (en) * | 2011-03-18 | 2012-10-18 | Panasonic Corp | Load control device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5077651A (en) | Snubber circuit of power converter | |
| JP3598933B2 (en) | Power converter | |
| CA2312456C (en) | Npc inverter control system | |
| JP5317413B2 (en) | Semiconductor switch and power converter using the semiconductor switch | |
| KR102184786B1 (en) | Modular Multilevel Converter Sub Module with DC Fault Current Breaking and Method for Controlling the same | |
| JPH0437649B2 (en) | ||
| US6704182B2 (en) | Method for protection of a matrix converter against overvoltages, and an active overvoltage device | |
| JP2020014045A (en) | Bidirectional switch circuit | |
| JPH07312878A (en) | Snubber circuit for three-level inverter | |
| JPH0457249B2 (en) | ||
| JPH10233667A (en) | Snubber circuit for protecting semiconductor element | |
| JPH01209951A (en) | Power conversion device | |
| JPH10174424A (en) | Power converter | |
| JPH10248264A (en) | Neutral-point clamping-type power conversion apparatus | |
| JP2015156795A (en) | Semiconductor switch circuit and power conversion device | |
| EP0416510B1 (en) | DC power supply circuit arrangement | |
| JP3235396B2 (en) | Inverter device | |
| JP2005531277A (en) | Circuit device with voltage intermediate circuit converter | |
| JP2000116114A (en) | Semiconductor power-converting device | |
| JP2000166248A (en) | Power conversion device | |
| JPH03236280A (en) | Semiconductor device | |
| JP3660480B2 (en) | Power converter wiring structure | |
| JP3117457B2 (en) | Snubber circuit | |
| JPS6029018A (en) | Semiconductor switch | |
| JPH08196083A (en) | Inverter |