JPH10232831A5 - - Google Patents
Info
- Publication number
- JPH10232831A5 JPH10232831A5 JP1998005361A JP536198A JPH10232831A5 JP H10232831 A5 JPH10232831 A5 JP H10232831A5 JP 1998005361 A JP1998005361 A JP 1998005361A JP 536198 A JP536198 A JP 536198A JP H10232831 A5 JPH10232831 A5 JP H10232831A5
- Authority
- JP
- Japan
- Prior art keywords
- cache
- duplicate
- tag
- partial
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/783,918 US5907853A (en) | 1997-01-17 | 1997-01-17 | Method and apparatus for maintaining duplicate cache tags with selectable width |
| US783,918 | 1997-01-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10232831A JPH10232831A (ja) | 1998-09-02 |
| JPH10232831A5 true JPH10232831A5 (enExample) | 2005-07-14 |
Family
ID=25130814
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10005361A Withdrawn JPH10232831A (ja) | 1997-01-17 | 1998-01-14 | キャッシュ・タグ維持装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US5907853A (enExample) |
| JP (1) | JPH10232831A (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9704542D0 (en) * | 1997-03-05 | 1997-04-23 | Sgs Thomson Microelectronics | A cache coherency mechanism |
| US6546464B2 (en) * | 1999-01-08 | 2003-04-08 | Nortel Networks Limited | Method and apparatus for increasing data rates in a data network while maintaining system coherency |
| US8332592B2 (en) * | 2004-10-08 | 2012-12-11 | International Business Machines Corporation | Graphics processor with snoop filter |
| US9128857B2 (en) | 2013-01-04 | 2015-09-08 | Apple Inc. | Flush engine |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4349871A (en) * | 1980-01-28 | 1982-09-14 | Digital Equipment Corporation | Duplicate tag store for cached multiprocessor system |
| US5226146A (en) * | 1988-10-28 | 1993-07-06 | Hewlett-Packard Company | Duplicate tag store purge queue |
| US5319766A (en) * | 1992-04-24 | 1994-06-07 | Digital Equipment Corporation | Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system |
| US5537570A (en) * | 1993-10-12 | 1996-07-16 | Texas Instruments Incorporated | Cache with a tag duplicate fault avoidance system and method |
| US5559987A (en) * | 1994-06-30 | 1996-09-24 | Digital Equipment Corporation | Method and apparatus for updating a duplicate tag status in a snoop bus protocol based computer system |
-
1997
- 1997-01-17 US US08/783,918 patent/US5907853A/en not_active Expired - Lifetime
-
1998
- 1998-01-14 JP JP10005361A patent/JPH10232831A/ja not_active Withdrawn
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5475055B2 (ja) | キャッシュされたメモリデータを伴うキャッシュメモリ属性インジケータ | |
| US20100131812A1 (en) | Resizable Cache Memory | |
| US6457105B1 (en) | System and method for managing data in an asynchronous I/O cache memory | |
| JP2018190412A (ja) | ハイブリッドメモリにおける書き込み及びフラッシュ支援のためのメモリモジュール及びその動作方法 | |
| US5802571A (en) | Apparatus and method for enforcing data coherency in an information handling system having multiple hierarchical levels of cache memory | |
| CN106560798B (zh) | 一种内存访问方法、装置及计算机系统 | |
| JPS58212694A (ja) | メモリシステム | |
| CN109219804B (zh) | 非易失内存访问方法、装置和系统 | |
| CN101176078A (zh) | 用于优化转换后备缓冲器条目的方法及系统 | |
| US20170315915A1 (en) | Leases for Blocks of Memory in a Multi-Level Memory | |
| CN113515470A (zh) | 高速缓冲存储器寻址 | |
| CN117859178A (zh) | 用于经由协同方法保护存储器设备的方法和装置 | |
| TW507124B (en) | Status bits for cache memory | |
| US9489308B2 (en) | Cache line eviction based on write count | |
| JPH07121439A (ja) | 部分的に機能的なキャッシュメモリを使用する構成体 | |
| US10366008B2 (en) | Tag and data organization in large memory caches | |
| EP1883075A1 (en) | Content-addressable memory that supports a priority ordering between banks | |
| JPH10232831A5 (enExample) | ||
| US7636815B1 (en) | System and method for handling direct memory accesses | |
| CN101116063A (zh) | 具有高速缓存内存之系统及访问方法 | |
| JPH10500235A (ja) | データ記憶装置 | |
| US6643736B1 (en) | Scratch pad memories | |
| US7721042B2 (en) | Content-addressable memory that supports a priority ordering between banks of differing sizes | |
| JP2013097637A (ja) | キャッシュ装置、メモリシステム及びデータ転送方法 | |
| US8117393B2 (en) | Selectively performing lookups for cache lines |