JPH1022635A - Multilayer board for high frequency circuit - Google Patents

Multilayer board for high frequency circuit

Info

Publication number
JPH1022635A
JPH1022635A JP8171414A JP17141496A JPH1022635A JP H1022635 A JPH1022635 A JP H1022635A JP 8171414 A JP8171414 A JP 8171414A JP 17141496 A JP17141496 A JP 17141496A JP H1022635 A JPH1022635 A JP H1022635A
Authority
JP
Japan
Prior art keywords
layer
circuit
holes
leak
frequency circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8171414A
Other languages
Japanese (ja)
Other versions
JP2878188B2 (en
Inventor
Makoto Sato
佐藤  誠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FUKUSHIMA NIPPON DENKI KK
NEC Fukushima Ltd
Original Assignee
FUKUSHIMA NIPPON DENKI KK
NEC Fukushima Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FUKUSHIMA NIPPON DENKI KK, NEC Fukushima Ltd filed Critical FUKUSHIMA NIPPON DENKI KK
Priority to JP8171414A priority Critical patent/JP2878188B2/en
Publication of JPH1022635A publication Critical patent/JPH1022635A/en
Application granted granted Critical
Publication of JP2878188B2 publication Critical patent/JP2878188B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a multilayer board for a high frequency circuit which can reduce the leakage of needless radiation. SOLUTION: A plurality of through holes 12, 12,... for prevention of leakage piercing the whole layers of a four-layer board 11 are provided successively in the direction of isolating both, between an input connector and a generation source of needless radiation. Moreover, the shield effect to that needless radiation can be improved by putting the interval between the through holes 12, 12,... for leak prevention to half or under the wavelength of needless radiation. Furthermore, the shield effect can be improved while maintaining the strength of a board by providing the through holes 12',12',... for leak prevention zigzag to the through holes 12, 12,... for leak prevention.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、マイクロ波帯で
使用される部品が実装される高周波回路用多層基板に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer board for a high-frequency circuit on which components used in a microwave band are mounted.

【0002】[0002]

【従来の技術】今日、多層基板を用いてマイクロ波回路
を構成し、マイクロ波回路の外形寸法の小型化を図るこ
とは周知となっている。すなわち、例えば4層基板を用
いてマイクロ波回路を構成する場合、第1層にマイクロ
ストリップ回路、第2層に接地面、第3層および第4層
にその他の回路を構成する、というように1つのマイク
ロ波回路を各層に分けて構成することにより、その外形
寸法を小型化することができる。
2. Description of the Related Art At present, it is well known that a microwave circuit is formed by using a multilayer substrate to reduce the external dimensions of the microwave circuit. That is, for example, when a microwave circuit is formed using a four-layer substrate, a microstrip circuit is formed on the first layer, a ground plane is formed on the second layer, and other circuits are formed on the third and fourth layers. By configuring one microwave circuit in each layer, the external dimensions can be reduced.

【0003】また、多層基板における不要輻射(スプリ
アス,局発信号等のリーク)の低減を図るため、例え
ば、特開昭63−90892号に開示されているよう
に、多層基板の内層パターンを信号ラインに使用し、表
面の層を接地面とすることでシールド効果を得る高周波
用多層基板回路が提案されている。また、実開平5−2
1473号に開示されているように、電子部品が実装さ
れる基板上の凹溝周囲に、スルーホールを複数設けて、
上記凹溝からの不要輻射を抑える部品実装用プリント基
板も提案されている。
Further, in order to reduce unnecessary radiation (spurious, leak of local signal, etc.) in a multilayer substrate, for example, as disclosed in Japanese Patent Application Laid-Open No. 63-90892, the inner layer pattern of the multilayer substrate is signaled. A multi-layer circuit board for high frequency has been proposed which is used for lines and has a shielding effect by using the surface layer as a ground plane. In addition, 5-2
As disclosed in No. 1473, a plurality of through holes are provided around a concave groove on a substrate on which an electronic component is mounted,
A printed circuit board for component mounting that suppresses unnecessary radiation from the concave groove has also been proposed.

【0004】[0004]

【発明が解決しようとする課題】ところで、マイクロ波
回路においては、回路入力端のリターンロスの改善や、
回路内部からの不要輻射の漏れを阻止するために、通
常、その入力部にアイソレータが直列に接続されてい
る。しかしながら、多層基板の内層を接地面とし、ま
た、表面の層をマイクロストリップ線路として、ストリ
ップライン型アイソレータを取り付けた場合、該アイソ
レータの逆方向アイソレーションが低下することがあ
る。
By the way, in a microwave circuit, the return loss at the circuit input end is improved,
In order to prevent leakage of unnecessary radiation from inside the circuit, an isolator is usually connected in series to the input portion. However, when a strip line type isolator is attached with the inner layer of the multilayer substrate as a ground plane and the surface layer as a microstrip line, the reverse isolation of the isolator may be reduced.

【0005】すなわち、前述したように、4層基板の第
1層にマイクロストリップ回路、第2層に接地面、第3
層および第4層にその他の回路を構成した場合、例え
ば、第3層に形成された回路において、不要輻射が発生
したとすると、この不要輻射がアイソレータを通過せ
ず、第2層−第3層間,第3層−第4層間の絶縁層を通
って信号入力端に漏れ込んでしまうことがある。このよ
うな場合、アイソレータにおける見かけ上の逆方向アイ
ソレーションが低下し、アイソレータを設けたことによ
る効果が半減してまう。
That is, as described above, the microstrip circuit is provided on the first layer of the four-layer substrate, the ground plane is provided on the second layer, and the third layer is provided on the third layer.
When another circuit is formed in the layer and the fourth layer, for example, if unnecessary radiation occurs in the circuit formed in the third layer, the unnecessary radiation does not pass through the isolator, and the second layer to the third layer It may leak into the signal input terminal through the insulating layer between the layers and between the third and fourth layers. In such a case, apparent reverse isolation in the isolator is reduced, and the effect of providing the isolator is reduced by half.

【0006】この発明は、このような事情に鑑みてなさ
れたものであり、不要輻射のリークを、より低減させる
ことができる高周波回路用多層基板を提供することを目
的としている。
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a multilayer substrate for a high-frequency circuit capable of further reducing unnecessary radiation leakage.

【0007】[0007]

【課題を解決するための手段】請求項1に記載の発明
は、複数の層からなり、回路が形成された少なくとも1
つの内層と、全面に亘って接地パターンが形成された少
なくとも1つの層と、外部信号が入力される入力端とを
有する高周波回路用多層基板において、前記入力端と、
前記内層の回路形成部との間に、前記高周波回路用多層
基板の全層を貫くスルーホールを、前記入力端と回路形
成部を隔てる方向に、所定の間隔で複数設けたことを特
徴とする高周波回路用多層基板。
According to a first aspect of the present invention, there is provided at least one circuit comprising a plurality of layers and having a circuit formed thereon.
One inner layer, at least one layer in which a ground pattern is formed over the entire surface, and an input terminal to which an external signal is input;
A plurality of through holes penetrating all layers of the multilayer substrate for high-frequency circuits are provided at predetermined intervals between the input end and the circuit forming portion between the inner layer circuit forming portion and the circuit forming portion. Multilayer substrate for high frequency circuits.

【0008】また、請求項2に記載の発明は、請求項1
に記載の高周波回路用多層基板において、前記所定の間
隔は、前記内層に形成された回路において発生する不要
輻射の波長の1/2以下とすることを特徴とする。
[0008] The invention described in claim 2 is the first invention.
In the multilayer board for a high-frequency circuit described in (1), the predetermined interval is not more than の of the wavelength of unnecessary radiation generated in the circuit formed in the inner layer.

【0009】また、請求項3に記載の発明は、請求項1
または2に記載の高周波回路用多層基板において、前記
スルーホールを、千鳥状に設けることを特徴とする。
[0009] The invention described in claim 3 is the first invention.
Alternatively, in the multilayer substrate for a high-frequency circuit described in 2, the through holes are provided in a staggered manner.

【0010】[0010]

【発明の実施の形態】以下、図面を参照して、この発明
の一実施形態について説明する。図1および図2は、本
実施形態の4層基板1において、RF信号の入力部周辺
における各層のパターンを示す図であり、図1(a)
は、本実施形態における4層基板1の第1層1aのパタ
ーンを示す上面図、図1(b)は、第2層1bのパター
ンを示す透視図である。また、図2(a)は、第3層1
cのパターンを示す透視図であり、図2(b)は、上面
から第4層1dのパターンを見た時の透視図である。図
3は、図1および図2において、A−A部の断面を示す
断面図である。また、図1ないし図3において、斜線で
示す部分は、銅箔等の金属層が形成されていることを示
している。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 and FIG. 2 are diagrams showing patterns of respective layers around an input portion of an RF signal in the four-layer substrate 1 of the present embodiment.
Is a top view showing a pattern of the first layer 1a of the four-layer substrate 1 in the present embodiment, and FIG. 1B is a perspective view showing a pattern of the second layer 1b. FIG. 2A shows the third layer 1.
FIG. 2B is a perspective view showing a pattern of a fourth layer 1d viewed from the upper surface. FIG. 3 is a cross-sectional view showing a cross section taken along the line AA in FIGS. 1 and 2. In FIGS. 1 to 3, a hatched portion indicates that a metal layer such as a copper foil is formed.

【0011】これらの図において、4層基板1は、RF
パターン2,3が形成された第1層1a、基板全面に亘
って接地パターンとなっている第2層1b、および、電
源ラインやその他回路のパターン(図示略)が形成され
た第3層1c、第4層1dからなっている。また、上述
した第1層1aから第4層1dの間には、それぞれ絶縁
層4が形成されている。5は外部からのRF信号が入力
される入力コネクタであり、その中心導体5aはRFパ
ターン2と電気的に接続されている。6は表面実装型ア
イソレータであり、入力コネクタ5から入力されたRF
信号をRFパターン2からRFパターン3へ通過させる
と共に、RFパターン3からRFパターン2へ通過しよ
うとする信号を減衰させる。
[0011] In these figures, the four-layer substrate 1 has an RF
A first layer 1a on which patterns 2 and 3 are formed, a second layer 1b which is a ground pattern over the entire surface of the substrate, and a third layer 1c on which power supply lines and other circuit patterns (not shown) are formed. , The fourth layer 1d. In addition, an insulating layer 4 is formed between the first layer 1a to the fourth layer 1d described above. Reference numeral 5 denotes an input connector to which an external RF signal is input, and a center conductor 5a thereof is electrically connected to the RF pattern 2. Reference numeral 6 denotes a surface mount type isolator, and RF input from the input connector 5
The signal is passed from the RF pattern 2 to the RF pattern 3 and the signal that is going to pass from the RF pattern 3 to the RF pattern 2 is attenuated.

【0012】7〜10はそれぞれ第1層1aに設けられ
たパッドであり、各パッドには第2層1bまで貫通する
複数の接地確保用スルーホール11,11,…が設けら
れ、第1層1aにおいて接地面を確保している。また、
表面実装型アイソレータ6は、これらパッド7〜10に
ハンダ等によって実装される。12,12,…は、それ
ぞれ第1層1aから第4層1dまで貫通して設けられた
リーク防止用スルーホールであり、第3層1cで発生す
るRFリーク13が、第2層1b−第3層1c間および
第3層1c−第4層1d間の絶縁層4を通り、入力コネ
クタ5へ漏れ込むのを防止している。ここで、RFリー
ク13は、上述したその他回路に使用されるミキサ等の
局発信号のリークとする。
Numerals 7 to 10 denote pads provided on the first layer 1a. Each pad is provided with a plurality of through holes 11, 11,... For securing ground, penetrating to the second layer 1b. At 1a, a ground plane is secured. Also,
The surface mount isolator 6 is mounted on these pads 7 to 10 by soldering or the like. Reference numerals 12, 12,... Denote through holes for preventing leakage provided through the first layer 1a to the fourth layer 1d, respectively. The RF leakage 13 generated in the third layer 1c is caused by the second layer 1b-the second layer 1b. The leakage through the insulating layer 4 between the third layer 1c and between the third layer 1c and the fourth layer 1d to the input connector 5 is prevented. Here, the RF leak 13 is a leak of a local signal from a mixer or the like used in the above-described other circuits.

【0013】これらリーク防止用スルーホール12,1
2,…は、RFリーク13が入力コネクタ5へと伝播す
る方向に対して、ほぼ直交する直線上に複数設けられて
いる。ここで、リーク防止用スルーホール12,12,
…の間隔はRFリーク13の1/2波長以下にすること
により、そのRFリーク13に対するシールド効果が得
られるが、多層基板の寸法および強度等を考慮した上
で、できる限り密に設けることが好ましい。14,15
は、4層基板1が取り付けられる金属ケースである。
The leak preventing through holes 12, 1
Are provided on a straight line substantially orthogonal to the direction in which the RF leak 13 propagates to the input connector 5. Here, the leak prevention through holes 12, 12,
By setting the distance between... To be equal to or less than half the wavelength of the RF leak 13, a shielding effect against the RF leak 13 can be obtained. However, in consideration of the dimensions and strength of the multilayer substrate, the gap should be provided as densely as possible. preferable. 14,15
Is a metal case to which the four-layer board 1 is attached.

【0014】上述した4層基板1においては、RFリー
ク13を発生する回路が形成された絶縁層4と入力コネ
クタ5との間に、リーク防止用スルーホール12,1
2,…が設けられており、このリーク防止用スルーホー
ル12,12,…は、上記回路が形成された絶縁層4と
入力コネクタ5とを隔てる方向(図1(a)において上
下方向)に連設されている。すなわち、RFリーク13
が入力コネクタ5へと伝播する方向に対し、ほぼ直交す
る方向に複数設けられている。このため、第2層1b−
第3層1c間および第3層1c−第4層1d間の絶縁層
4に漏れ込んだRFリーク13が入力コネクタ5が設け
られた方向に伝播する際、これらリーク防止用スルーホ
ール12,12,…によって大幅に減衰されることにな
る。
In the above-described four-layer substrate 1, between the insulating layer 4 in which the circuit for generating the RF leak 13 is formed and the input connector 5, the leak preventing through holes 12, 1 are provided.
Are provided in the direction (the vertical direction in FIG. 1A) separating the input connector 5 from the insulating layer 4 on which the circuit is formed. It is installed continuously. That is, the RF leak 13
Are provided in a direction substantially orthogonal to the direction in which the signal propagates to the input connector 5. For this reason, the second layer 1b-
When the RF leak 13 leaking into the insulating layer 4 between the third layer 1c and between the third layer 1c and the fourth layer 1d propagates in the direction in which the input connector 5 is provided, these leak preventing through holes 12, 12 are provided. , ... will be greatly attenuated.

【0015】また、リーク防止用スルーホール12,1
2,…の間隔は、RFリークに対するシールド効果を考
慮した場合、阻止しようとするRFリークの波長の1/
2以下にすることが望ましい。本実施形態においては、
表面実装型アイソレータ6が実装されるパッド7,10
と、パッド8,9との間に設けることで、リーク防止用
スルーホール12,12,…の間隔を密にすることがで
き、これによりRFリーク13に対するシールド効果を
向上させている。
Further, through holes 12, 1 for preventing leakage are provided.
The interval between 2,... Is 1/1 / the wavelength of the RF leak to be blocked when the shielding effect on the RF leak is considered.
It is desirable to set it to 2 or less. In the present embodiment,
Pads 7 and 10 on which surface mount isolator 6 is mounted
, And the pads 8 and 9, the distance between the leak preventing through holes 12, 12,... Can be reduced, thereby improving the shielding effect against the RF leak 13.

【0016】さらに、リーク防止用スルーホール12,
12,…の様なスルーホール列を複数設け、各スルーホ
ールを千鳥状に配置することにより、シールド効果を向
上させることができる。この場合、単にリーク防止用ス
ルーホール12,12,…の間隔を密にする場合より
も、基板の強度を維持することができるという長所があ
る。図1(a)では、リーク防止用スルーホール12,
12,…の両側に、さらなるリーク防止用スルーホール
12’,12’,…を千鳥状に設けることにより、RF
リーク13に対するシールド効果をより一層向上させて
いる。
Furthermore, through holes 12 for preventing leakage are provided.
By providing a plurality of through-hole rows like 12,... And arranging the through-holes in a staggered manner, the shielding effect can be improved. In this case, there is an advantage that the strength of the substrate can be maintained as compared with the case where the distance between the through holes 12, 12,... In FIG. 1A, the through holes 12 for preventing leakage
By providing further leak preventing through holes 12 ', 12',... On both sides of
The shielding effect against the leak 13 is further improved.

【0017】なお、図1(a)においては、パッド7,
10と、パッド8,9の間隔の都合上、さらなるリーク
防止用スルーホール12’が、リーク防止用スルーホー
ル12,12,…の両側に2つずつしか設けられいない
が、パッド7,10と、パッド8,9の間隔に余裕があ
る場合は、リーク防止用スルーホール12,12,…と
同様、図中、基板上部から下部にかけて連なるスルーホ
ール列としてもよい。
In FIG. 1A, the pads 7,
Due to the distance between the pad 10 and the pads 8, 9, only two through holes 12 'for preventing leakage are provided on both sides of the through holes 12, 12, ... for preventing leakage. If there is room in the space between the pads 8 and 9, the through holes may be continuous from the upper part to the lower part of the substrate in the drawing, as in the case of the through holes 12 for preventing leakage.

【0018】また実際に、図1(a)に示す配列で、直
径1mmφのリーク防止用スルーホールを2mmの間隔
で11個設けた場合、リーク防止用スルーホールを設け
なかった時、−56dBmだった6GHz帯の局発信号
のリークが、−68dBmに改善されたことが確認され
ている。
In the arrangement shown in FIG. 1A, when 11 leak-preventing through-holes having a diameter of 1 mm are provided at intervals of 2 mm, when the through-holes are not provided, the leakage current is -56 dBm. It has been confirmed that the leak of the local signal in the 6 GHz band has been improved to -68 dBm.

【0019】[0019]

【発明の効果】以上説明したように、請求項1に記載の
高周波回路用多層基板によれば、外部から信号が入力さ
れる入力端と、内層の回路形成部との間に、高周波回路
用多層基板の全層を貫くスルーホールを、前記入力端と
回路形成部を隔てる方向に複数設けたので、内層に設け
られた回路において発生し、入力端へと伝播する不要輻
射を減衰させる、シールド効果を得ることができる。
As described above, according to the multilayer substrate for a high-frequency circuit according to the first aspect, a high-frequency circuit for a high-frequency circuit is provided between an input terminal to which a signal is input from the outside and a circuit forming portion of the inner layer. Since a plurality of through holes penetrating all layers of the multilayer substrate are provided in a direction separating the input end and the circuit forming portion, a shield that attenuates unnecessary radiation generated in a circuit provided in an inner layer and propagated to the input end is provided. The effect can be obtained.

【0020】また、請求項2に記載の高周波回路用多層
基板によれば、スルーホールを設ける間隔を不要輻射の
波長の1/2以下とするので、シールド効果を向上させ
ることができる。
Further, according to the multilayer substrate for a high-frequency circuit according to the second aspect, the interval between the through holes is set to be equal to or less than half the wavelength of the unnecessary radiation, so that the shielding effect can be improved.

【0021】さらに、請求項3に記載の高周波回路用多
層基板によれば、スルーホールを千鳥状に設けるので、
不要輻射に対するシールド効果を向上させるばかりでな
く、多層基板の強度を維持することができる。
Furthermore, according to the multilayer substrate for a high-frequency circuit according to the third aspect, the through holes are provided in a staggered manner.
In addition to improving the shielding effect against unnecessary radiation, the strength of the multilayer substrate can be maintained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の一実施形態による高周波回路用多
層基板の各層のパターンを示す上面図および透視図であ
る。
FIG. 1 is a top view and a perspective view showing a pattern of each layer of a multilayer substrate for a high-frequency circuit according to an embodiment of the present invention.

【図2】 同高周波回路用多層基板の各層のパターンを
示す透視図である。
FIG. 2 is a perspective view showing a pattern of each layer of the multilayer substrate for a high-frequency circuit.

【図3】 図1および図2におけるA−A部の断面を示
す断面図である。
FIG. 3 is a cross-sectional view showing a cross section taken along a line AA in FIGS. 1 and 2;

【符号の説明】[Explanation of symbols]

1 4層基板 2,3 RFパターン 4 絶縁層 5 入力コネクタ 6 表面実装型アイソレータ 7〜10 パッド 11 接地確保用スルーホール 12,12’ リーク防止用スルーホール 13 RFリーク 14,15 金属ケース DESCRIPTION OF SYMBOLS 1 4-layer board 2, 3 RF pattern 4 Insulation layer 5 Input connector 6 Surface mount type isolator 7-10 Pad 11 Grounding securing through hole 12, 12 'Leak prevention through hole 13 RF leak 14, 15 Metal case

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 複数の層からなり、回路が形成された少
なくとも1つの内層と、全面に亘って接地パターンが形
成された少なくとも1つの層と、外部信号が入力される
入力端とを有する高周波回路用多層基板において、 前記入力端と、前記内層の回路形成部との間に、前記高
周波回路用多層基板の全層を貫くスルーホールを、前記
入力端と回路形成部を隔てる方向に、所定の間隔で複数
設けてなることを特徴とする高周波回路用多層基板。
1. A high-frequency device comprising a plurality of layers, at least one inner layer on which a circuit is formed, at least one layer on which a ground pattern is formed over the entire surface, and an input terminal to which an external signal is input. In the circuit multilayer board, between the input terminal and the circuit forming portion of the inner layer, a through hole penetrating all layers of the high frequency circuit multilayer substrate is provided in a direction separating the input terminal and the circuit forming portion. A multilayer substrate for a high-frequency circuit, wherein a plurality of the substrates are provided at intervals.
【請求項2】 前記所定の間隔は、前記内層に形成され
た回路において発生する不要輻射の波長の1/2以下と
することを特徴とする請求項1に記載の高周波回路用多
層基板。
2. The multilayer board for a high-frequency circuit according to claim 1, wherein the predetermined interval is set to be equal to or less than の of a wavelength of unnecessary radiation generated in a circuit formed in the inner layer.
【請求項3】 前記スルーホールを、千鳥状に設けるこ
とを特徴とする請求項1または2に記載の高周波回路用
多層基板。
3. The multilayer substrate for a high-frequency circuit according to claim 1, wherein the through holes are provided in a staggered manner.
JP8171414A 1996-07-01 1996-07-01 Multilayer substrate for high frequency circuit Expired - Fee Related JP2878188B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8171414A JP2878188B2 (en) 1996-07-01 1996-07-01 Multilayer substrate for high frequency circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8171414A JP2878188B2 (en) 1996-07-01 1996-07-01 Multilayer substrate for high frequency circuit

Publications (2)

Publication Number Publication Date
JPH1022635A true JPH1022635A (en) 1998-01-23
JP2878188B2 JP2878188B2 (en) 1999-04-05

Family

ID=15922703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8171414A Expired - Fee Related JP2878188B2 (en) 1996-07-01 1996-07-01 Multilayer substrate for high frequency circuit

Country Status (1)

Country Link
JP (1) JP2878188B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004247980A (en) * 2003-02-14 2004-09-02 Hitachi Ltd Connection structure and method of transmission line
JP2006041521A (en) * 2004-07-23 2006-02-09 Samsung Electronics Co Ltd Printed circuit board and display utilizing same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004247980A (en) * 2003-02-14 2004-09-02 Hitachi Ltd Connection structure and method of transmission line
JP2006041521A (en) * 2004-07-23 2006-02-09 Samsung Electronics Co Ltd Printed circuit board and display utilizing same
US8144300B2 (en) 2004-07-23 2012-03-27 Samsung Electronics Co., Ltd. Printed circuit board and display device using the same

Also Published As

Publication number Publication date
JP2878188B2 (en) 1999-04-05

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