JPH10224663A - S/n improving device for video equipment - Google Patents

S/n improving device for video equipment

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Publication number
JPH10224663A
JPH10224663A JP9023647A JP2364797A JPH10224663A JP H10224663 A JPH10224663 A JP H10224663A JP 9023647 A JP9023647 A JP 9023647A JP 2364797 A JP2364797 A JP 2364797A JP H10224663 A JPH10224663 A JP H10224663A
Authority
JP
Japan
Prior art keywords
power supply
circuit
signal
phase
phase difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9023647A
Other languages
Japanese (ja)
Inventor
Akira Maeda
晃 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP9023647A priority Critical patent/JPH10224663A/en
Publication of JPH10224663A publication Critical patent/JPH10224663A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve the S/N by reducing the effect of switching noise even in the case of the video equipment using a switching power supply. SOLUTION: A lead phase gate signal generating circuit 1a generates lead phase gate signal S3 that is logical 1 for a prescribed period from a front edge of a horizontal synchronizing signal (negative polarity) S1, and a lagged phase gate signal generating circuit 1b generates a lagged phase gate signal S4 that is logical 1 for a prescribed period from the front edge of the horizontal synchronizing signal S1. AND circuits 2a, 2b AND the advanced phase gate signal S3 and a control pulse S2 of a switching power supply and the lagged phase gate signal S4 and the control pulse S2. As a result, a lead phase signal S5 and a lagged phase signal S6 are outputted. The lead phase signal S5 produces a positive power supply S7 and the lagged phase signal S6 produces a negative power supply S8 and an adder circuit 4 adds the positive and negative power supplies. An output of the adder circuit 4 is integrated by an integration circuit 5 and an output voltage S9 controls a voltage controlled oscillator VCO 6. An output S10 of the VCO 6 is made in phase to the control pulse S2 of the switching power supply.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、CCDテレビカメ
ラ等の映像機器でスイッチング電源からのスイッチング
ノイズの影響を低減する映像機器のS/N改善装置に関
する。
[0001] 1. Field of the Invention [0002] The present invention relates to an S / N improvement device for video equipment, such as a CCD television camera, which reduces the influence of switching noise from a switching power supply.

【0002】[0002]

【従来の技術】CCDテレビカメラ等の映像機器におい
ても、小型軽量で効率の良いスイッチング電源が好んで
使用される。しかし、スイッチング電源のスイッチング
周波数は固定にされているため、映像信号の同期周波数
との位相関係が一定になると、画面上に略固定する周期
性ノイズが生ずるおそれがある。
2. Description of the Related Art In video equipment such as a CCD television camera, a small, lightweight and efficient switching power supply is preferably used. However, since the switching frequency of the switching power supply is fixed, if the phase relation with the synchronization frequency of the video signal becomes constant, there is a possibility that a substantially fixed periodic noise is generated on the screen.

【0003】[0003]

【発明が解決しようとする課題】本発明は上記問題点に
鑑みなされたもので、スイッチング電源を使用する映像
機器でも、スイッチングノイズの影響を少なくしてS/
Nを改善する技術を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems. Even in a video equipment using a switching power supply, the influence of switching noise is reduced by reducing the influence of switching noise.
It is intended to provide a technique for improving N.

【0004】[0004]

【課題を解決するための手段】同映像機器で扱う映像信
号の同期信号と電源のスイッチング周波数の位相差を検
出する位相差検出回路と、その位相差が小さいときにス
イッチング周波数を変化させる制御電圧を発生する制御
電圧発生回路と、制御電圧により同周波数を変化させる
VCO(Voltage Controlled Oscillator )を設け、同
位相差が小さいときは、スイッチング周波数を変化させ
て、同期周波数とスイッチング周波数との位相が一致す
るのをさけて、映像信号へのスイッチングノイズの影響
を少なくする。
A phase difference detecting circuit for detecting a phase difference between a synchronous signal of a video signal handled by the video device and a switching frequency of a power supply, and a control voltage for changing the switching frequency when the phase difference is small. And a VCO (Voltage Controlled Oscillator) that changes the same frequency by the control voltage. When the phase difference is small, the switching frequency is changed so that the phase of the synchronization frequency matches the switching frequency. In this case, the effect of switching noise on the video signal is reduced.

【0005】[0005]

【発明の実施の形態】CCDテレビカメラ等の映像機器
でスイッチング電願を使用しているものにおいて、同映
像機器で扱う映像信号の同期信号と同電源のスイッチン
グ周波数の位相差を検出する位相差検出回路と、その位
相差が小さいときに同スイッチング周波数を変化させる
制御電圧を発生する制御電圧発生回路と、同制御電圧に
より同周波数を変化させるVCOを設け、同位相差が小
さいときは、スイッチング周波数を変化させる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In a video equipment such as a CCD television camera using a switching application, a phase difference for detecting a phase difference between a synchronization signal of a video signal handled by the video equipment and a switching frequency of the power supply. A detection circuit, a control voltage generation circuit for generating a control voltage for changing the switching frequency when the phase difference is small, and a VCO for changing the same frequency by the control voltage are provided. To change.

【0006】前記位相差が、予め定めた一定値以下とな
ったとき、前記制御電圧を発生させるようにする。
When the phase difference becomes equal to or less than a predetermined value, the control voltage is generated.

【0007】前記位相差が前記映像信号の同期信号に対
して進相となる場合と、遅相となる場合を判別して検出
する回路を設け、進相となるときは前記スイッチング周
波数を低くし、遅相のときは高くするように制御する。
[0007] A circuit is provided for discriminating and detecting when the phase difference is advanced or delayed with respect to the synchronization signal of the video signal. When the phase difference is advanced, the switching frequency is lowered. When the phase is late, control is performed to increase the value.

【0008】前記映像信号の同期信号の前縁前の一定期
間論理1となる進相ゲート信号発生回路と、同同期信号
の前縁後の一定期間論理1となる遅相ゲート信号発生回
路と、同進相ゲート信号及び遅相ゲート信号のおのおの
と前記スイッチング電源の制御パルスの論理積回路と、
それぞれの論理積回路の出力で発生する正電源回路及び
負電源回路と、同正電源及び負電源の加算回路と、同加
算回路の出力電圧の積分回路を設けて、同積分回路の出
力で前記VCOを制御するようにする。
A leading gate signal generating circuit having a logic 1 for a certain period before the leading edge of the video signal synchronizing signal, a lagging gate signal generating circuit having a logic 1 for a certain period after the leading edge of the synchronizing signal, An AND circuit for each of the in-phase gate signal and the lag gate signal and the control pulse of the switching power supply,
A positive power supply circuit and a negative power supply circuit generated at the output of each AND circuit, an addition circuit of the same positive power supply and the negative power supply, and an integration circuit of an output voltage of the addition circuit are provided. Control the VCO.

【0009】CCDテレビカメラ等の映像機器でスイッ
チング電願を使用しているものにおいて、同電源のスイ
ッチング周波数を変化させる周波数制御部を設け、スイ
ッチング周波数を常時変化させるようにする。
In a video device such as a CCD television camera using a switching application, a frequency control unit for changing the switching frequency of the power supply is provided so that the switching frequency is constantly changed.

【0010】前記スイッチング周波数の変化は、AC電
源の脈動を用いてAC電源の周期で行うようにする。
The change of the switching frequency is performed in the cycle of the AC power supply using the pulsation of the AC power supply.

【0011】[0011]

【実施例】図1は、本発明による映像機器のS/N改善
装置の1実施例の(A)概要ブロック図、(B)要部タ
イミング図である。CCDテレビカメラ等の映像信号の
水平同期信号(負極性)S1の前縁から一定期間だけ論
理1となる進相ゲート信号S3を、進相ゲート信号発生
回路1aで作る。進相ゲート信号発生回路1aは例えば
モノステーブルマルチバイブレータ(以下MMという)
で1周期前の水平同期パルスから一定期間遅らせて、そ
の出力から別のMMで上記の一定期間論理1となる進相
ゲート信号S3を作る。同様に、水平同期信号S1の前
縁の後の一定期間論理1となる遅相ゲート信号S4を、
遅相ゲート信号発生回路1bにより作成する。遅相ゲー
ト信号発生回路1bは、例えば水平同期信号S1の前縁
でトリガするMMで一定期間論理1となるパルスを作る
回路で構成できる。進相ゲート信号S3及び遅相ゲート
信号S4のおのおのとスイッチング電源の制御パルスS
2の間で、論理積回路2a及び2bにより論理積を求め
る。その結果、スイッチング電源の制御パルスS2が水
平同期信号より進相で上記一定期間内にある場合は、進
相信号S5が出力され、逆に遅れていると遅相信号S6
が出力される。進相信号S5で正電源回路3aを制御し
て正電源S7を作り、遅相信号S6で負電源回路3bを
制御して負電源S8を得る。正電源S7と負電源S8を
加算回路4で加算する。その出力を積分回路5で積分
し、出力電圧S9でVCO6を制御する。VCO6は、
例えば発信回路の時定数となる容量Cを可変容量ダイオ
ードに印可する電圧で制御するものとすると、電圧が上
がるとCが大きくなり発信周波数が低下してスイッチン
グ周波数の位相が遅れ、電圧が上がると発信周波数が上
昇してスイッチング周波数の位相が進む。したがって、
VCO6の出力S10をスイッチング電源の制御パルス
S2と同位相のものとすると、スイッチング周波数の位
相が、水平同期信号の上記の一定期間内で一致すると、
スイッチング周波数の位相が調整されて、両者の位相が
ずれることとなる。なお、上記の水平同期信S1は垂直
同期信号としても同様の作用・効果が得られる。
1 is a (A) schematic block diagram and (B) a timing chart of a main part of an embodiment of an S / N improving apparatus for video equipment according to the present invention. An advanced gate signal generating circuit 1a generates an advanced gate signal S3 which becomes a logical 1 for a certain period from a leading edge of a horizontal synchronizing signal (negative polarity) S1 of a video signal of a CCD television camera or the like. The phase advance gate signal generation circuit 1a is, for example, a monostable multivibrator (hereinafter referred to as MM).
Then, the output is delayed for a certain period from the horizontal synchronizing pulse one cycle before, and the output thereof produces another phase leading gate signal S3 which becomes logic 1 for the certain period. Similarly, the delayed gate signal S4 which becomes logic 1 for a certain period after the leading edge of the horizontal synchronizing signal S1,
It is created by the late gate signal generation circuit 1b. The delay gate signal generation circuit 1b can be constituted by a circuit that generates a pulse that becomes logic 1 for a certain period by MM triggered at the leading edge of the horizontal synchronization signal S1, for example. The control pulse S of the switching power supply for each of the advanced gate signal S3 and the delayed gate signal S4
Between the two, the logical product is obtained by the logical product circuits 2a and 2b. As a result, when the control pulse S2 of the switching power supply is advanced from the horizontal synchronizing signal and is within the above-mentioned predetermined period, the advanced signal S5 is output.
Is output. The positive power supply circuit 3a is controlled by the leading signal S5 to generate the positive power supply S7, and the negative power supply circuit 3b is controlled by the lagging signal S6 to obtain the negative power supply S8. The addition circuit 4 adds the positive power supply S7 and the negative power supply S8. The output is integrated by the integration circuit 5, and the VCO 6 is controlled by the output voltage S9. VCO6 is
For example, if the capacitance C, which is the time constant of the transmission circuit, is controlled by the voltage applied to the variable capacitance diode, if the voltage increases, C increases, the transmission frequency decreases, the phase of the switching frequency is delayed, and if the voltage increases, The transmission frequency increases and the phase of the switching frequency advances. Therefore,
Assuming that the output S10 of the VCO 6 has the same phase as the control pulse S2 of the switching power supply, if the phase of the switching frequency matches within the above-mentioned fixed period of the horizontal synchronizing signal,
The phase of the switching frequency is adjusted, and the two phases are shifted. The same operation and effect can be obtained even when the horizontal synchronization signal S1 is used as a vertical synchronization signal.

【0012】図2は、本発明による映像機器のS/N改
善装置の別の実施例の概要ブロック図である。AC電源
S21を整流器21及び小容量のコンデンサ22で整流
し、脈動電圧S22を得る。脈動電圧S22を可変抵抗
器23で適当な電圧としてVCO26を制御して、AC
電源S21の周波数で周期的に変動する周波数となるV
CO26の出力S10を得る。出力S10をCCDテレ
ビカメラ等の映像機器のスイッチング電願を制御する制
御パルスとして、スイッチング周波数を常時変化させる
ようにする。
FIG. 2 is a schematic block diagram of another embodiment of the S / N improvement apparatus for video equipment according to the present invention. The AC power supply S21 is rectified by the rectifier 21 and the small-capacity capacitor 22 to obtain a pulsating voltage S22. The pulsation voltage S22 is adjusted to an appropriate voltage by the variable resistor 23, and the VCO 26 is controlled.
V which is a frequency that fluctuates periodically with the frequency of the power supply S21
The output S10 of the CO 26 is obtained. The output S10 is used as a control pulse for controlling a switching application of a video device such as a CCD television camera, so that the switching frequency is constantly changed.

【0013】[0013]

【発明の効果】同映像機器で扱う映像信号の同期信号と
同電源のスイッチング周波数の位相差を検出する位相差
検出回路と、その位相差が小さいときに同スイッチング
周波数を変化させる制御電圧を発生する制御電圧発生回
路と、同制御電圧により同周波数を変化させるVCOを
設け、同位相差が小さいときはスイッチング周波数を変
化させて、同期周波数とスイッチング周波数との位相が
一致することをさけることができるため、映像信号への
スイッチングノイズの影響を少なくすることができ、映
像信号の実効的なS/Nが改善される。
According to the present invention, a phase difference detection circuit for detecting a phase difference between a synchronization signal of a video signal handled by the video equipment and a switching frequency of the power supply, and a control voltage for changing the switching frequency when the phase difference is small. And a VCO that changes the same frequency by the same control voltage. When the same phase difference is small, the switching frequency is changed so that the phase of the synchronization frequency and the switching frequency can be avoided. Therefore, the influence of switching noise on the video signal can be reduced, and the effective S / N of the video signal is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による映像機器のS/N改善装置の1実
施例の(A)概要ブロック図、(B)要部タイミング図
である。
FIG. 1A is a schematic block diagram of an embodiment of an S / N improvement device for a video device according to the present invention, and FIG.

【図2】本発明による映像機器のS/N改善装置の別の
実施例の概要ブロック図である。
FIG. 2 is a schematic block diagram of another embodiment of the S / N improvement device for video equipment according to the present invention.

【符号の説明】[Explanation of symbols]

S1 水平同期信号 S2 制御パルス S3 進相ゲート信号 S4 遅相ゲート信号 S5 進相信号 S6 遅相信号 1a 進相ゲート信号発生回路 1b 遅相ゲート信号発生回路 2a、2b 論理積回路 3a 正電源回路 3b 負電源回路 4 加算回路 5 積分回路 6 VCO(Voltage Controlled Oscillator ) S21 AC電源 21 整流器 22 コンデンサ 23 可変抵抗器 26 VCO S1 Horizontal synchronization signal S2 Control pulse S3 Early phase gate signal S4 Late phase gate signal S5 Early phase signal S6 Late phase signal 1a Advance phase gate signal generation circuit 1b Slow gate signal generation circuit 2a, 2b AND circuit 3a Positive power supply circuit 3b Negative power supply circuit 4 Adder circuit 5 Integrator circuit 6 VCO (Voltage Controlled Oscillator) S21 AC power supply 21 Rectifier 22 Capacitor 23 Variable resistor 26 VCO

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 CCDテレビカメラ等の映像機器でスイ
ッチング電願を使用しているものにおいて、同映像機器
で扱う映像信号の同期信号と同電源のスイッチング周波
数の位相差を検出する位相差検出回路と、その位相差が
小さいときに同スイッチング周波数を変化させる制御電
圧を発生する制御電圧発生回路と、同制御電圧により同
周波数を変化させるVCO(Voltage Controlled Oscil
lator)を設け、同位相差が小さいときは、スイッチン
グ周波数を変化させることを特徴とした映像機器のS/
N改善装置。
1. A phase difference detection circuit for detecting a phase difference between a synchronization signal of a video signal handled by the video device and a switching frequency of the power supply in a video device such as a CCD television camera using a switching device. A control voltage generating circuit that generates a control voltage that changes the switching frequency when the phase difference is small; and a VCO (Voltage Controlled Oscillator) that changes the frequency by the control voltage.
and the switching frequency is changed when the phase difference is small.
N improvement device.
【請求項2】 前記位相差が、予め定めた一定値以下と
なったとき、前記制御電圧を発生させるようにすること
を特徴とした請求項1記載の映像機器のS/N改善装
置。
2. The apparatus according to claim 1, wherein the control voltage is generated when the phase difference becomes equal to or less than a predetermined value.
【請求項3】 前記位相差が前記映像信号の同期信号に
対して進相となる場合と、遅相となる場合を判別して検
出する回路を設け、進相となるときは前記スイッチング
周波数を低くし、遅相のときは高くするように制御する
ことを特徴とした請求項2記載の映像機器のS/N改善
装置。
3. A circuit for discriminating and detecting a case where the phase difference is advanced from a synchronization signal of the video signal and a case where the phase difference is delayed, the switching frequency is determined when the phase difference is advanced. 3. The apparatus according to claim 2, wherein the S / N ratio is controlled so as to be lower and to be higher when the phase is late.
【請求項4】 前記映像信号の同期信号の前縁前の一定
期間論理1となる進相ゲート信号発生回路と、同同期信
号の前縁後の一定期間論理1となる遅相ゲート信号発生
回路と、同進相ゲート信号及び遅相ゲート信号のおのお
のと前記スイッチング電源の制御パルスの論理積回路
と、それぞれの論理積回路の出力で発生する正電源回路
及び負電源回路と、同正電源及び負電源の加算回路と、
同加算回路の出力電圧の積分回路を設けて、同積分回路
の出力で前記VCOを制御するようにすることを特徴と
した請求項3記載の映像機器のS/N改善装置。
4. A leading gate signal generating circuit which becomes logic 1 for a certain period before the leading edge of the synchronizing signal of the video signal, and a lagging gate signal generating circuit which becomes logic 1 for a certain period after the leading edge of the synchronizing signal. And an AND circuit of the control pulse of the switching power supply and each of the synchronous phase gate signal and the late phase gate signal, a positive power supply circuit and a negative power supply circuit generated at an output of each AND circuit, A negative power addition circuit,
4. An apparatus according to claim 3, further comprising an integrating circuit for the output voltage of the adding circuit, wherein the output of the integrating circuit controls the VCO.
【請求項5】 CCDテレビカメラ等の映像機器でスイ
ッチング電願を使用しているものにおいて、同電源のス
イッチング周波数を変化させる周波数制御部を設け、ス
イッチング周波数を常時変化させるようにすることを特
徴とした映像機器のS/N改善装置。
5. In a video equipment such as a CCD television camera using a switching application, a frequency control unit for changing a switching frequency of the power supply is provided so that the switching frequency is constantly changed. S / N improvement device for video equipment.
【請求項6】 前記スイッチング周波数の変化は、AC
電源の脈動を用いてAC電源の周期で行うようにするこ
とを特徴とした請求項6記載の映像機器のS/N改善装
置。
6. The change of the switching frequency is AC
7. The apparatus according to claim 6, wherein the pulsation of the power supply is used in the cycle of the AC power supply.
JP9023647A 1997-02-06 1997-02-06 S/n improving device for video equipment Pending JPH10224663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9023647A JPH10224663A (en) 1997-02-06 1997-02-06 S/n improving device for video equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9023647A JPH10224663A (en) 1997-02-06 1997-02-06 S/n improving device for video equipment

Publications (1)

Publication Number Publication Date
JPH10224663A true JPH10224663A (en) 1998-08-21

Family

ID=12116352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9023647A Pending JPH10224663A (en) 1997-02-06 1997-02-06 S/n improving device for video equipment

Country Status (1)

Country Link
JP (1) JPH10224663A (en)

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