JPH10223794A - Wiring board for brazing electronic part with au-si and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain a nickel-phosphorus alloy layer from separating from a brazing material-gold diffusion layer when an electronic part is brazed to a gold layer as a surface layer with gold-silicon alloy. SOLUTION: A metallized metal layer 3 is formed on an insulating board 2 in one piece, a nickel-baron allay layer 4 is deposited thereon through a reduction-type electroless plating method, and a nickel-phosphorus alloy layer 5 is deposited thereon through a reduction-type electroless plating method. Then, a sintering process is carried out at a temeprature of above 6050 deg.C a first gold layer 6b out of a gold layer is deposited on the alloy layer 5 through a substitution-type electroless gold plating method, and a second gold layer 6b out of the gold layer 6 is formed thereon through a reduction-type electroless gold plating method. When a chip 8 is brazed to the gold layer 6 which serves as the surface layer of an electronic part package main body 1 with gold-silicon alloy as brazing material, the gold layer 6 is diffused into brazing material to turn to a brazing material-gold diffusion layer 7, and the nickel-phosphorus alloy layer 5 is hardly separated from the brazing material-gold diffusion layer 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board on which a semiconductor integrated circuit element is mounted, a wiring board forming an electronic component package body for housing electronic components such as a semiconductor integrated circuit element, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, when fabricating a wiring board such as an IC package, a metallized metal layer 53 made of tungsten is formed on a ceramic insulating substrate 52 as a material, for example, as shown in FIG. This metallized metal layer 5
A nickel-boron (Ni-B) alloy layer 54 is formed on the surface of No. 3 by reduction type electroless plating, and nickel-phosphorus (Ni-P) is further formed thereon by reduction type electroless plating.
An alloy layer 55 was formed, and a gold (Au) layer 56 was formed thereon by electroless plating.

[0003] Here, the nickel-boron alloy layer 54 is
Pinholes (small holes) on the rough metallized metal layer 53
Nickel-phosphorus alloy layer 55 has a surface layer of gold layer 56 and a lower layer of nickel-boron alloy layer 55. This is useful in that it plays a role in strengthening the adhesion with the H.54.

[0004]

By the way, in order to sufficiently fulfill the role of the nickel-phosphorous alloy layer 55, the nickel-phosphorous alloy layer 55 is formed by electroless plating and then sintering. Had to do.

[0005] Using a wiring board obtained by forming a gold layer 56 by electroless plating on the nickel-phosphorus alloy layer 55 on which such sintering has been performed, an IC chip 58 is formed on the gold layer 56. 400-500 ° C with gold-silicon alloy
2B, the gold layer 56 is diffused into a gold-silicon alloy, which is a brazing material, and is integrated with the brazing material to form a brazing material-gold diffusion layer 57, as shown in FIG.

In the wiring board having the IC chip 58 bonded in this manner, the nickel-phosphorus alloy layer 55
Although peeling between the boron alloy layer 54 does not occur, the adhesion between the nickel-phosphorus alloy layer 55 and the brazing material-gold diffusion layer 57 may not be sufficient, and peeling may occur during this time. .

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has a nickel-phosphorus alloy layer and a brazing material-gold diffusion layer when an electronic component is brazed to a surface gold layer using a gold-silicon alloy as a brazing material. It is an object of the present invention to provide a wiring board in which separation does not occur between the wiring board and a manufacturing method thereof.

[0008]

Means for Solving the Problems, Embodiments of the Invention, and Effects of the Invention As described in the section of [Prior Art], the present inventor has proposed an electronic component such as an IC chip on a gold layer of a wiring board. As a result of intensive research on the phenomenon of peeling between the nickel-phosphorus alloy layer and the brazing material-gold diffusion layer when brazing with a gold-silicon alloy, nickel-phosphorus alloy It is highly probable that a relatively fragile intermetallic compound (Ni / P / Si) has been formed between the layer and the brazing filler metal-gold diffusion layer. Sintering temperature, and completed the present invention.

That is, the invention according to claim 1 is a wiring board for brazing electronic components such as silicon chips to a surface layer using a gold-silicon alloy as a brazing material, wherein a nickel-phosphorus alloy layer is formed on a material. Having a gold layer as a surface layer on the nickel-phosphorus alloy layer, wherein the nickel-phosphorus alloy layer has a portion with a large amount of phosphorus component and a portion with a small amount of phosphorus component, or a portion with a large amount of phosphorus component. Are separated into layers on the gold layer side.

According to a second aspect of the present invention, there is provided a method of manufacturing a wiring board for brazing an electronic component such as a silicon chip to a surface layer using a gold-silicon alloy as a brazing material. A Ni-P forming step of forming a nickel-phosphorous alloy layer by electroless plating, a sintering step of treating the nickel-phosphorous alloy layer at 600 ° C. or more, and an electroless plating of the nickel-phosphorous alloy layer after sintering. Forming an Au layer as a surface layer by plating.

Materials used in the above-mentioned Ni-P process include:
An insulating substrate such as a ceramic substrate or a glass substrate may be used as it is, or a metal layer (eg, a metallized metal layer such as tungsten, molybdenum, a molybdenum-manganese alloy, or a nickel-boron alloy layer) on these insulating substrates May be used, or a copper brazed to a metallized metal layer on an insulating substrate may be used.
Tungsten (which may be plated with a nickel alloy before brazing) may be used.

In the Ni-P forming step, a conventionally known plating solution containing nickel sulfate and sodium hypophosphite as a reducing agent can be used as a plating solution for the reduction type electroless plating. Specifically, a commercially available plating solution such as Nimden 78S (trade name) manufactured by Uemura Kogyo KK can be used.

In the sintering step, the heat treatment is performed with heat of 600 ° C. or more. For example, the material on which the nickel-phosphorus alloy layer is formed may be passed through a heating device such that the temperature distribution from the inlet to the outlet has a substantially normal distribution shape, and the maximum temperature of the wiring board is 600 ° C. or higher. It is preferable in terms of mass productivity. At this time, if the maximum temperature is set to be higher than 600 ° C. (for example, 650 ° C.) and the keeping time at 600 ° C. or more is set to 10 minutes or more, the wiring substrate can be reliably maintained at 600 ° C. or more even if the temperature varies. Is preferred.

In the Au forming step, a gold layer as a surface layer is formed on the nickel-phosphorus alloy layer after sintering by electroless plating. Generally, in the nickel-phosphorus alloy layer,
Directly by reduction type electroless plating, thicker (eg,> 0.3
μm) Even if an attempt is made to form a gold layer, gold does not precipitate well on the nickel-phosphorus alloy layer. A thin gold layer (for example, 0.01-0.1 μm) is formed by applying gold plating to the layer by substitution type electroless plating, and then a thick gold layer is applied by gold plating by reduction type electroless plating. And increasing the thickness.

As a plating solution for depositing and forming gold by substitution type electroless plating, a plating solution obtained by adding an alkali cyanide stabilizer or the like to a conventionally known soluble gold salt can be used. Specifically, Atomex (trade name) manufactured by N-Chemcat Corporation can be used. As a plating solution for forming gold by reduction-type electroless plating, a conventionally known plating solution containing sodium borohydride as a reducing agent can be used. Specifically, Okuno Pharmaceutical ( OPC Muden Gold 25 (trade name) manufactured by K.K.

In the manufacturing method of the present invention, the sintering step is performed at a temperature of 600 ° C. or higher, so that an electronic component such as a silicon chip is brazed to a gold layer as a surface layer of the wiring board using a gold-silicon alloy as a brazing material. When used, an effect is obtained that separation between the nickel-phosphorus alloy layer and the brazing material-gold diffusion layer can be prevented.

If the sintering step is performed at a temperature lower than 600 ° C., there is a problem that the rate of occurrence of separation between the nickel-phosphorus alloy layer and the brazing material-gold diffusion layer increases. This is presumed to be due to the generation of a large number of brittle intermetallic compounds (Ni / P / Si) between the nickel-phosphorus alloy layer and the brazing material-gold diffusion layer. Further, it is presumed that the generation rate of the intermetallic compound depends on the sintering temperature (therefore, the distribution of the phosphorus component in the nickel-phosphorus alloy layer). According to the observation of the crystal structure by SEM cross-section observation and the like performed by the present inventors, when sintering is performed at a temperature lower than 600 ° C., the nickel-phosphorus alloy layer has no particular change, and the phosphorus component is substantially uniformly distributed. However, when sintering was performed at 600 to 740 ° C., the portions of the nickel-phosphorous alloy layer having a large amount and the small amount of the phosphorus component were distributed in a spot-like (mottle) manner from the surface to the lower side. When the temperature exceeded 740 ° C., it was recognized that the portion containing a large amount of phosphorus was substantially separated into a layer on the surface (the gold layer side).

This is because Ni ₃ P is generated and gathered in the nickel-phosphorus alloy layer by heating to form a portion containing a large amount of phosphorus, while the other portion has a relatively small amount of the phosphorus component. Form a part with less components,
It is considered to have a patchy structure. Further, when the temperature further rises, it is considered that Ni ₃ P gathers and forms a layer on the surface side, and separates into a layer from the remaining portion with little phosphorus component. Then, it is presumed that such a component distribution structure contributes to a method of generating an intermetallic compound.

In the sintering step of the present invention, there is no particular upper limit temperature for obtaining the effects of the present invention. However, when the pins and the like are joined to the wiring board by, for example, eutectic silver brazing (mp: about 780 ° C.). The upper limit of the temperature is preferably a temperature at which the silver solder does not melt (less than about 700 ° C. in consideration of safety).

In the present invention, when the phosphorus content of the nickel-phosphorus alloy layer is set to 5 to 10% by weight, a gold layer is formed on the nickel-phosphorus alloy layer. Are uniformly formed and the yield is remarkably improved without swelling or peeling between both layers. The method for quantitatively analyzing the phosphorus content is not particularly limited. For example, it is preferable to determine the phosphorus content using an energy dispersive X-ray analyzer.

Here, if the phosphorus content exceeds 10% by weight, the corrosion resistance of the nickel-phosphorus alloy layer is increased. For example, when forming a gold layer by substitution type electroless plating, the nickel-phosphorus alloy layer Because nickel is less likely to elute from it, and as a result gold tends to be less likely to precipitate,
Not preferred.

On the other hand, when the phosphorus content is less than 5% by weight, for example, when a gold layer is formed by substitutional electroless plating, a nickel oxide layer is easily formed at the interface between the nickel-phosphorus alloy layer and the gold layer. It is not preferable because the adhesion between the two layers tends to be deteriorated due to the occurrence of the problem.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. The embodiments of the present invention are not limited to the following examples at all, and it goes without saying that various embodiments can be adopted as long as they belong to the technical scope of the present invention.

[Embodiment 1] FIG. 1 is an explanatory view showing the structure of an electronic component package body of this embodiment, and FIG.
FIG. 3 is an explanatory view before a silicon chip is joined, and FIG. 2B is an explanatory view after a silicon chip is joined. The inside of the circle is an enlarged sectional view.

The electronic component package body 1 is shown in FIG.
As shown in FIG. 1A, an insulating substrate 2 made of alumina ceramic, a metallized metal layer 3, a nickel-boron alloy layer 4, a nickel-phosphorus alloy layer 5, and a gold layer 6 are provided, and each layer is stacked in this order. It is formed as follows.

The electronic component package body 1 was manufactured according to the following procedure. That is, a predetermined alumina raw material powder is mixed with an organic solvent and the like to form a slurry, which is formed into a ceramic green sheet by employing a doctor blade method or the like, and thereafter, a ceramic is formed using a conductor paste made of tungsten powder or the like. Screen printing was performed on a green sheet, and then, though not shown, an appropriate number of the sheets were laminated, pressed and co-fired at about 1600 ° C. Thereby, the metallized metal layer 3 was integrally formed on the insulating substrate 2.

Then, on this metallized metal layer 3,
Using an electroless plating solution (Top Chemialloy B-1 (trade name) manufactured by Okuno Pharmaceutical Co., Ltd.) containing nickel sulfate and DMAB (dimethylamine borane) as reducing agents, a solution temperature of 65%
Plating was performed under the conditions of ° C., pH 6.7, and plating time of 15 minutes, a nickel-boron alloy layer 4 was applied and formed to a thickness of 1.2 μm, and then pins (not shown) were brazed with silver brazing.

Then, an electroless plating solution (Nimden 78S (trade name) manufactured by Uemura Kogyo Co., Ltd.) containing nickel sulfate and sodium hypophosphite as a reducing agent is used on the nickel-boron alloy layer 4. And a liquid temperature of 90 ° C. and a pH of 6.
The plating was carried out under the conditions of 0 and a plating time of 10 minutes, and a nickel-phosphorus alloy layer 5 was formed with a thickness of 3.0 μm.

Next, sintering was performed using a heating device (mesh belt type continuous furnace manufactured by Koyo Lindberg). In this heating device, the temperature distribution from the inlet to the outlet has a substantially normal distribution shape, and the maximum temperature of the substrate is 650.
The temperature was kept so that the keeping time at 600 ° C. or more was 10 minutes. The passing distance of the heating device was 3050 mm, and the passing time was 22 minutes. This ensures that the substrate is heated to 600 ° C. or higher.

Subsequently, using a plating solution for substitutional electroless gold plating (Atomex (trade name) manufactured by NE Chemcat Corporation), the solution temperature was 85 ° C., the pH was 6.0, and the plating time was 3 minutes. Plating is performed under the conditions, and the first gold layer 6a corresponding to the lower layer of the gold layer 6 is formed to a thickness of 0.01 to 0.1 μm.
Formed.

Finally, an electroless plating solution containing sodium borohydride as a reducing agent (OPC manufactured by Okuno Pharmaceutical Co., Ltd.)
Liquid temperature 73 (Mudden Gold 25 (trade name))
Plating was performed under the conditions of a temperature of 1 ° C., a pH of 13.5, and a plating time of 30 minutes, and a second gold layer 6 b corresponding to the upper layer of the gold layer 6 was adhered and formed to a thickness of 2.0 μm.

Thus, the electronic component package body 1 having the structure shown in FIG. 1A was manufactured. [Examples 2 and 3 and Comparative Examples 1 and 2] In Examples 2 and 3 and Comparative Examples 1 and 2, the sinter after forming the nickel-phosphorus alloy layer by the reduction type electroless plating in Example 1 described above. 1 (a) in the same manner as in Example 1 except that the maximum temperature of the ring process was set to the maximum temperature shown in Table 1 below, and kept at a temperature 50 ° C. lower than each maximum temperature for 10 minutes or more. An electronic component package body having the same structure as that described above was produced. In Comparative Example 1, substitution-type electroless gold plating and reduction-type electroless gold plating were performed without performing sintering.

[0033]

[Table 1]

[Test Example] A gold-silicon alloy (silicon 1-2%, mp 370-39) was formed on the gold layer 6 as the surface layer of Examples 1-3 and Comparative Examples 1 and 2 obtained as described above.
(0 ° C.) was melted by heat of 450 ° C., and the silicon chip 8 was brazed as shown in FIG.

As a result, the gold layer 6 diffused into the brazing material, ie, the gold-silicon alloy, to form the brazing material-gold diffusion layer 7. Then, in order to examine the adhesion between the nickel-phosphorus alloy layer 5 and the brazing material-gold diffusion layer 7, a thermoplastic tape (manufactured by 3M), a ceramic plate, a thermoplastic tape, and an aluminum stud are sequentially attached to the silicon chip 8. The aluminum studs were pulled upward after fixing the electronic component package body 1 by overlapping and joining, and the occurrence of peeling was determined. In addition, this test was performed for each Example and each Comparative Example by 100 pieces.

Peeling rate Pieces in which peeling occurred between the nickel-phosphorus alloy layer 5 and the brazing material-gold diffusion layer 7 were counted as pieces in which peeling occurred. The results are shown in Table 2 below. Incidentally, the silicon chip 8 was broken in the piece in which no peeling occurred. In Comparative Example 1, peeling occurred between the nickel-phosphorus alloy layer 5 and the nickel-boron alloy layer 4. This peeling was also counted as peeling.

[0037]

[Table 2]

In each of the test examples, when the nickel-phosphorus alloy layer 5 was formed by electroless plating (before sintering), the phosphorus content of the nickel-phosphorus alloy layer 5 was quantitatively analyzed. This quantitative analysis was performed by using a model: JEOL (JEOL Co., Ltd.) JSM-820 and a detector: Tray Core Northern Co., Ltd. energy dispersive X-ray analyzer using an acceleration voltage of 20 kV and an analysis magnification of 3700. Double (30
× 23 μm). As a result, the phosphorus content was in the range of 5 to 10% by weight.

As is clear from Table 2 above, nickel-
When the maximum sintering temperature after the formation of the phosphorus alloy layer 5 is 600 ° C. or more, the occurrence of peeling is zero, and the adhesion between the nickel-phosphorus alloy layer 5 and the brazing material-gold diffusion layer 7 is reduced. It was extremely strong. Therefore, Examples 1 to 3
The use of the electronic component package body of (1) has an effect that the chip does not peel off when the chip is brazed with a gold-silicon alloy.

When the phosphorus content of the nickel-phosphorus alloy layer 5 was out of the range of 5 to 10% by weight, an electronic component package body was produced in the same manner as in the above embodiment. When the chip is brazed, nickel-phosphorus alloy layer and gold layer cause peeling,
If it exceeds 10% by weight, a non-plated portion where no gold layer is formed was produced.

[Brief description of the drawings]

FIGS. 1A and 1B are explanatory diagrams illustrating a structure of an electronic component package body according to an embodiment, in which FIG. 1A is an explanatory diagram before a silicon chip is joined, and FIG.

FIGS. 2A and 2B are explanatory views showing a structure of a conventional electronic component package body, wherein FIG. 2A is an explanatory view before a silicon chip is joined, and FIG. 2B is an explanatory view after a silicon chip is joined.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Package body for electronic components, 2 ... Insulating substrate, 3 ... Metallized metal layer, 4 ... Nickel-boron alloy layer, 5 ... Nickel-phosphorus alloy layer, 6 ...
Gold layer, 6a: first gold layer, 6b: second gold layer, 7
..Braze material-gold diffusion layer, 8 ... silicon chip.

Claims (4)

[Claims] 1. A wiring board for brazing an electronic component such as a silicon chip on a surface layer using a gold-silicon alloy as a brazing material, comprising: a nickel-phosphorus alloy layer on a material; The nickel-phosphorus alloy layer has a portion containing a large amount of phosphorus and a portion containing a small amount of phosphorus, or a portion containing a large amount of phosphorus is layered on the side of the gold layer. A wiring board characterized by being separated. 2. A method of manufacturing a wiring board for brazing electronic components such as a silicon chip on a surface layer using a gold-silicon alloy as a brazing material, wherein nickel-phosphorus is formed on a material by reduction-type electroless plating. A Ni-P forming step of forming an alloy layer, a sintering step of treating the nickel-phosphorous alloy layer at a temperature of 600 ° C. or more, and a gold layer as a surface layer on the nickel-phosphorous alloy layer after sintering by electroless plating. And a step of forming an Au. 3. The gold layer as a surface layer is formed by performing substitution-type electroless gold plating and then performing reduction-type electroless gold plating in the Au forming step. The method for manufacturing the wiring board according to the above. 4. The method according to claim 2, wherein the nickel-phosphorus alloy layer has a phosphorus content of 5 to 10% by weight.