JPH10168579A - Wiring board and its manufacture - Google Patents

Wiring board and its manufacture

Info

Publication number
JPH10168579A
JPH10168579A JP33210796A JP33210796A JPH10168579A JP H10168579 A JPH10168579 A JP H10168579A JP 33210796 A JP33210796 A JP 33210796A JP 33210796 A JP33210796 A JP 33210796A JP H10168579 A JPH10168579 A JP H10168579A
Authority
JP
Japan
Prior art keywords
nickel
plating layer
layer
phosphorus
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33210796A
Other languages
Japanese (ja)
Inventor
Takahiro Shibata
隆博 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP33210796A priority Critical patent/JPH10168579A/en
Publication of JPH10168579A publication Critical patent/JPH10168579A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques

Landscapes

  • Chemically Coating (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board in which a gold plated layer is uniformly formed on a nickel-phosphorus plated layer, and brister and peeling do not occur between both plated layers. SOLUTION: A package main body 1 for electronic parts is equipped with an insulating substrate 2 consisting of alumina ceramic, a metallized metallic layer 3, a nickel-boron plated layer 4, a nickel-phosphorus plated layer 5 and a gold plated layer 6, and is so constituted that each layer is piled up in this order. At this time, the nickel-phosphorus plated layer 5 contains 5 to 10% phosphorus by weight. Thus, peeling and blister do not occur between the nickel- phosphorus plated layer 5 and the gold plated layer 6, thereby the yield is improved.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体集積回路素
子(IC)が搭載される回路基板や半導体集積回路素子
などの電子部品を収容する電子部品用パッケージ本体等
をなす配線基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board on which a semiconductor integrated circuit element (IC) is mounted, and a wiring board which constitutes a package body for an electronic part for housing electronic parts such as a semiconductor integrated circuit element.

【0002】[0002]

【従来の技術】従来、ICパッケージ等の配線基板を作
成する際、例えば特公平6−84546号に開示されて
いるように、素材であるセラミック絶縁基板上にタング
ステンからなるメタライズ金属層を形成し、このメタラ
イズ金属層の表面に還元型の無電解めっきによりニッケ
ル−ホウ素(Ni−B)めっき層を形成し、この上に同
じく還元型の無電解めっきによりニッケル−リン(Ni
−P)めっき層を形成し、この上に無電解めっきにより
金(Au)めっき層を形成していた。
2. Description of the Related Art Conventionally, when fabricating a wiring board such as an IC package, a metallized metal layer made of tungsten is formed on a ceramic insulating substrate as a material as disclosed in, for example, Japanese Patent Publication No. 6-84546. Then, a nickel-boron (Ni-B) plating layer is formed on the surface of the metallized metal layer by reduction type electroless plating, and nickel-phosphorus (Ni
-P) A plating layer was formed, and a gold (Au) plating layer was formed thereon by electroless plating.

【0003】ここで、ニッケル−ホウ素めっき層は、粗
面なメタライズ金属層の上にピンホール(小穴)やボイ
ド(小空隙)を形成することなく均一な厚みに被着され
る点で有用であり、また、ニッケル−リンめっき層は、
表層である金めっき層と下層であるニッケル−ホウ素め
っき層との密着を強固にする役割を果たす点で有用であ
る。
Here, the nickel-boron plating layer is useful in that it is applied to a uniform thickness without forming pinholes (small holes) or voids (small voids) on the rough metallized metal layer. Yes, and the nickel-phosphorus plating layer is
It is useful in that it plays a role in strengthening the adhesion between the surface gold plating layer and the lower nickel-boron plating layer.

【0004】[0004]

【発明が解決しようとする課題】ところで、所定厚さの
金めっき層を形成しようとしてニッケル−リンめっき層
に還元型無電解めっきを施した場合、ニッケル−リンめ
っき層の上に金がうまく析出しないことがある。ここ
で、還元型無電解めっきとは、還元剤を含むめっき液を
用いて金属被膜を形成させる無電解めっきをいう。
When a nickel-phosphorous plating layer is subjected to reduction-type electroless plating to form a gold plating layer having a predetermined thickness, gold is successfully deposited on the nickel-phosphorous plating layer. May not. Here, reduction type electroless plating refers to electroless plating in which a metal film is formed using a plating solution containing a reducing agent.

【0005】そこで、通常、所定厚さの金めっき層を形
成する場合には、まず、ニッケル−リンめっき層に置換
型無電解めっきによって薄い金めっき層を形成し、その
後、還元型無電解めっきにより所定厚さの金めっき層と
なるようにしている。ここで、置換型無電解めっきと
は、イオン化傾向の差を利用して金属被膜を形成させる
無電解めっきであり、金めっきの場合には、被めっき物
の表面の金属(ここではニッケル)が溶け出して金属イ
オンと電子になり、金イオンがこの電子を受けて析出す
るものである。
In order to form a gold plating layer having a predetermined thickness, a thin gold plating layer is first formed on a nickel-phosphorous plating layer by substitutional electroless plating, and then a reduction type electroless plating is performed. Thus, a gold plating layer having a predetermined thickness is formed. Here, substitutional electroless plating is electroless plating in which a metal film is formed by utilizing the difference in ionization tendency. In the case of gold plating, the metal (nickel here) on the surface of the object to be plated is reduced. It melts and becomes metal ions and electrons, and the gold ions receive and precipitate the electrons.

【0006】しかしながら、従来のICパッケージ用の
配線基板では、ニッケル−リンめっき層と金めっき層と
の密着が十分でなく、両層の間にフクレやハガレが生じ
ることが多く、歩留まりが悪いという問題があった。本
発明は上記課題に鑑みなされたものであり、ニッケル−
リンめっき層の上に一様に金めっき層が形成され、両層
の間にフクレやハガレが生じることのない配線基板を提
供すること、またその製造方法を提供することを目的と
する。
However, in the conventional wiring board for IC packages, the nickel-phosphorous plating layer and the gold plating layer are not sufficiently adhered to each other, and blisters and peeling often occur between the two layers, resulting in poor yield. There was a problem. The present invention has been made in view of the above problems, and nickel-
An object of the present invention is to provide a wiring board in which a gold plating layer is uniformly formed on a phosphorous plating layer and free of blisters and peeling between the two layers, and to provide a manufacturing method thereof.

【0007】[0007]

【課題を解決するための手段、発明の実施の形態及び発
明の効果】上記課題を解決するため、請求項1記載の配
線基板は、ニッケル−リンめっき層と、このニッケル−
リンめっき層の表面に一様に形成された金めっき層とを
備え、450℃で5分放置した後に前記ニッケル−リン
めっき層と前記金めっき層との間にフクレやハガレが発
生しないという性質を有することを特徴とする。
Means for Solving the Problems, Embodiments of the Invention and Effects of the Invention In order to solve the above problems, the wiring board according to claim 1 comprises a nickel-phosphorous plating layer and a nickel-phosphorous plating layer.
A gold plating layer uniformly formed on the surface of the phosphorous plating layer, and a property that no blistering or peeling occurs between the nickel-phosphorous plating layer and the gold plating layer after being left at 450 ° C. for 5 minutes. It is characterized by having.

【0008】この配線基板では、ニッケル−リンめっき
層の表面に金めっき層が形成されているものであればよ
く、例えばニッケル−リンめっき層の下層に他の金属層
(例えばタングステン、モリブデン、モリブデン−マン
ガン合金等のメタライズ金属層やニッケル−ホウ素めっ
き層など)が形成されていてもよいし、そのような下層
が存在せず素材である絶縁基板上に直接ニッケル−リン
めっき層が形成されていてもよい。
In this wiring board, it is sufficient that a gold plating layer is formed on the surface of the nickel-phosphorus plating layer. For example, another metal layer (for example, tungsten, molybdenum, molybdenum) is formed under the nickel-phosphorus plating layer. -A metallized metal layer such as a manganese alloy or a nickel-boron plating layer), or a nickel-phosphorous plating layer is directly formed on an insulating substrate which is a material without such a lower layer. You may.

【0009】この配線基板では、450℃で5分放置し
てその性状を調べたが、この450℃で5分という条件
は、実際に長期間使用に耐え得るか否かを判断するため
の加速試験として十分厳しい条件を選定したものであ
る。従って、この条件において両層間にフクレやハガレ
が発生しない場合には、実使用においてもフクレやハガ
レが発生せず製品価値が十分に認められるものである。
This wiring board was left at 450 ° C. for 5 minutes to examine its properties. The condition of 450 ° C. for 5 minutes is an acceleration for judging whether or not it can be actually used for a long period of time. Strict conditions were selected for the test. Therefore, when blisters and peeling do not occur between both layers under this condition, the blisters and peeling do not occur even in actual use, and the product value is sufficiently recognized.

【0010】従って、本発明の性質を有する配線基板に
よれば、歩留まりが向上し、生産性が非常に高くなると
いう効果が得られる。本発明において、請求項2に記載
したように、ニッケル−リンめっき層はリン含有量が5
〜10重量%であることが好ましい。この場合、ニッケ
ル−リンめっき層の上に金めっき層が一様に形成され、
且つ、両層間にフクレやハガレが発生せず歩留まりが際
立って向上するという効果が得られる。
Therefore, according to the wiring board having the characteristics of the present invention, the effects of improving the yield and greatly increasing the productivity can be obtained. In the present invention, as described in claim 2, the nickel-phosphorus plating layer has a phosphorus content of 5%.
It is preferably from 10 to 10% by weight. In this case, a gold plating layer is uniformly formed on the nickel-phosphorus plating layer,
In addition, there is an effect that the yield is remarkably improved without swelling or peeling between both layers.

【0011】なお、このリン含有量の定量分析方法は特
に限定するものではないが、例えば、エネルギー分散型
X線分析装置により定量することが好ましい。ここで、
リン含有量が10重量%を超えると、ニッケル−リンめ
っき層の耐食性が高くなるため、例えば請求項3のよう
に置換型無電解めっきにより金めっき層を形成する場合
には、ニッケル−リンめっき層からニッケルが溶出しに
くくなり、その結果金が析出しにくくなる傾向にあるた
め、好ましくない。
The method for quantitatively analyzing the phosphorus content is not particularly limited. For example, it is preferable to determine the content by an energy dispersive X-ray analyzer. here,
If the phosphorus content exceeds 10% by weight, the corrosion resistance of the nickel-phosphorous plating layer increases. For example, when forming the gold plating layer by substitutional electroless plating as in claim 3, the nickel-phosphorus plating Nickel is less likely to elute from the layer, and as a result, gold tends to be less likely to precipitate, which is not preferred.

【0012】一方、リン含有量が5重量%未満では、例
えば請求項3のように置換型無電解めっきにより金めっ
き層を形成する場合には、ニッケル−リンめっき層と金
めっき層との界面においてニッケル酸化層が形成されや
すくなること等によって両層の密着性が悪くなる傾向に
あるため、好ましくない。
On the other hand, when the phosphorus content is less than 5% by weight, for example, when the gold plating layer is formed by substitution type electroless plating, the interface between the nickel-phosphorus plating layer and the gold plating layer is determined. In this case, the adhesion between the two layers tends to be deteriorated due to, for example, the formation of a nickel oxide layer, which is not preferable.

【0013】以上の配線基板を製造する方法としては、
請求項4に記載したように、素材(例えばセラミック、
ガラス等の絶縁基板やメタライズ層あるいはニッケル−
ホウ素めっき層などのめっき層)上に還元型無電解めっ
きによりリン含有量が5〜10重量%となるようにニッ
ケル−リンめっき層を形成する工程と、このニッケル−
リンめっき層の表面に置換型無電解めっきにより金めっ
き層を形成する工程とを含むことが好ましい。この場
合、置換型の無電解金めっきは下地金属(つまりニッケ
ル−リンめっき層)が完全に金で覆われた段階で反応が
停止するため、金めっき層の膜厚は薄くなる(例えば
0.01〜0.1μm)。通常は、この置換型無電解め
っきによる金めっき層の上に、更に金めっき層の厚みを
増す目的で、還元型無電解めっきによる金めっき層を形
成する。これにより金めっき層の全体の厚みは、例えば
>0.3μmとなる。
As a method of manufacturing the above wiring board,
As described in claim 4, the material (for example, ceramic,
Insulating substrate such as glass, metallized layer or nickel
A step of forming a nickel-phosphorus plating layer on a plating layer such as a boron plating layer by reduction type electroless plating so that the phosphorus content is 5 to 10% by weight;
Forming a gold plating layer on the surface of the phosphorus plating layer by substitution type electroless plating. In this case, the substitution-type electroless gold plating stops the reaction when the underlying metal (that is, the nickel-phosphorus plating layer) is completely covered with gold, so that the film thickness of the gold plating layer becomes thin (for example, 0.1 mm). 01-0.1 μm). Usually, a gold plating layer formed by reduction type electroless plating is formed on the gold plating layer formed by substitutional electroless plating in order to further increase the thickness of the gold plating layer. Thereby, the overall thickness of the gold plating layer is, for example,> 0.3 μm.

【0014】尚、置換型無電解めっきによって金を被着
形成する際のめっき液としては、従来公知のものを使用
することができ、例えば、可溶性金塩にシアン化アルカ
リ安定化剤等を添加しためっき液などを用いることがで
きる。
As the plating solution for depositing and forming gold by substitutional electroless plating, a conventionally known plating solution can be used. For example, an alkali cyanide stabilizer or the like is added to a soluble gold salt. Plating solution or the like can be used.

【0015】[0015]

【実施例】以下に、本発明の好適な実施例を図面に基づ
いて説明する。尚、本発明の実施の形態は、下記の実施
例に何ら限定されるものではなく、本発明の技術的範囲
に属する限り種々の形態を採り得ることはいうまでもな
い。 [実施例1]電子部品用パッケージ本体1は、アルミナ
セラミックからなる絶縁基板2、メタライズ金属層3、
ニッケル−ホウ素めっき層4、ニッケル−リンめっき層
5、金めっき層6を備えており、各層はこの順序に積み
上げられるように形成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. The embodiments of the present invention are not limited to the following examples at all, and it goes without saying that various embodiments can be adopted as long as they belong to the technical scope of the present invention. Embodiment 1 An electronic component package body 1 includes an insulating substrate 2 made of alumina ceramic, a metallized metal layer 3,
It has a nickel-boron plating layer 4, a nickel-phosphorus plating layer 5, and a gold plating layer 6, and each layer is formed so as to be stacked in this order.

【0016】かかる電子部品用パッケージ本体1は、以
下の手順により製造した。即ち、所定のアルミナ原料粉
体に有機溶剤等を添加混合してスラリーとし、これをド
クターブレード法等を採用することによりセラミックグ
リーンシートとし、しかる後、タングステン粉末等から
なる導体ペーストを用いてセラミックグリーンシートに
スクリーン印刷し、次いで、これを図示はしないが適数
枚積層、圧着し、1600℃にて同時焼成した。これに
より、絶縁基板2上にメタライズ金属層3を一体的に形
成した。
The electronic component package body 1 was manufactured by the following procedure. That is, a predetermined alumina raw material powder is mixed with an organic solvent and the like to form a slurry, which is formed into a ceramic green sheet by employing a doctor blade method or the like, and thereafter, a ceramic is formed using a conductor paste made of tungsten powder or the like. Screen printing was performed on the green sheet, and then, though not shown, an appropriate number of these were laminated, pressed, and fired simultaneously at 1600 ° C. Thereby, the metallized metal layer 3 was integrally formed on the insulating substrate 2.

【0017】そして、このメタライズ金属層3の上に、
硫酸ニッケルとDMABジメチルアミンボランを還元剤
として含む無電解めっき液(奥野製薬(株)製のトップ
ケミアロイB−1(商品名))を用いて、液温65℃、
pH6.7、めっき時間15分という条件でめっきを行
い、ニッケル−ホウ素めっき層4を厚さ1.2μm被
着、形成し、その後図示しないピン端子を銀ロウにより
ロウ付けするために加熱した。
Then, on this metallized metal layer 3,
Using an electroless plating solution (Top Chemialloy B-1 (trade name) manufactured by Okuno Pharmaceutical Co., Ltd.) containing nickel sulfate and DMAB dimethylamine borane as a reducing agent, a solution temperature of 65 ° C.
Plating was performed under conditions of pH 6.7 and plating time of 15 minutes, a nickel-boron plating layer 4 was applied and formed to a thickness of 1.2 μm, and then heated to braze pin terminals (not shown) with silver brazing.

【0018】次いで、このニッケル−ホウ素めっき層4
の上に、硫酸ニッケルと次亜リン酸ナトリウムを還元剤
として含む無電解めっき液(日本カニゼン(株)のブル
ーシューマー(商品名))を用いて、液温90℃、pH
6.0、めっき時間10分という条件でめっきを行い、
ニッケル−リンめっき層5を厚さ3.0μm被着形成
し、その後このニッケル−リンめっき層5のシンタリン
グを行った。
Next, the nickel-boron plating layer 4
The solution temperature was 90 ° C. and the pH was adjusted using an electroless plating solution (Blue Schumer (trade name) manufactured by Nippon Kanigen Co., Ltd.) containing nickel sulfate and sodium hypophosphite as reducing agents.
Plating under the condition of 6.0, plating time 10 minutes,
A nickel-phosphorous plating layer 5 was formed with a thickness of 3.0 μm, and then the nickel-phosphorous plating layer 5 was sintered.

【0019】続いて、置換型無電解金めっき用のめっき
液(エヌ・イーケムキャット(株)製のアトメックス
(商品名))を用いて、液温85℃、pH6.0、めっ
き時間3分という条件でめっきを行い、金めっき層6の
うち下層に相当する第1金めっき層6aを厚さ0.01
〜0.1μm被着形成した。
Subsequently, using a plating solution for substitution type electroless gold plating (Atomex (trade name) manufactured by NE Chemcat Co., Ltd.), the solution temperature was 85 ° C., the pH was 6.0, and the plating time was 3 minutes. The first gold plating layer 6a corresponding to the lower layer of the gold plating layer 6 was formed to a thickness of 0.01
0.10.1 μm.

【0020】最後に、水素化ホウ素ナトリウムを還元剤
として含む無電解めっき液(奥野製薬(株)製のOPC
ムデンゴールド25(商品名))を用いて、液温73
℃、pH13.5、めっき時間30分という条件でめっ
きを行い、金めっき層6のうち上層に相当する第2金め
っき層6bを厚さ2.0μm被着形成した。
Finally, an electroless plating solution containing sodium borohydride as a reducing agent (OPC manufactured by Okuno Pharmaceutical Co., Ltd.)
Liquid temperature 73 (Mudden Gold 25 (trade name))
Plating was performed under the conditions of ° C, a pH of 13.5, and a plating time of 30 minutes, and a second gold plating layer 6b corresponding to the upper layer of the gold plating layer 6 was adhered and formed to a thickness of 2.0 µm.

【0021】このようにして、図1に示す構造の電子部
品用パッケージ本体1を作製した。 [比較例1〜3]比較例1〜3では、上記実施例1の還
元型無電解ニッケル−リンめっき用のめっき液の代わり
に下記表1に示すめっき液を用いてニッケル−リンめっ
き層を被着形成した以外は、上記実施例1と同様にして
図1と同様の構造の電子部品用パッケージ本体を作製し
た。
Thus, the electronic component package body 1 having the structure shown in FIG. 1 was manufactured. [Comparative Examples 1 to 3] In Comparative Examples 1 to 3, a nickel-phosphorous plating layer was formed using a plating solution shown in Table 1 below instead of the plating solution for the reduction type electroless nickel-phosphorous plating of Example 1 described above. An electronic component package body having the same structure as that of FIG. 1 was produced in the same manner as in Example 1 except that it was adhered.

【0022】[0022]

【表1】 [Table 1]

【0023】[試験例]以上のようにして実施例1及び
比較例1〜3の試験片(30×50mm)を各々100
ピースずつ作製し、これらについて下記の検査及び分析
を行った。 無メッキの発生の有無について 無メッキとは、ニッケル−リンめっき層の一部又は全部
に金めっき層が被着していない状態をいう。無メッキの
検査は、目視あるいは拡大鏡20倍により上方から試験
片を見たときに下地のニッケル−リンめっき層が見えた
ら無メッキが発生したと判断した。
Test Example As described above, test pieces (30 × 50 mm) of Example 1 and Comparative Examples 1 to 3 were each 100
Pieces were manufactured, and the following inspection and analysis were performed on these pieces. Regarding Presence or Absence of No Plating No plating refers to a state in which a gold plating layer is not adhered to part or all of a nickel-phosphorus plating layer. In the inspection for no plating, if the underlying nickel-phosphorous plating layer was visible when the test piece was viewed from above or visually from above with a magnifying glass of 20 times, it was determined that no plating had occurred.

【0024】ハガレ・フクレの発生の有無について 各試験例の試験片100ピースを450℃で5分間放置
した後、ニッケル−リンめっき層と金めっき層との間の
ハガレ・フクレの発生の有無を検査した。ここで、ハガ
レとは、金めっき層がニッケル−リンめっき層からめく
れ上がるように分離して下地のニッケル−リンめっき層
が露出している状態をいう。ハガレの検査は、目視ある
いは拡大鏡20倍により上方から試験片を見たときに下
地が見えるものをハガレが発生したと判断した。
About the presence or absence of peeling or blistering After the test pieces of each test example were left at 450 ° C. for 5 minutes, the presence or absence of peeling or blistering between the nickel-phosphorus plating layer and the gold plating layer was determined. Inspected. Here, peeling refers to a state in which the gold plating layer is separated from the nickel-phosphorous plating layer so as to be turned up and the underlying nickel-phosphorous plating layer is exposed. In the test for peeling, it was judged that peeling occurred when the test piece was visible from above or visually from above with a magnifying glass of 20 times.

【0025】また、フクレとは、金めっき層とニッケル
−リンめっき層との間に局部的に発生する略円形状の膨
れをいう。膨れの検査は、目視あるいは拡大鏡20倍に
より上方から試験片を見たときにφ50μm以上面積に
ついての膨らみがあるものをフクレが発生したと判断し
た。
The blister means a substantially circular swelling locally generated between the gold plating layer and the nickel-phosphorus plating layer. In the inspection of swelling, when the test piece was visually observed or viewed from above with a magnifying glass 20 times, it was determined that blisters having an area of 5050 μm or more swelled.

【0026】リン含有量について 実施例1及び比較例1〜3の各々において、ニッケル−
リンめっき層5を被着形成した際、ニッケル−リンめっ
き層5のリン含有量の定量分析を行った。この定量分析
は、機種:JEOL(日本電子(株))製のJSM−8
20、検出器:トレイコア・ノーザン(株)製のエネル
ギー分散型X線分析装置を用いて、加速電圧20kV、
分析倍率3700倍(30×23μm)という条件で行
った。
Regarding phosphorus content In each of Example 1 and Comparative Examples 1 to 3, nickel-
When the phosphorus plating layer 5 was formed by adhesion, a quantitative analysis of the phosphorus content of the nickel-phosphorus plating layer 5 was performed. This quantitative analysis was carried out using a model: JEOL (JEOL) manufactured by JSM-8.
20, detector: using an energy dispersive X-ray analyzer manufactured by Tray Core Northern Co., Ltd., an acceleration voltage of 20 kV,
The analysis was performed under the condition of an analysis magnification of 3700 times (30 × 23 μm).

【0027】以上の検査結果及び分析結果を下記表2に
示す。
The results of the above inspection and analysis are shown in Table 2 below.

【0028】[0028]

【表2】 [Table 2]

【0029】尚、表2ではリン含有量は代表的な値を1
つだけ示したが、数回行った定量分析によれば、試験例
2では2〜5重量%、試験例3では5〜10重量%、試
験例4では10〜13重量%の範囲内であった。この表
2から明らかなように、試験例1、2(比較例1、2)
は無メッキの発生はないもののハガレ・フクレの発生率
が高いため歩留まりが悪く、また、試験例4(比較例
3)はハガレ・フクレの発生はないものの無メッキの発
生率が高いため歩留まりが悪い。これに対して、試験例
3(実施例1)は、ハガレ・フクレ及び無メッキのいず
れも発生しなかった。このため、量産する際に歩留まり
がよく、生産性が高いという効果が得られる。
In Table 2, the typical phosphorus content is 1
According to quantitative analysis performed several times, it was within the range of 2 to 5% by weight in Test Example 2, 5 to 10% by weight in Test Example 3, and 10 to 13% by weight in Test Example 4. Was. As is clear from Table 2, Test Examples 1 and 2 (Comparative Examples 1 and 2)
Although no plating was not generated, the yield was poor because of the occurrence of peeling and swelling, and the yield was low in Test Example 4 (Comparative Example 3) because of the high incidence of plating but no occurrence of peeling and swelling. bad. On the other hand, in Test Example 3 (Example 1), neither peeling nor blistering nor plating occurred. For this reason, the effect that the yield is good and the productivity is high in mass production can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 実施例1の電子部品用パッケージ本体の構造
を表す断面図である。
FIG. 1 is a cross-sectional view illustrating a structure of an electronic component package body according to a first embodiment.

【符号の説明】[Explanation of symbols]

1・・・電子部品用パッケージ本体、2・・・絶縁基
板、3・・・メタライズ金属層、4・・・ニッケル−ホ
ウ素めっき層、5・・・ニッケル−リンめっき層、6・
・・金めっき層、6a・・・第1金めっき層、6b・・
・第2金めっき層。
DESCRIPTION OF SYMBOLS 1 ... Electronic component package main body, 2 ... Insulating board, 3 ... Metallized metal layer, 4 ... Nickel-boron plating layer, 5 ... Nickel-phosphorus plating layer, 6 ...
..Gold plating layer, 6a ... first gold plating layer, 6b
-Second gold plating layer.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 ニッケル−リンめっき層と、 このニッケル−リンめっき層の表面に一様に形成された
金めっき層とを備え、 450℃で5分放置した後に前記ニッケル−リンめっき
層と前記金めっき層との間にフクレやハガレが発生しな
いという性質を有することを特徴とする配線基板。
A nickel-phosphorous plating layer; and a gold plating layer uniformly formed on the surface of the nickel-phosphorous plating layer. A wiring board having a property that blisters and peeling do not occur between the wiring board and a gold plating layer.
【請求項2】 前記ニッケル−リンめっき層はリン含有
量が5〜10重量%であることを特徴とする請求項1記
載の配線基板。
2. The wiring board according to claim 1, wherein the nickel-phosphorus plating layer has a phosphorus content of 5 to 10% by weight.
【請求項3】 前記金めっき層のうち前記ニッケル−リ
ンめっき層と接する部分は置換型無電解めっきにより形
成されたことを特徴とする請求項1又は2記載の配線基
板。
3. The wiring board according to claim 1, wherein a portion of the gold plating layer that contacts the nickel-phosphorus plating layer is formed by substitution type electroless plating.
【請求項4】 素材上に還元型無電解めっきによりリン
含有量が5〜10重量%となるようにニッケル−リンめ
っき層を形成する工程と、 このニッケル−リンめっき層の表面に置換型無電解めっ
きにより膜厚の薄い金めっき層を形成する工程とを含む
ことを特徴とする配線基板の製造方法。
4. A step of forming a nickel-phosphorus plating layer on a material by reduction type electroless plating so that the phosphorus content is 5 to 10% by weight; Forming a thin gold-plated layer by electrolytic plating.
JP33210796A 1996-12-12 1996-12-12 Wiring board and its manufacture Pending JPH10168579A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33210796A JPH10168579A (en) 1996-12-12 1996-12-12 Wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33210796A JPH10168579A (en) 1996-12-12 1996-12-12 Wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JPH10168579A true JPH10168579A (en) 1998-06-23

Family

ID=18251236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33210796A Pending JPH10168579A (en) 1996-12-12 1996-12-12 Wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JPH10168579A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007246963A (en) * 2006-03-15 2007-09-27 Yamato Denki Kogyo Kk Plated body and plating method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007246963A (en) * 2006-03-15 2007-09-27 Yamato Denki Kogyo Kk Plated body and plating method

Similar Documents

Publication Publication Date Title
JPH0684546B2 (en) Electronic parts
JPH08227656A (en) Formation of conductive pattern for plasma display
US11049838B2 (en) Conductive bump and electroless Pt plating bath
EP0068276B1 (en) Method for producing metal layers on substrates by electroless plating techniques
JP3561240B2 (en) Manufacturing method of wiring board
JPH10168579A (en) Wiring board and its manufacture
EP2309830B1 (en) Plating film, printed wiring board, and module substrate
JP3050528B2 (en) Method of manufacturing a wiring board for performing wire bonding
JP2004087597A (en) Method for manufacturing wiring board
JP3005202B2 (en) Wiring board for brazing electronic components with Au-Si and method of manufacturing the same
JPH1056247A (en) Glass wiring board and production thereof
JP4264091B2 (en) Wiring board manufacturing method
JPS6314877B2 (en)
JP3066201B2 (en) Circuit board and method of manufacturing the same
US6068912A (en) Platible non-metallic filler material for metallurgical screening paste
JP3866164B2 (en) Wiring board
JP3618176B2 (en) Wiring board
JP2004332036A (en) Electroless plating method
JP3898482B2 (en) Wiring board
JP3857219B2 (en) Wiring board and manufacturing method thereof
JP3740407B2 (en) Wiring board
US20080075919A1 (en) Wiring board and process for producing the same
JPH07161567A (en) Electrode for electronic part and its manufacture
JPH09256163A (en) Nickel plating treatment on ceramic substrate
JPH08273967A (en) Method for forming electrode of electronic component

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060710