JPH10223665A - Method of sealing flip-chip semiconductor device with resin - Google Patents
Method of sealing flip-chip semiconductor device with resinInfo
- Publication number
- JPH10223665A JPH10223665A JP2187897A JP2187897A JPH10223665A JP H10223665 A JPH10223665 A JP H10223665A JP 2187897 A JP2187897 A JP 2187897A JP 2187897 A JP2187897 A JP 2187897A JP H10223665 A JPH10223665 A JP H10223665A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- chip
- substrate
- sealing
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＩＣ（半導体集積
回路装置）実装形態がフリップチップ実装であり、ＢＧ
Ａ（ボール・グリッド・アレイ），ＣＳＰ（チップ・サ
イズ・パッケージ）製品の樹脂封止方法に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip mounting IC (semiconductor integrated circuit device),
The present invention relates to a resin sealing method for A (ball grid array) and CSP (chip size package) products.
【０００２】[0002]
【従来の技術】従来、このような分野の技術としては、
例えば、 （１）『フリップチップ実装の高信頼化に及ぼす樹脂補
強効果』 電子情報通信学会論文誌Ｃ−ＩＩ，Ｖｏｌ．
Ｊ７３−Ｃ−ＩＩ Ｎｏ．９，１９９０年９月（５１６
頁〜５２４頁）。2. Description of the Related Art Conventionally, techniques in such a field include:
For example, (1) “Effect of resin reinforcement on high reliability of flip chip mounting” Transactions of the Institute of Electronics, Information and Communication Engineers, C-II, Vol.
J73-C-II No. 9, September 1990 (516
Pp. 524).
【０００３】（２）『樹脂被覆補強型高信頼フリップチ
ップ実装の開発』 電子情報通信学会論文誌Ｃ，Ｖｏ
ｌ．Ｊ７０−Ｃ Ｎｏ．１２，１９８７年１２月（１５
７５頁〜１５８２頁）。に開示されるようなものがあっ
た。半導体ベアチップ実装技術には、ワイヤボンディン
グ（Ｗ／Ｂ）実装、フリップチップ実装、ＴＡＢ（ＴＡ
ＰＥ ＡＵＴＯＭＡＴＥＤ ＢＯＮＤＩＮＧ）実装など
があり、各種用途によって使い分けられている。(2) "Development of resin-coated reinforced high-reliability flip-chip mounting" IEICE Transactions C, Vo
l. J70-C No. 12, December 1987 (15
75 to 1582). As disclosed in Semiconductor bare chip mounting technologies include wire bonding (W / B) mounting, flip chip mounting, TAB (TA
PE AUTOMATED BONDING) mounting, etc., which are properly used for various purposes.
【０００４】フリップチップ実装は、上記文献に開示さ
れているような封止形態があり、樹脂により応力を吸収
することにより、バンプ接続の寿命を向上させることが
広く知られている。[0004] The flip-chip mounting has a sealing form as disclosed in the above-mentioned literature, and it is widely known that the life of bump connection is improved by absorbing stress by a resin.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、以上述
べた従来の半導体ベアチップの封止方法では、封止を行
う際に、樹脂は半導体チップの外周より中央部へと流れ
込んでいくため、空洞が生じてしまう。また、完全に半
導体チップ（フリップチップ）を覆う封止方法では、Ｉ
Ｃ面より高さが樹脂の分高くなり、フリップチップ実装
のメリットがなくなってしまう。However, in the above-described conventional method for sealing a semiconductor bare chip, the resin flows into the central portion from the outer periphery of the semiconductor chip at the time of sealing. Would. In the sealing method for completely covering the semiconductor chip (flip chip),
The height is higher than the C surface by the amount of the resin, and the merit of flip chip mounting is lost.
【０００６】本発明は、上記問題点を除去し、フリップ
チップを使用したＢＧＡ，ＣＳＰ製品の樹脂封止を、空
洞無しで行うことができるとともに、フリップチップ実
装の樹脂の高さを低くすることができるフリップチップ
型半導体装置の樹脂封止方法を提供することを目的とす
る。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is possible to seal a resin of a BGA or CSP product using a flip chip without a cavity and to reduce the height of the resin for flip chip mounting. It is an object of the present invention to provide a method for encapsulating a flip-chip type semiconductor device with a resin.
【０００７】[0007]
【課題を解決するための手段】本発明は、上記目的を達
成するために、 （１）フリップチップ型半導体装置、つまり、ＢＧＡ，
ＣＳＰ製品の搭載基板への半導体チップの樹脂封止方法
において、略中央部にホールが形成されたＢＧＡ，ＣＳ
Ｐ製品の搭載基板に半導体ベアチップを搭載する工程
と、前記搭載基板を上にして裏面より前記ホールから樹
脂を注入して、樹脂封止する工程とを施すようにしたも
のである。To achieve the above object, the present invention provides: (1) a flip-chip type semiconductor device, that is, a BGA,
In a resin sealing method of a semiconductor chip on a mounting substrate of a CSP product, a BGA, CS having a hole formed at a substantially central portion is provided.
A step of mounting a semiconductor bare chip on a mounting substrate of a P product, and a step of injecting resin from the hole from the back surface with the mounting substrate facing upward and sealing the resin are performed.
【０００８】したがって、フリップチップを使用したＢ
ＧＡ，ＣＳＰ製品の樹脂封止は空洞無しの封止を行うこ
とができる。 （２）上記（１）記載のフリップチップ型半導体装置の
樹脂封止方法において、前記ホールからの樹脂注入は、
樹脂コータの定点からの樹脂吐出によるようにしたもの
である。Therefore, B using flip chip
GA and CSP products can be sealed without voids. (2) In the resin sealing method for a flip-chip type semiconductor device according to the above (1), the resin injection from the hole includes:
This is based on resin discharge from a fixed point of the resin coater.
【０００９】したがって、任意の基板位置より塗布を行
うだけであり、樹脂コータの塗布部を移動させずに、容
易に封止を行うことができる。Therefore, the coating can be performed only from an arbitrary substrate position, and the sealing can be easily performed without moving the coating portion of the resin coater.
【００１０】[0010]
【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して詳細に説明する。図１は本発明の実施
例を示すＢＧＡ，ＣＳＰ基板の斜視図である。この図に
示すように、ＢＧＡ，ＣＳＰ基板（フリップチップ型半
導体装置の搭載基板）１にはパッド２が形成されてお
り、そのＢＧＡ，ＣＳＰ基板１の中央にホール３が形成
されている。このホール３は樹脂を流し込むためのもの
であり、寸法は基板の大きさにより任意に決定する。基
板設計時は穴を空けるために配線を考慮し、設計を行
う。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a perspective view of a BGA and CSP substrate showing an embodiment of the present invention. As shown in this figure, a pad 2 is formed on a BGA / CSP substrate (a mounting substrate of a flip-chip type semiconductor device) 1, and a hole 3 is formed at the center of the BGA / CSP substrate 1. The holes 3 are for pouring resin, and the dimensions are arbitrarily determined according to the size of the substrate. When designing the board, the wiring is taken into account to make the holes.
【００１１】以下、本発明の実施例を示す半導体チップ
の封止方法について図を参照しながら説明する。図２は
本発明の実施例を示す半導体ベアチップの封止工程断面
図である。 （１）まず、図２（ａ）に示すように、半導体チップ
（フリップチップ）４の電極５上にハンダバンプ６を形
成し、基板１上のパッド２に合わせ、半導体チップ４を
リフロー等により搭載する。Hereinafter, a method of sealing a semiconductor chip according to an embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a sectional view showing a step of sealing a semiconductor bare chip according to an embodiment of the present invention. (1) First, as shown in FIG. 2A, a solder bump 6 is formed on an electrode 5 of a semiconductor chip (flip chip) 4, and the semiconductor chip 4 is mounted by reflow or the like according to the pad 2 on the substrate 1. I do.
【００１２】（２）次に、図２（ｂ）に示すように、半
導体チップ４を搭載後、基板１の裏面を上にし、吐出器
８を用いてホール３より封止樹脂７を流し込む。 （３）そこで、封止樹脂７は半導体チップ４の端面まで
流れ込むと、表面張力により、図２（ｃ）に示すよう
に、フィレットができ、封止樹脂７の広がりは止まり、
基板１の上部まで封止すれば完了である。(2) Next, as shown in FIG. 2B, after the semiconductor chip 4 is mounted, the sealing resin 7 is poured from the hole 3 using the discharger 8 with the back surface of the substrate 1 facing upward. (3) Then, when the sealing resin 7 flows to the end face of the semiconductor chip 4, a fillet is formed due to surface tension as shown in FIG. 2C, and the spreading of the sealing resin 7 stops.
The process is completed when the upper part of the substrate 1 is sealed.
【００１３】このように、本発明の半導体チップの封止
方法を使用することにより、フリップチップを使用した
ＢＧＡ，ＣＳＰ製品の樹脂封止は、空洞無しの封止を行
うことができる。また、上記の半導体ベアチップの封止
方法では、任意の基板位置より塗布を行うだけであり、
樹脂コータの塗布部を移動させずに、容易に封止をする
ことができる。As described above, by using the semiconductor chip sealing method of the present invention, resin sealing of BGA and CSP products using a flip chip can be performed without a cavity. Further, in the method of sealing a semiconductor bare chip described above, it is only necessary to perform coating from an arbitrary substrate position.
The sealing can be easily performed without moving the application portion of the resin coater.
【００１４】なお、図２においては、半導体チップ４の
外側に配置された電極５へのハンダバンプ６の接続につ
いてのみ示されているが、図１に示すように、基板１に
は多くのパッド２を形成しておき、これに対応して、半
導体チップ４の略中央部（基板１のホール３に対応する
部分）を除く部分に多くの電極（図示なし）を形成し、
それらの電極への接続を行うように構成できることは言
うまでもない。Although FIG. 2 shows only the connection of the solder bumps 6 to the electrodes 5 disposed outside the semiconductor chip 4, as shown in FIG. In response to this, a number of electrodes (not shown) are formed in a portion of the semiconductor chip 4 except for a substantially central portion (a portion corresponding to the hole 3 of the substrate 1),
It goes without saying that it can be configured to make connections to those electrodes.
【００１５】なお、本発明は上記実施例に限定されるも
のではなく、本発明の趣旨に基づいて種々の変形が可能
であり、これらを本発明の範囲から排除するものではな
い。It should be noted that the present invention is not limited to the above embodiment, and various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.
【００１６】[0016]
【発明の効果】以上、詳細に説明したように、本発明に
よれば、以下のような効果を奏することができる。 （１）請求項１記載の発明によれば、フリップチップを
使用したＢＧＡ，ＣＳＰ製品の樹脂封止を空洞無しで行
うことができるので、信頼性の高いＢＧＡ，ＣＳＰ製品
を得ることができる。As described above, according to the present invention, the following effects can be obtained. (1) According to the first aspect of the invention, resin sealing of a BGA or CSP product using a flip chip can be performed without a cavity, so that a highly reliable BGA or CSP product can be obtained.
【００１７】また、フリップチップ実装の樹脂の高さを
低くすることができる。 （２）請求項２記載の発明によれば、任意の基板位置よ
り塗布を行うだけであり、樹脂コータの塗布部を移動さ
せずに、容易に封止を行うことができる。Further, the height of the flip-chip mounting resin can be reduced. (2) According to the second aspect of the present invention, the coating can be performed only from an arbitrary substrate position, and the sealing can be easily performed without moving the coating portion of the resin coater.
【図１】本発明の実施例を示すＢＧＡ，ＣＳＰ基板の斜
視図である。FIG. 1 is a perspective view of a BGA, CSP substrate showing an embodiment of the present invention.
【図２】本発明の実施例を示す半導体ベアチップの封止
工程断面図である。FIG. 2 is a sectional view showing a step of sealing a semiconductor bare chip according to an embodiment of the present invention.
１ ＢＧＡ，ＣＳＰ基板（フリップチップ型半導体装
置の搭載基板） ２ パッド ３ ホール ４ 半導体チップ（フリップチップ） ５ 電極 ６ ハンダバンプ ７ 封止樹脂 ８ 吐出器DESCRIPTION OF SYMBOLS 1 BGA, CSP board (substrate for mounting a flip chip type semiconductor device) 2 Pad 3 Hole 4 Semiconductor chip (flip chip) 5 Electrode 6 Solder bump 7 Sealing resin 8 Dispenser
Claims (2)
への半導体チップの樹脂封止方法において、（ａ）略中
央部にホールが形成された前記搭載基板に半導体チップ
を搭載する工程と、（ｂ）前記搭載基板を上にして裏面
より前記ホールから樹脂を注入して、樹脂封止する工程
とを施すことを特徴とするフリップチップ型半導体装置
の樹脂封止方法。1. A method of resin sealing a semiconductor chip on a mounting substrate of a flip-chip type semiconductor device, comprising: (a) mounting a semiconductor chip on the mounting substrate having a hole formed at a substantially central portion; A) injecting a resin from the hole from the back surface with the mounting substrate facing upward, and sealing the resin.
装置の樹脂封止方法において、前記ホールからの樹脂注
入は、樹脂コータの定点からの樹脂吐出によることを特
徴とするフリップチップ型半導体装置の樹脂封止方法。2. The method according to claim 1, wherein the resin is injected from the hole by discharging the resin from a fixed point of a resin coater. Resin sealing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2187897A JPH10223665A (en) | 1997-02-05 | 1997-02-05 | Method of sealing flip-chip semiconductor device with resin |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2187897A JPH10223665A (en) | 1997-02-05 | 1997-02-05 | Method of sealing flip-chip semiconductor device with resin |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10223665A true JPH10223665A (en) | 1998-08-21 |
Family
ID=12067390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2187897A Withdrawn JPH10223665A (en) | 1997-02-05 | 1997-02-05 | Method of sealing flip-chip semiconductor device with resin |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10223665A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107567186A (en) * | 2017-08-28 | 2018-01-09 | 维沃移动通信有限公司 | A kind of attaching method and circuit board |
| CN107911936A (en) * | 2017-10-30 | 2018-04-13 | 维沃移动通信有限公司 | A kind of circuit board, the processing method of circuit board and electronic equipment |
| WO2020238727A1 (en) * | 2019-05-24 | 2020-12-03 | 华为技术有限公司 | Support and electronic device |
| CN116321788A (en) * | 2021-10-13 | 2023-06-23 | 苏州康尼格电子科技股份有限公司 | PCBA (printed circuit board assembly) board packaging equipment and PCBA board packaging method |
| CN116313858A (en) * | 2023-05-25 | 2023-06-23 | 赛晶亚太半导体科技(北京)有限公司 | Welding method for fixture-free fixation of high-power IGBT module |
-
1997
- 1997-02-05 JP JP2187897A patent/JPH10223665A/en not_active Withdrawn
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107567186A (en) * | 2017-08-28 | 2018-01-09 | 维沃移动通信有限公司 | A kind of attaching method and circuit board |
| CN107567186B (en) * | 2017-08-28 | 2020-04-24 | 维沃移动通信有限公司 | Surface mounting method and circuit board |
| CN107911936A (en) * | 2017-10-30 | 2018-04-13 | 维沃移动通信有限公司 | A kind of circuit board, the processing method of circuit board and electronic equipment |
| CN107911936B (en) * | 2017-10-30 | 2019-11-19 | 维沃移动通信有限公司 | The processing method and electronic equipment of a kind of circuit board, circuit board |
| WO2020238727A1 (en) * | 2019-05-24 | 2020-12-03 | 华为技术有限公司 | Support and electronic device |
| CN116321788A (en) * | 2021-10-13 | 2023-06-23 | 苏州康尼格电子科技股份有限公司 | PCBA (printed circuit board assembly) board packaging equipment and PCBA board packaging method |
| CN116321788B (en) * | 2021-10-13 | 2024-02-06 | 苏州康尼格电子科技股份有限公司 | PCBA (printed circuit board assembly) board packaging equipment and PCBA board packaging method |
| CN116313858A (en) * | 2023-05-25 | 2023-06-23 | 赛晶亚太半导体科技(北京)有限公司 | Welding method for fixture-free fixation of high-power IGBT module |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20040406 |