JPH10210064A - Sdh transmission system and sdh transmission equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent each station from falling into the free-running state regardless of the stop of clocks in both of current and standby systems in an SDH (synchronous digital hierarchy) network constituted into a ring and to enable an operator to realize a synchronous network without using a specific bus overhead. SOLUTION: A host station 9, higher-order stations 10 and 11, and a lower- order station 12 are connected into a ring by a transmission line to form an SDH network, and a clock path is generated in the SDH network to transmit information. In this case, a clockwise or counterclockwise path is formed in the SDH network with the host station 9 as the start point in accordance with a clock supplied by a clock supply means 2A to make the SDH synchronous. If a fault occurs in the clock path of the host station 9, both of clockwise and counterclockwise clock paths going to the host station 9 with the lower- order station 12 as the start point are formed in accordance with a clock supplied by a clock supply means 2B to make the SDH network synchronous.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a ring-shaped SDH (Synchronous Digita).
1 Hierarchy) An SDH transmission system for controlling a clock path of a network and an SDH transmission apparatus for acquiring a clock path of the SDH network.

[0002]

2. Description of the Related Art FIG.
FIG. 1 is a configuration diagram showing a conventional SDH transmission system disclosed in Japanese Patent Application Laid-Open Publication No. HEI 9-209, in which reference numerals 90 and 91 denote clock paths formed by being superimposed on a path for transmitting information between stations in the SDH transmission system. .

In the transmission direction of the clock path 90, an upper station 50A, a transmission path 80, an upper station 60A, a transmission path 81, and a lower station 70 are connected as an SDH transmission device. Station 50B, transmission line 8
2. The upper station 60B, the transmission path 83, and the lower station 70
It is connected as a DH transmission device.

The upper station 50A has an adding means 51A, which adds clock path monitoring information to the SDH multiplexed signal by the adding means 51A to transmit the transmission path 80 and the upper station 60.
A: The data is transmitted to the lower station 70 via the transmission line 81.

[0005] The upper station 50B has an adding means 51B. The adding means 51B adds clock path monitoring information to the SDH multiplexed signal to transmit the transmission path 82 and the upper station 60.
B, which is transmitted to the lower station 70 via the transmission path 83.

[0006] The lower station 70 is connected with one of the clock paths 90 and 91 (for example, the clock path 14) as the active system and the other (for example, the clock path 15) as the standby system.

As a result, the upper station 60A becomes a station connected to the upper level of the working clock path 90 of the lower station 70, and the upper station 50A is further connected to the upper level of the working clock path 90 of the upper station 60A. Become a station.

Similarly, the upper station 60B is a station connected above the backup clock path 91 of the lower station 70, and the upper station 50B is connected further above the backup clock path 91 of the upper station 60B. Become a station.

The lower station 70 has detecting means 71 and 72 and switching means 73. The detecting means 71 detects the clock path monitoring information added by the adding means 51A of the upper station 50A of the working clock path 90 from the transmission line 81. The detecting means 72 is connected to the upper station 5 of the standby clock path 9.
The clock path monitoring information added by the 0B adding means 51B is detected from the transmission line 83.

The switching means 73 includes detection means 71 and 72
Is a clock selection circuit that switches to the standby clock path 90 or the working clock path 91 based on the detection result of

Next, the operation will be described. The SDH transmission system shown in FIG. 22 employs a slave synchronization scheme. The lower station 72 subordinately synchronizes the clock path 90 transmitted to the upper station 50A, the upper station 60A, and the lower station 72 for use, and is transmitted to the upper station 50B, the upper station 60B, and the lower station 72 as a backup. Clock path 9
1 is provided.

The upper stations 50A and 50B add clock supervisor information of each clock path to a predetermined area on a path overhead (hereinafter referred to as POH).
Therefore, when an abnormality occurs in the transmission bus from the upper station 50A to the upper station 60A and the upper station 60A becomes in a self-running state, the lower station 70 detects the upper station 60A by the detecting means 71.
An abnormality based on the received clock path monitoring information is detected.

For this reason, when the spare clock path 91 is normal, the switching means 73 switches the subordinates from the clock path 90 to the clock path 91, and the clock path 91 is subordinately synchronized.

Therefore, the free-running frequency accuracy of the upper station 60A does not affect the lower station 70, and the frequency accuracy of the lower station 70 can be determined without being limited by the frequency accuracy of the upper station 60A. The network synchronizer for determining the free-running frequency in the station 60A can be made inexpensive.

[0015]

Since the conventional SDH transmission apparatus is configured as described above, when applied to a ring-shaped SDH network, the clock of the main station is stopped due to a power failure or the like. Then, the clock paths of the working system and the protection system sent from the master station are both disconnected, so that all the stations become free running or use path overhead by adding clock path monitoring information to the clock path. Therefore, there is a problem that the operator cannot use a specific POH.

According to the present invention, in order to solve the above-described problem of the conventional example, each station may fall into a self-running state even if both the working and standby clocks are stopped in a ring-shaped SDH network. It is a first object of the present invention to obtain an SDH transmission system capable of realizing a synchronous network without using a specific POH without using a specific POH.

Further, according to the present invention, even if the clocks of both the working system and the standby system are stopped in the ring-shaped SDH network, the system does not fall into a self-running state and the operator uses a specific POH. A second object is to obtain an SDH transmission device capable of acquiring a synchronous clock without performing the above.

[0018]

Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve each object, an SDH transmission system according to the present invention forms an SDH network by connecting a master station and a plurality of slave stations in a ring by a transmission line, and generates an information clock by generating a clock path in the SDH network. Clock supply means for supplying a clock to the master station, and a clock different from the clock supplied by the first supply means to a specific one of the plurality of slave stations in the SDH transmission system for transmitting Second
A clock supply means and a clock path clockwise or counterclockwise of the SDH network starting from the main station in accordance with the clock supplied by the first clock supply means to form an SDH
First synchronizing means for synchronizing the network, and, when the clock path by the first synchronizing means is not normal, clockwise toward the main station starting from a specific slave station in accordance with the clock supplied by the second clock supply means. And second synchronization means for forming both clock paths counterclockwise to synchronize the SDH network.

Therefore, in the SDH network, even when the master station stops, each station does not fall into a self-running state.
The use of a clock path supplied to a slave station other than the master station results in a state in which the slave station synchronizes with the SDH network, so that stable transmission and reception of information is maintained.

[0020] The SDH transmission apparatus according to the next invention is an SDH transmission apparatus.
An SDH transmission device applied to an H transmission system,
An adding means for adding information of a clock operated by the own station as control information when transmitting information to a next station through a transmission line, and a preceding stage when information is received from a preceding station through a transmission line. Detecting means for detecting the control information added by the adding means of the station, and comparing means for comparing the clockwise or counterclockwise clock of the SDH network by the first synchronizing means based on the control information detected by the detecting means. And if the comparison means obtains a comparison result indicating that an abnormality has occurred in either the clockwise clockwise or counterclockwise clock path in the SDH network, the clock by the second synchronization means is used as the clock operated by the own station. Selecting means for selecting.

Therefore, in the SDH network, even when the main station stops, the own station does not fall into a self-running state.
By selecting a clock path supplied to a slave station other than the master station as a clock operated by the own station, the slave station is synchronized with the SDH network, so that stable transmission and reception of information is maintained.

[0022] In the SDH transmission apparatus according to the next invention, when the addition means does not use the order wire or inserts the voice information when the order wire is used, the control information is placed at the position of the E1 byte of the section overhead (hereinafter referred to as SOH). Is inserted, and the detecting means detects the control information from the position of the E1 byte when the order wire is not used.

Therefore, since the control information is communicated using the E1 byte for the order wire, which should be unused except at the time of installation or construction, the F1 byte of the SOH is used for another purpose such as phase control. It can be used for

[0024] In the SDH transmission apparatus according to the next invention, when the adding means transmits the control information, the control information is set to a certain value which is higher than the audio information by the sound pressure of the PCM code and then becomes higher than the audio information when the order wire is used. SO for inserting
H is inserted into the position of the E1 byte of H, and the detecting means detects the information as control information when information of a certain value or more is extracted from the position of the E1 byte by the sound pressure of the PCM code. When information is extracted, the information is detected as audio information.

Therefore, the PCM code of the sound pressure level frequently used in the order wire is used as the speech information of the order wire, and the PCM code corresponding to the sound pressure level which is not normally output in the order wire is used as the control information. , Voice information and control information are all in E1 in SOH.
By inserting it into a byte, the F1 byte in the SOH can be used for other purposes such as phase control, etc., and control information can be exchanged between stations even during construction or installation. become.

[0026] In the SDH transmission apparatus according to the next invention, the adding means uses the predetermined frame in the fixed SDH frame period to insert control information into the E1 byte of the SOH for inserting voice information when using the order wire. The detecting means detects the control information from the position of the E1 byte at a predetermined frame timing.

Therefore, the control information is transmitted and received by periodically using the E1 byte which is not normally used.
Since the F1 byte in the OH can be used for another purpose such as phase control and the level of the audio is not limited, it is possible to flow information such as machine audio in the E1 byte.

[0028] In the SDH transmission apparatus according to the next invention, when the adding means transmits the control information when using the order wire, the additional information compresses the audio information, mixes the compressed audio information and the control information, and then mixes the order information. Insert at the position of E1 byte of SOH to insert voice information when used,
The detecting means separates the information of the position of the E1 byte into compressed audio information and control information, and expands the compressed audio information after the separation.

Therefore, since the amount of control information per byte increases, control information can be transmitted and received between stations at high speed, thereby enabling other uses of control information for clock path control. Communication of a large amount of control information is possible.

[0030] In the SDH transmission apparatus according to the next invention, the adding means inserts control information into an arbitrary F2 byte position in a virtual container path (hereinafter, referred to as a VC path), and the detecting means sets the F2 byte. The control information is detected from an arbitrary position.

Therefore, even in the case where control information (information unique to the inter-device) cannot be transmitted by the SOH in the ring-type SDH network including the SDH transmission device that terminates the VC path simultaneously with the section, Since the control information can be transmitted on the POH, even if the master station stops, it does not fall into a free-running state and becomes a synchronous state dependent on the SDH network. Will be retained.

[0032] The SDH transmission apparatus according to the next invention is characterized in that, when information is transmitted to the next station through the transmission path, an additional means for adding information of a clock operated by the own station as control information, At the time of adding control information, control means for arbitrarily allocating at least information for instructing bridge-through in the control information, and when receiving information from a preceding station through a transmission line, adding the information by means of the preceding station from the information. Detecting means for detecting whether or not the information for instructing bridge through has been allocated, and detecting the control information when the determination result indicates that the information is not allocated by the detecting means. Comparison means for comparing clockwise or counterclockwise clocks of the SDH network by the first synchronization means based on the control information
The control information received is transmitted directly to the next station only when the determination result that the detection means has been assigned is obtained, and when the determination result indicates that the assignment has not been obtained by the detection means. If the comparison unit obtains a comparison result indicating that an abnormality has occurred in either the clockwise clockwise or counterclockwise clock path in the SDH network, the clock by the second synchronization unit is selected as the clock operated by the own station. And selecting means.

Therefore, even if each station changes the clock path for maintenance or the like, the clocks are synchronized among the stations, and none of the stations is deviated from the synchronization of the entire SDH network. Since the state is maintained,
It is possible to exchange information stably in the SDH network.

[0034] In the SDH transmission apparatus according to the next invention, when the adding means transmits the control information when using the order wire, the additional information compresses the voice information, mixes the compressed voice information and the control information, and then mixes the order information. Insert at the position of E1 byte of SOH to insert voice information when used,
The detecting means separates the information of the position of the E1 byte into compressed audio information and control information, and after the separation, expands the compressed audio information.

Therefore, it is possible to realize a conference on an order wire by using audio information transmitted simultaneously with a control signal using the E1 byte.

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of an SDH transmission system and an SDH transmission apparatus according to the present invention will be described below in detail with reference to the accompanying drawings.

(Embodiment 1) FIG. 1 is a block diagram showing an SDH transmission apparatus according to Embodiment 1 of the present invention.
In FIG. 1, reference numerals 1a, 1b, 1c, and 1d denote transmission paths for transmitting information constituted by frames of the SDH transmission scheme and superimposed clock timing. The transmission lines 1a, 1b are used for clockwise transmission lines, and the transmission lines 1c, 1c,
1d is used for a counterclockwise transmission line.

The SDH transmission apparatus shown in FIG. 1 includes, for example, clock state monitoring means 3, transmission path state monitoring means 4,
Control information detecting means 5A connected to the transmission path 1a, control information detecting means 5B connected to the transmission path 1c, clock state comparing means 6, clock selecting means 7, operation clock information adding means 8A connected to the transmission path 1b , And transmission line 1d
Is provided with operation clock information adding means 8B connected to the control clock information.

The clock state monitoring means 3 monitors the clock state of the DCS. The transmission path state monitoring means 4 is a transmission path 1a
Monitor the state of ~ 1d. The control information detecting means 5A detects the operation clock information from the information assigned in the SDH frame format received from the transmission path 1a, and the control information detecting means 5B detects the SDH received from the transmission path 1c.
Operation clock information is detected from information assigned during the frame format.

The clock state comparing means 6 is connected to the clock state monitoring means 3, the transmission path state monitoring means 4, and the control information detecting means 5A and 5B, monitors the state of each means, and determines the clock operated by the own station. judge. The clock selecting means 7 is connected to the clock state comparing means 6 and switches the clock operated by the own station.

The operating clock information adding means 8A is connected to the clock state comparing means 6, and assigns a clock operated by its own station as operating clock information in the SDH frame format and sends it out to the transmission line 1b. The operating clock information adding means 8B is connected to the clock state comparing means 6, and assigns a clock operated by the own station as operating clock information in the SDH frame format, and
d.

Next, an SDH network in which the SDH transmission apparatuses shown in FIG. 1 are connected in a ring will be described. FIG. 2 is a diagram showing an SDH network according to the first embodiment.

The SDH network shown in FIG. 2 has, for example, a configuration in which a main station 9, upper stations 10, 11 and a lower station 12 are connected in a ring. Clock supply means 2A is connected to the main station 9, and clock supply means 2B is connected to the lower station 12. Each of the stations 9 to 12 shown in FIG.
The configuration of the SDH transmission device shown in FIG.

Transmission paths between the main station 9 and the upper station 11, between the upper station 11 and the lower station 12, and between the lower station 12 and the upper station 10 are shown in FIG. L1, L2, L3, and L4 are connected. The clock path 14 is a clock path transmitted clockwise by the master station 9.

Also, between the main station 9 and the upper station 10, the upper station 10
2 between the lower station 12 and the lower station 12, and between the lower station 12 and the upper station 11.
In order to transmit the clock path 15 counterclockwise at
The transmission lines L5, L6, L7, L8 are connected respectively.
The clock path 15 is a clock path transmitted counterclockwise by the main station 9. Further, the clock path 16 is supplied to the lower station 12 by the clock supply means 2B when a failure occurs in the main station 9, and the lower station 12 turns clockwise.
Alternatively, it is transmitted counterclockwise.

The clock supply means 2A is a means for supplying a clock path to the main station 9, and the clock supply means 2B is unable to transmit the clock path 14 or the clock path 15 due to the failure of the main station 9. This is a means for supplying the clock path 16 to the lower station 12 in the case.

The master station 9 first receives the clock path by the clock supply means 2A and sends out the clock path 14 or the clock path 15 in the ring-shaped node constituted by the present apparatus.

The upper station 10 is connected to the main station 9 and the lower station 12, and sends the clock path 15 received from the main station 9 via the transmission path L5 to the lower station 12 via the transmission path L6, or transmits the clock path 15 to the lower station 12 via the transmission path L6. The clock path 14 received from the lower station 12 via the path L3 is transmitted to the master station 9 via the transmission path L4. When a failure occurs in the main station 9, the upper station 10 transmits the clock path 16 from the lower station 12 via the transmission line L3.
To receive.

The upper station 11 is connected to the main station 9 and the lower station 12, and sends the clock path 14 received from the main station 9 via the transmission path L1 to the lower station 12 via the transmission path L2, or transmits the clock path 14 to the lower station 12 via the transmission path L2. The clock path 15 received from the lower station 12 via the path L7 is transmitted to the master station 9 via the transmission path L8. When a failure occurs in the main station 9, the upper station 11 sends a clock path 16 from the lower station 12 via the transmission line L7.
To receive.

Next, the SDH frame will be described. FIG. 3 is a diagram showing an example of the SDH frame format according to the first embodiment.

FIG. 3 shows the format of the SDH frame of the section management information (higher order group signal).
This SDH frame is composed of an SOH part and a payload part.

In the SDH frame, the SOH portion occupies 9 bytes, the payload portion occupies 261 bytes, and this 270-byte signal has 9 rows (bytes).

The SOH section is a section used for monitoring information signals carried, such as transmission error monitoring, and for carrying information for operating a network. This SOH part is E
It has one byte, F1 byte, Z1 byte and so on.

The payload section has a configuration in which a POH section is added to an information section for carrying information, and is a section for carrying customer information. The POH unit is an overhead for operating and managing the transmission path of the path, and has an F2 byte, a Z3 byte, and the like.

The payload section includes AU (Admi).
The AU pointer specifies a container address in the payload.

Next, the control information will be described. FIG.
FIG. 3 is a diagram showing a configuration of an F1 byte according to the first embodiment.

The F1 byte 18 shown in FIG. 4 is control information assigned to a user channel in the SOH. Operation clock information for notifying that a transmission path failure or the like has occurred can be added to the F1 byte 18. In this case, the F1 byte 18 is used for controlling the transmission path abnormality. Used as information.

Next, the operation will be described. In the SDH network shown in FIG. 2, the master station 9 normally outputs signals synchronized with the clock supplied by the clock supply means 2A to the transmission lines L1 and L5.

At present, the main station 9, the upper station 10, the lower station 12,
The upper station 11 extracts a clock from the information supplied from the transmission lines L1, L2, and L3, and uses the clock as a reference clock. Therefore, the upper station 11 uses the clock path 14 in the SDH network shown in FIG. Are formed.

First, a case where a failure has occurred in the transmission line L1 will be described. In this case, the transmission path condition monitoring unit 4 of the upper station 11 detects a transmission path failure of the transmission path L1. For this reason, in the upper station 11, operation clock information for notifying that a failure has occurred in the clock path 14 is added to the SOH as control information by the operation clock information addition means 8A (clock path 14 is clockwise). In this state, it is notified to the lower station 12 via the transmission line L2.

For this control information, the F1 byte 18 located at the position shown in FIG. 3 in the SOH is used. At this time, in the high-order station 11, information on the transmission line L7 and the failure of the clock path 15 is detected by the transmission line state monitoring means 4 and the control information detection means 5B (the clock path 15 is counterclockwise) for the transmission path L7. If not, the transmission path for extracting the clock is switched from the transmission path L1 to the transmission path L7 by the clock selecting means 7 (upper station 11) after a lapse of a predetermined time.

Then, in the lower station 12, the control information detecting means 5A and 5B detect the control information of the transmission line L2 and the control information of the transmission line L6, respectively.
The clock states are compared based on the detection result.

As a result of the comparison by the clock state comparing means 6, when it is confirmed that the clock path 15 is normal despite the occurrence of a fault in the clock path 14, the clock selecting means 7 (lower station) According to 12), the transmission path for extracting the clock is switched from the transmission path L2 to the transmission path L6. Similarly, in the upper station 10, the transmission line for extracting the clock is switched from the transmission line L3 to the transmission line L5 by the clock selection means 7. As a result, in the ring type SDH network shown in FIG. 2, the clock path is entirely switched from the clock path 14 to the clock path 15.

In the above example, the clock path 14
The path switching for the transmission path failure during use has been described. Conversely, when the transmission path failure occurs when the clock path 15 is used, the clock path is switched from the clock path 15 to the clock path 14 in the above-described procedure. That is, the transmission paths used by the upper station 11, the lower station 12, the upper station 10, and the main station 9 are L1, L1 transmitting the clock path 14, respectively.
The transmission paths are switched from L2, L3 and L4 to transmission paths L7, L6, L5 and L8 for transmitting the clock path 15.

Next, a case where a failure occurs in the transmission lines L1 and L5 due to a stop of the power supply of the main station 9 or the like will be described.

In this case, in the upper station 11, when the transmission path condition monitoring means 4 detects the transmission path abnormality from the transmission path L1, the operation clock information adding means 8A indicates that the transmission path abnormality of the clock path 14 has occurred. Is added to the SOH. This operation clock information is transmitted to the transmission line L2 by the operation clock information adding means 8A.

On the other hand, in the upper-level station 10, when the transmission path condition monitoring means 4 detects the transmission path abnormality from the transmission path L5, the operation clock information adding means 8A informs that the transmission path abnormality of the clock path 15 has occurred. The operation clock information shown is added to the SOH. This operation clock information is transmitted to the transmission line L6 by the operation clock information adding means 8A. Then, in the lower station 12, the control information detecting means 5
A and 5B respectively cause the clock path 1 from the transmission line L2.
4 and an abnormality of the clock path 15 from the transmission line L6. In this case, a clock path other than the clock path of the SDH network of this ring type is applied.

That is, when an abnormality occurs in any of the clock paths 14 and 15, the master station 9 receives the supply of the clock path from the clock supply means 2A and cannot send out the clock path 14 or the clock path 15. Therefore, the SDH network starts an operation of receiving a clock path from the clock supply unit 2B.

In this case, the lower station 12 adds operation clock information indicating that the clock is supplied by the clock supply means 2B to the SOH, and transmits the information to the transmission line L7 (counterclockwise) and the transmission line L3 (right A process of sending the signal in the (circumferential direction) is performed.

Further, in the lower station 12, the transmission paths L2 and L
6 is stopped, and the transmission path is switched from the transmission path L2 to the transmission paths L7 and L3 by the clock selection means 7 so as to synchronize with the clock supplied from the clock supply means 2B.

At this time, in the upper station 11, the lower station 12 uses the normal clock path 16 (see FIG. 2) over the transmission path L7, even though the transmission path L1 has a transmission path abnormality. This is detected by the control information detecting means 5B. For this reason, in the upper station 11, the clock selection means 7 switches the synchronous clock to the clock path 16 extracted from the transmission line L7 instead of the clock path 14 of the transmission line L1.

On the other hand, in the upper station 10, the lower station 12 uses the normal clock path 16 (see FIG. 2) over the transmission path L3 even though the transmission path L5 has a transmission path abnormality. Is detected by the control information detecting means 5A. For this reason, in the upper station 10, the clock path 1 extracted from the clockwise transmission line L 3 similar to the clock path 14 as the synchronous clock by the clock selecting means 7
6 is used.

As described above, according to the first embodiment, the SD
In the H network, even when the main station 9 is stopped, each station does not fall into a self-running state, and is synchronized with the SDH network by using the clock path 16, so that stable information can be obtained. Is maintained.

In the first embodiment, the F1 byte 18 is used for control information. However, an undefined Z byte may be used.

(Embodiment 2) In Embodiment 1 described above, control information is exchanged by using the F1 byte 18. However, as in Embodiment 2 described below, a normal Alternatively, control information may be communicated using an E1 byte for an order worker used as a voice line for maintenance. The E1 byte is a byte that is not used except during installation or construction and is used as a voice line for maintenance.

The second embodiment is different from the first embodiment.
The configuration of the ring-shaped SDH network is adopted in the same manner as described above, and the respective stations serving as nodes will be described using the same numbers as in FIG. The internal configuration of each station (SDH transmission device) is based on FIG.

FIG. 5 is a diagram showing an SD according to the second embodiment of the present invention.
FIG. 3 is a block diagram illustrating a main part of the H transmission device. The main part of the SDH transmission apparatus shown in FIG. 5 has a configuration corresponding to the operation clock information adding means 8A and 8B and the control information detection means 5A and 5B of the SDH transmission apparatus shown in FIG.

That is, the operation clock information adding means corresponds to the order wire interface 19A, the clock information generating circuit 21, the output side audio / clock information switching circuit 22, and the E1 byte inserting circuit 23, and the control information detecting means. , Order wire interface 19B, E1 byte extraction circuit 24, input side audio / clock information switching circuit 25, and clock information analysis circuit 26
Is applicable. A changeover switch 20 is provided in the main part.
Is provided.

Order wire interface 19
A and 19B control input / output of bytes for order wires, that is, audio information. The changeover switch 20 switches input / output to the audio information side or the clock information side by distinguishing between the time via voice and the time via clock information. Clock information generation circuit 21 generates clock information.

Output side audio / clock information switching circuit 22
Are the E1 byte insertion circuit 24 and the clock information generation circuit 2
1, connected to the changeover switch 20 and the order wire interface 19A, the information for inserting into the E1 byte according to the changeover signal of the changeover switch 20 is selected from the audio information of the order wire interface 19A and the clock information of the clock information generation circuit 21. Switch to one.

The E1 byte insertion circuit 23 has its input connected to the output side audio / clock information switching circuit 22,
The input audio information or clock information is inserted into the position of the E1 byte of H, and the SDH frame is output to the transmission path.

The E1 byte extraction circuit 24 is connected to the transmission path, inputs the SDH frame, and extracts from the SOH the E1 byte of the order wire channel normally used for transmitting voice information.

Input side audio / clock information switching circuit 25
Are the E1 byte extraction circuit 24 and the clock information analysis circuit 2
6. Connected to the changeover switch 20 and the order wire interface 19B, the supply destination of the E1 byte extracted by the E1 byte extraction circuit 24 according to the changeover signal of the changeover switch 20 is selected from the order wire interface 19B and the clock information analysis circuit 26. Switch to one.

The clock information analysis circuit 26 has its input connected to the input side audio / clock information switching circuit 25, analyzes the supplied clock information, and supplies the analysis result to the clock state comparison means 6.

Next, the operation will be described. In the circuit configuration shown in FIG. 5, the change-over switch 20 is used to select the audio side at the time of installation or construction so that the input-side audio / clock information switching circuit 25 and the output-side audio / clock information switching circuit 22 perform audio. The instruction to switch to the side is output.

That is, in this case, the input-side audio / clock information switching circuit 25 and the output-side audio / clock information switching circuit 22 are designed so that only the audio information is input / output to / from the EOH byte of the SOH. Therefore, E
One byte is used for communication of voice information between stations using an order wire used as a voice line for maintenance, similarly to a normal SDH transmission device.

When the installation is completed, the changeover switch 20 sends an instruction to switch to the clock information side to the input-side audio / clock information switching circuit 25 and the output-side audio / clock information switching circuit 22.

In this case, the input-side audio / clock information switching circuit 25 and the output-side audio / clock information switching circuit 22 are designed so that only the clock information is input / output to / from the E1 byte of the SOH.

For this reason, when a change in the clock path is detected by the clock information comparing means 6 in a certain station, the contents of the change in the clock path are output to the clock information generating circuit 21.

Accordingly, the clock information generating circuit 21
Supplies control information for changing the clock path, that is, clock information, to the output side audio / clock information switching circuit 22. This clock information is output to the E1 byte insertion circuit 23 via the output side audio / clock information switching circuit 22, where it is inserted into the E1 byte in the SOH.
It is sent to the transmission path.

The SDH frame transmitted in this manner is transmitted to the next station E1 byte extraction circuit 24 via the transmission path.
Is input to In the E1 byte extraction circuit 24, the E1 byte is extracted from the SOH of the input SDH frame and output to the input-side audio / clock information switching circuit 25 at the subsequent stage.

In the input side audio / clock information switching circuit 25, since the input information has already been switched to the clock information side after the installation is completed, the E1 byte, that is, the control information, is output to the clock information analysis circuit 26. After the analysis by the clock information analysis circuit 26, the analysis result is output to the clock state comparison means 6, and the detected clock information is used as a part of the switching condition of the clock selection means 7 in the next station.

As described above, according to the second embodiment, the control information is exchanged using the E1 byte for the order wire which should be unused except at the time of installation or construction. Can be used for another purpose such as phase control.

Also, in the second embodiment, as in the first embodiment, even when the main station 9 stops, the mobile station does not fall into a self-running state, and is synchronized with the SDH network. Therefore, stable transmission and reception of information is maintained.

Further, the setting of the changeover switch 20 may be performed manually, or may be performed by controlling the data communication channels D1 to D12 in the SOH.
Or you may make it perform by control of a similar maintenance terminal.

A similar configuration can be applied to a ring type SDH network configured without using an intermediate repeater.
In this case, the E2 byte may be used.

(Embodiment 3) In the above-described embodiment 2, an operation that distinguishes between the time of passing through audio and the time of passing clock information is applied. However, as in the third embodiment described below, As a signal, an operation of using a signal of a certain level or higher that is not usually used as a control signal may be applied.

The third embodiment focuses on the fact that a sound such as an order wire usually hardly uses a code having a sound pressure of a PCM code which is equal to or higher than a predetermined value.

The third embodiment is different from the second embodiment described above.
The configuration of the ring-shaped SDH network is adopted in the same manner as described above, and the respective stations serving as nodes will be described using the same numbers as in FIG. The internal configuration (SDH transmission device) of each station is based on FIGS. 6 and 7.

FIG. 6 is a diagram showing an SD according to the second embodiment of the present invention.
FIG. 3 is a block diagram illustrating a main part of an H transmission device. The main part of the SDH transmission apparatus shown in FIG. 6 has a configuration corresponding to the operation clock information adding means shown in FIG. In FIG.
The input of the clock information / audio information mixing circuit 27 is connected to the order wire interface 19A and the clock information generation circuit 21, and the output thereof is connected to the E1 byte insertion circuit 23.

When the clock information is output from the clock information generating circuit 21, the clock information / audio mixing circuit 27 cuts off the audio information from the order wire interface 19A, converts the clock information to the sound pressure of the PCM code, and sets a constant value. The above codes are assigned and output to the E1 byte insertion circuit 23.

FIG. 7 is a diagram showing an SD according to the second embodiment of the present invention.
FIG. 13 is a block diagram illustrating another main part of the H transmission device. The main part of the SDH transmission apparatus shown in FIG. 7 has a configuration corresponding to the control information detecting means shown in FIG. In FIG. 7, PCM
The level comparison circuit 28 has its input connected to the E1 byte extraction circuit 24 and its output connected to the order wire interface 19B and the clock information analysis circuit 26.

The PCM level comparison circuit 28 converts the information of the E1 byte extracted by the E1 byte extraction circuit 24 into a PCM level.
The sound pressure level of the code is determined, and the E1 byte information is output to the order wire interface 19B or the clock information analysis circuit 26.

Next, the PCM level comparison circuit 28 will be described. FIG. 8 is a diagram for explaining a comparison method of the PCM level comparison circuit 28 according to the third embodiment.

FIG. 8 shows types of information corresponding to sound pressure levels of PCM codes. Specifically, if the sound pressure level of the PCM code used in the order wire based on the input E1 byte information is equal to or lower than a certain value, it is determined that the type is audio information. In this case,
The E1 byte information is output to the order wire interface 19B as audio information.

On the other hand, if the sound pressure level of the PCM code is equal to or more than a certain value, it is determined that the type is control information. In this case, the information of the E1 byte is output to the clock information analysis circuit 26 as control information.

Next, the operation will be described. In the circuit configurations shown in FIGS. 6 and 7, when an order wire is used at the time of installation or construction, audio information is input to the clock information / audio information mixing circuit 27 via the order wire interface 19A.

In this case, since the audio information is used at a sound pressure of the PCM code below a certain value, the audio information is converted into an audio code by the clock information / audio information mixing circuit 27 and sent to the E1 byte insertion circuit 23. Is output. This voice code is inserted into the SOH by the E1 byte insertion circuit 23 as E1 byte information.

The SDH frame having the SOH is input to the E1 byte extracting circuit 24 of the next station via the transmission line. In the E1 byte extraction circuit 24, the input S
The E1 byte is extracted from the SOH of the DH frame and output to the PCM comparison circuit 28 at the subsequent stage. PCM comparison circuit 2
In No. 8, since the input E1 byte information, that is, the voice information is a PCM code having a sound pressure level equal to or lower than a certain value, the voice information is output to the subsequent order wire interface 19B.

As described above, normal order wire audio information is transmitted as usual via the transmission path. However, when a certain station detects a change in the clock path by the clock state comparison circuit 6, the contents of the change in the clock path are output to the clock information generation circuit 21.

Accordingly, the clock information generating circuit 21
Supplies control information for changing the clock path, that is, clock information, to the clock information / audio information mixing circuit 27. In the clock information / audio information mixing circuit 27, the clock information, that is, the control information is assigned a code of a certain value or more as the sound pressure of the PCM code, and is inserted into the E1 byte in the SOH by the subsequent E1 byte insertion circuit 23. Are transmitted to the transmission path.

The SDH frame transmitted in this manner is transmitted via the transmission path to the E1 byte extraction circuit 24 of the next station.
Is input to In the E1 byte extraction circuit 24, the E1 byte is extracted from the SOH of the input SDH frame and output to the PCM level comparison circuit 28 at the subsequent stage.

The PCM level comparison circuit 28 determines whether or not the input E1 byte information has a level equal to or higher than a certain value in the sound pressure of the PCM code. The above sound pressure level is determined. As a result, the E1 byte information is output to the clock information analysis circuit 26 as control information.

After the analysis by the clock information analysis circuit 26,
The analysis result is output to the clock state comparing means 6, and the detected clock information is used as a part of the switching condition of the clock selecting means 7 in the next station.

As described above, according to the third embodiment, the PCM code of the sound pressure level frequently used in the order wire is used as the voice information of the order wire.
P equivalent to sound pressure level not output by order wire
By using the CM code as the control information and inserting both the voice information and the control information into the E1 byte in the SOH, the F1 byte in the SOH can be used for another purpose such as phase control. is there.

Also, in the third embodiment, as in the first embodiment, even when the master station 9 stops, the mobile station does not fall into a self-running state, and is synchronized with the SDH network. Therefore, stable transmission and reception of information is maintained. Also,
It is possible to exchange control information between stations even during construction or installation.

The third embodiment can also be applied to inter-station signals other than clock information (control information).

(Embodiment 4) In Embodiment 3 described above, control information corresponding to a sound pressure level of a PCM code equal to or more than a certain value is transmitted. As shown in FIG. 4, a part of the E1 byte may be used for transmitting control information by forming a multi-frame.

Embodiment 4 is different from Embodiment 2 described above.
The configuration of the ring-shaped SDH network is adopted in the same manner as described above, and the respective stations serving as nodes will be described using the same numbers as in FIG. Note that the internal configuration (SDH transmission device) of each station is based on FIG. 9 and FIG.

FIG. 9 is a diagram showing an SD according to the fourth embodiment of the present invention.
FIG. 3 is a block diagram illustrating a main part of an H transmission device. The main part of the SDH transmission apparatus shown in FIG. 9 has a configuration corresponding to the operation clock information adding means shown in FIG.

In FIG. 9, synchronous pattern insertion circuit 30
Is input to the order wire interface 19
A, a clock information generating circuit 21 and a synchronous counter 29 for outputting a timing every fixed frame are connected.
An E1 byte insertion circuit 23 is connected to the output.

The synchronization pattern insertion circuit 30 outputs the clock information supplied from the clock information generation circuit 21 to the E1 byte insertion circuit 23 only when the synchronization counter 29 outputs the timing. Order wire interface 19A
Is output to the E1 byte insertion circuit 23.

FIG. 10 is a block diagram of an embodiment 4 of the present invention.
FIG. 13 is a block diagram illustrating another main part of the DH transmission device. FIG.
0 has a configuration corresponding to the control information detecting means shown in FIG.

In FIG. 10, an input side audio / clock information switching circuit 25 has an E1 byte extraction circuit 24 at its input.
Further, a synchronous pattern detection circuit 31 that replaces the changeover switch 20 is connected, and the output thereof is connected to the order wire interface 19B and the clock information analysis circuit 26.

The synchronization pattern detection circuit 31 detects a fixed synchronization pattern from the E1 byte information extracted by the E1 byte extraction circuit 24 and synchronizes with the detection timing to output a timing output synchronized with the synchronization pattern to the input side. This is performed for the audio / clock information switching circuit 25.

The timing output to the input-side audio / clock information switching circuit 25 plays a role in the timing of switching the input-side audio / clock information switching circuit 25 from the audio information side to the clock information side.

Next, a data structure according to the fourth embodiment will be described. FIG. 11 is a diagram showing a configuration example of a synchronization pattern according to the fourth embodiment.

The synchronization pattern is, as shown in FIG.
This is 1-byte data based on a synchronization signal (for example, 3 bits) and control information (for example, 5 bits). Note that 000 (B) is used as the synchronization signal as an example.

Next, the operation will be described. FIG. 12 is a diagram illustrating the insertion position of the synchronization pattern according to the fourth embodiment.

In the circuit configurations shown in FIGS. 9 and 10,
The synchronization counter 29 is provided with a synchronization pattern insertion circuit 30 at a constant timing in synchronization with the SDH frame of the SDH network.
Timing output.

Therefore, the synchronization pattern insertion circuit 30
Normally, as shown in FIG. 12, the sound of the order wire is output in most cases, but the synchronization pattern is inserted into the E1 byte insertion circuit 2 every fixed frame (for example, every 6 frames).
Output to 3. This synchronization pattern is inserted into the E1 byte of the SOH by the E1 byte insertion circuit 23 and input to the E1 byte extraction circuit 24 of the next station via the transmission line.

In the E1 byte extraction circuit 24, when the E1 byte information is extracted, the information is output to the input side audio / clock information switching circuit 25 and the synchronization pattern detection circuit 31.

The synchronization pattern detection circuit 31 checks the synchronization pattern of the E1 byte information input from the E1 byte extraction circuit 24 for each frame. For this reason, the synchronization pattern detection circuit 31
When the synchronization pattern inserted by the 1-byte insertion circuit 23 is detected, a switching signal is output to the input-side audio / clock information switching circuit 25 at that timing.

In the input side audio / clock information switching circuit 25, the output is switched to the clock information analysis circuit 26 only at the timing when the switching signal is input from the synchronization pattern detection circuit 31, and otherwise, the order wire interface 19B side The output is switched to. That is, control information is periodically analyzed in accordance with a fixed interval of a synchronization pattern in successive SDH frames.

The clock information analysis circuit 26 analyzes the control information input from the input side audio / clock information switching circuit 25 at the above timing, and outputs the result to the clock state comparison circuit 6.

The audio information input to the order wire interface 19B is temporarily interrupted when the input audio / clock information switching circuit 25 switches to the clock information analysis circuit 26 at the above timing.
SDH transmission can be realized without any hindrance.

As described above, according to the fourth embodiment, the control information is exchanged by periodically using the E1 byte which is not normally used. Therefore, the F1 byte in the SOH is used for another purpose such as phase control. It is possible to use in.

Also, in the fourth embodiment, as in the first embodiment, even when the main station 9 stops, the mobile station does not fall into a self-running state, but enters a synchronous state depending on the SDH network. Therefore, stable transmission and reception of information is maintained.

Further, since there is no restriction on the audio level, it is possible to flow information such as mechanical audio in the E1 byte unlike the above-described third embodiment.

Here, a modified example of the method of inserting a synchronization pattern will be described. FIG. 13 is a diagram illustrating the insertion position of the synchronization pattern according to a modification of the fourth embodiment.

In the fourth embodiment, the control information is included in the synchronization pattern. However, as shown in FIG. 13, the control information is transmitted independently of the synchronization pattern (only the synchronization signal). Alternatively, in this case, it may be used to transmit and receive a user-specific signal other than the clock information (control signal).

(Embodiment 5) In the above-described Embodiments 1 to 4, the information inserted into the SOH is transmitted as it is. However, as in Embodiment 5 described below, The signal may be compressed and the remaining part may be used for transmitting the control signal.

The fifth embodiment is different from the second embodiment.
The configuration of the ring-shaped SDH network is adopted in the same manner as described above, and the respective stations serving as nodes will be described using the same numbers as in FIG. The internal configuration (SDH transmission device) of each station is based on FIGS. 14 and 16.

FIG. 14 is a block diagram of an embodiment 5 of the present invention.
FIG. 2 is a block diagram illustrating a main part of the DH transmission device. FIG.
The main part of the SDH transmission apparatus shown in FIG. 5 has a configuration corresponding to the operation clock information adding means shown in FIG.

In FIG. 14, the audio compression circuit 32 is connected between the order wire interface 19A and the audio / clock information mixing circuit 33, and is supplied from the order wire interface 19A so as to be 64 Kbps when mixed with control information at a subsequent stage. Input audio information as A
The audio bit rate is reduced by a compression method such as DPCM or APC, and the compressed audio information is output to the audio / clock information mixing circuit 33.

The input of the audio / clock information mixing circuit 33 is connected to the audio compression circuit 32 and the clock information generation circuit 21, and the output thereof is connected to the E1 byte insertion circuit 23. This audio / clock information mixing circuit 33
Receives the audio information compressed from the audio compression circuit 32, mixes the clock information supplied from the clock information generation circuit 21 with the input, and outputs mixed information having a bit rate of 64 Kbps to the E1 byte insertion circuit 23 I do.

Now, the E1 byte according to the fifth embodiment will be described. FIG. 15 shows the data structure of the E1 byte according to the fifth embodiment.

As shown in FIG. 15, the E1 byte is composed of compressed audio information and control information (clock information). In this example, the compressed audio information has 2 bits and the control information has 6 bits, and a wide area for the control information in the E1 byte is secured.

FIG. 16 is a block diagram of an embodiment 5 of the present invention.
FIG. 13 is a block diagram illustrating another main part of the DH transmission device. FIG.
The main part of the SDH transmission device shown in FIG. 6 has a configuration corresponding to the control information detecting means shown in FIG.

In FIG. 16, clock information extraction circuit 3
4 has its input connected to the E1 byte extraction circuit 24,
The output is connected to the audio expansion circuit 35 and the clock information analysis circuit 26. The output of the audio decompression circuit 35 is connected to the order wire interface 19B.

The clock information extraction circuit 34 separates the E1 byte information extracted by the E1 byte extraction circuit 24, that is, the mixed information (see FIG. 15) into compressed audio information and control information, and Is output to the audio decompression circuit 35, and the other control information is output to the clock information analysis circuit 26.

The audio decompression circuit 35 converts the compressed audio information input from the clock information extraction circuit 34 into the above-mentioned AD data.
According to a compression method such as PCM or APC, the audio signal is expanded to a 64 Kbps audio signal connectable to a normal order wire.

Next, the operation will be described. In the circuit configuration shown in FIG. 14, the audio information input by the order wire interface 19A is output to the audio / clock information mixing circuit 33 after the audio compression circuit 32 reduces the audio bit rate to a certain level or less. You.

At the same time, the clock information generated by the clock information generating circuit 21 is output to the audio / clock information mixing circuit 33, and the audio / clock information mixing circuit 33 mixes the compressed audio information with the clock information. , FIG.
5 is obtained. This mixed information is
When output to the 1-byte insertion circuit 23, E1 in SOH
The data is transmitted to the transmission line with the data inserted in the byte.

The SDH frame containing the mixed information is input to the E1 byte extraction circuit 24 of the next station via the transmission line. The E1 byte extraction circuit 24 extracts the E1 byte from the SOH of the SDH frame, and
One-byte information, that is, mixed information, is output to the clock information extraction circuit 34 at the subsequent stage.

The clock information extracting circuit 34 separates the input mixed information into compressed audio information and control information, and outputs one of the compressed audio information to the audio decompression circuit 35 and the other control information. Is the clock information analysis circuit 26
Is output to The compressed audio information is sent to an audio decompression circuit 35.
After being expanded to the size of the original audio information, the connection is made to the order wire by the order wire interface 19B. The control information (clock information) is analyzed by the clock information analysis circuit 26, and the analysis result is input as a condition of the clock state comparison means 6.

As described above, according to the fifth embodiment, since the amount of control information per byte is increased as compared with the above-described second to fourth embodiments, control information can be exchanged between stations at high speed. Accordingly, a large amount of control information can be exchanged for other uses of the control information for clock path control described in the first embodiment.

Further, since control information is exchanged using the E1 byte which is not normally used, the F1 in the SOH is transmitted and received.
One byte can be used for another purpose such as phase control.

Also, in the fifth embodiment, as in the first embodiment, even when the master station 9 stops, the mobile station does not fall into a self-running state and enters a synchronous state depending on the SDH network. Therefore, stable transmission and reception of information is maintained.

(Embodiment 6) In Embodiments 2 to 5 described above, the control signal is transmitted using the E1 byte of the SOH, but Embodiment 6 described below will be described.
When a higher-order virtual container (hereinafter referred to as a VC) is terminated in a section other than the section, a VC unique to the device is determined, and a control signal is transmitted using the F2 byte of the VC. You may do so. Note that VC
Means that a POH is added to a container.

The sixth embodiment is different from the second embodiment described above.
The configuration of the ring-shaped SDH network is adopted in the same manner as described above, and the respective stations serving as nodes will be described using the same numbers as in FIG. The internal configuration (SDH transmission device) of each station is based on FIG.

FIG. 17 is a block diagram of an embodiment 6 of the present invention.
FIG. 2 is a block diagram illustrating a main part of the DH transmission device. The main part of the SDH transmission apparatus shown in FIG. 17 has a configuration corresponding to the operation clock information adding means and the control information detecting means shown in FIG.

In the circuit configuration shown in FIG. 17, the clock information generation circuit 21 and the F2 byte insertion circuit 37 correspond to the operation clock adding means, and the F2 byte extraction circuit 38 and the clock information analysis circuit 26 perform control information detection. This is a configuration corresponding to the means.

The circuit configuration shown in FIG. 17 includes a VC position indicating switch 36. The VC position indicating switch 36 is connected to the F2 byte insertion circuit 37 and the F2 byte extraction circuit 24, and sends an SDH frame (STM-n (Synchrono) to these circuits 37 and 24.
us Transport Module-n)) indicates an arbitrary F2 byte among a plurality of VCs in the “Transport Module-n)).

The F2 byte insertion circuit 37 sends out the clock information supplied from the clock information generation circuit 21 to the transmission line at the timing of the F2 byte set by the VC position indicating switch 36. The F2 byte extracting circuit 38 outputs the F2 at the timing of F2 set by the VC position indicating switch 36.
Extracts 2 bytes of control information and generates clock information analysis circuit 2
6 is output.

Next, the operation will be described. In the circuit configuration shown in FIG. 17, when a certain station detects a change in the clock path by the clock state comparing means 6, the contents of the change in the clock path are output to the clock information generation circuit 21.

Then, the clock information generation circuit 21 outputs F
Control information (clock information) is output to the 2-byte insertion circuit 37. At this time, the F2 byte insertion circuit 37
In this case, the timing of the F2 byte is instructed from the VC position indicating switch 36, and the control information is
It is inserted into the F2 byte of C. Thereafter, the information of the SDH frame including the F2 byte is transmitted from the F2 byte insertion circuit 37.

The information of the SDH frame is input to the F2 byte extraction circuit 38 of the next station via the transmission line.
In the F2 byte extraction circuit 38, when the information of the SDH frame is input, the F2 byte
Since the byte timing is specified, control information of the F2 byte is extracted at that timing.

The F2 byte control information extracted by the F2 byte extraction circuit 38 is output to the clock information analysis circuit 26, and the analysis result is supplied to the clock state comparison means 6. The clock state comparing means 6 determines the clock state based on the analysis result, and the result of the determination is used as a part of the switching condition of the clock selecting means 7 of the next station.

As described above, according to the sixth embodiment, the SD path which terminates the VC path simultaneously with the section is used.
In a ring type SDH network composed of H transmission devices, SO
Even if the control information (information unique to the device) cannot be transmitted in H, the control information can be transmitted on the POH, so that the main station 9 is stopped as in the first embodiment. Even in such a case, since the mobile terminal does not fall into the self-propelled state and enters the synchronous state depending on the SDH network, stable information transmission / reception is maintained.

The setting of the VC position indicating switch 36 may be manually performed.
The control may be performed by the control of the second data communication channel, or may be performed by a similar maintenance terminal.

(Embodiment 7) In Embodiments 1 to 6 described above, the control information of the SDH frame is detected and the clock is switched. However, Embodiment 7 described below will be described. As described above, the control signal may be forcibly generated by the SDH transmission device and transmitted to the next station.

FIG. 18 is a block diagram of an embodiment 7 of the present invention.
FIG. 3 is a block diagram illustrating a DH transmission device. Also in the seventh embodiment, the same SDH network as that in the first embodiment is adopted, and each station constituting the SDH network is provided with the SH shown in FIG.
The configuration of the DH transmission device is applied. In the SDH transmission apparatus shown in FIG. 18, the same units and transmission paths as those of the SDH transmission apparatus according to Embodiment 1 are given the same reference numerals, and description thereof will be omitted.

The SDH transmission apparatus shown in FIG. 18 includes, for example, a clock state monitoring unit 3, a transmission line state monitoring unit 4,
Control information detecting means 39A connected to the transmission path 1a, control information detecting means 39B connected to the transmission path 1c, clock state comparing means 6, clock selecting means 7, operating clock information adding means 39A connected to the transmission path 1b , Transmission line 1d
Is provided with an operation clock information adding means 49B and a control means 41, which are connected to the CPU.

The control information detecting means 39A is connected to the clock state comparing means 6 and the operating clock information adding means 40A, and detects the control information in the SDH frame received from the transmission line 1a. Alternatively, it is output to the operation clock information adding means 40A.

The control information detecting means 39B is connected to the clock state comparing means 6 and the operating clock information adding means 40B, and in response to the detection of control information in the SDH frame received from the transmission path 1c, the control state detecting means 39B. Alternatively, the data is output to the operation clock information adding means 40B.

The operating clock information adding means 40A is connected to the control information detecting means 39A, the clock state comparing means 6, and the control means 41, and forcibly adds control information in accordance with the control of the control means 41 to generate information of the SDH frame. Is output to the transmission line 1b, or control information is directly input from the control information
Or the clock operated by the own station by the clock state comparing means 6 as operating clock information.
Assigned during DH frame format and transmission path 1b
To send to.

The operation clock information adding means 8B is connected to the control information detecting means 39B, the clock state comparing means 6, and the control means 41, and forcibly adds control information in accordance with the control of the control means 41, thereby obtaining information of the SDH frame. Is output to the transmission line 1d, the control information is directly input from the control information detecting means 39B by bridge-through, and output to the transmission line 1d. SD as information
Assigned in the H frame format and transmitted to the transmission path 1d.

The control means 41 controls the operation clock information adding means 40A, 40B to forcibly output control information in accordance with the purpose of maintenance or the like.

Next, control information used in the seventh embodiment will be described. FIG. 19 is a diagram showing a format example of control information according to the seventh embodiment.

As shown in FIG. 19, the control information according to the seventh embodiment has a configuration in which the communication identification code 42 is assigned to, for example, 2 bits out of 8 bits. The communication identification code 42 is allocated as information of 2 bits or more (in the range of 2 to 8 bits) on the control information, and is transmitted to the clock path through the transmission path of the SDH network with the master station to which the clock is supplied first. This is information for distinguishing the slave station that is operating in synchronization with the type of communication between the stations.

The types of communication described above are classified into three types, for example, communication between stations, a request from the slave station to the master station, and a request from the master station to the slave station.

Next, the operation will be described. In the SDH network shown in FIG. 2, when the communication identification code 42 is set between stations, the same operation as in the first embodiment is performed.

Normally, the main station 9 synchronizes the information of the SDH frame with the transmission line L in synchronization with the clock of the clock supply means 2A.
1 and the transmission path L5.

At present, the main station 9, the upper station 10, the lower station 12,
The upper station 11 has transmission paths L1, L2, L3, L4, respectively.
A clock is extracted from the information of the SDH frame supplied from, and the clock is used as a reference clock. With this reference clock, the clock path 14 is applied to the SDH network.
Is formed.

At this time, the lower station 12 operates by extracting a clock from the transmission line L2. If the lower station 12 needs to extract the clock from the transmission line L6 (counterclockwise) for maintenance or the like, the lower station 12 sends the clock to the operating clock information adding means 40A under the control of the control means 41. An operation is performed to forcibly output control information.

That is, the control means 41 sends control information including the communication identification code 42 as a request from the slave stations (including the upper stations 10 and 11 and the lower station 12) to the
Insert into F1 byte in H. Thereby, the transmission path L3
Is transmitted to the upper station 10 via

In the upper station 10, when the information of the SDH frame is input from the transmission line L3 and the control information detecting means 39A detects the control information including the F1 byte communication identification code 42, the communication identification in the control information is performed. The content of reference numeral 42 is determined.

As a result, if the communication identification code 42 indicates a request from the slave station to the master station, the higher station 10 determines that the own station is not the master station.
The control information detected by 9A is not output to the clock state comparing means 6, but is output directly to the operating clock information adding means 40A.

Thus, in the main station 9, the communication identification code 42 is detected from the control information of the F1 byte by the control information detecting means 39A connected to the transmission line L4. Then, in the master station 9, the request from the slave station to the master station is confirmed.
By B, the communication identification code 42 is set to the content indicating the request from the master station to the slave station, and the control information body is set to the content for switching the clock path.

After that, in the main station 9, control information is transmitted to the transmission line L5 by the operation clock information adding means 40B under the control of the control means 41.

Therefore, when the control information including the communication identification code 42 is detected by the control information detecting means 39B, the control information is directly output to the operation clock information adding means 40B in the upper-level station 10 at the next stage. The transmission path to be used is switched from the transmission path L3 to the transmission path L5.

Similarly, when the control information including the communication identification code 42 is detected by the control information detecting means 39B, the control information is also directly sent to the operation clock information adding means 40B in the lower station 12, which is the next stage of the upper station 10. The output transmission line to be used is switched from the transmission line L2 to the transmission line L6.

Similarly, when the control information including the communication identification code 42 is detected by the control information detecting means 39B, the control information is also directly transmitted to the operation clock information adding means 40B at the upper station 11 which is the next stage of the lower station 12. The transmission path to be output and used is switched from the transmission path L1 to the transmission path L7.

As described above, according to the seventh embodiment, even if each station changes the clock path for maintenance or the like, all stations follow the clock path selected by the master station. SDH is not deviated from the whole network synchronization.
Since the state dependent on the network is maintained, stable transmission and reception of information within the SDH network becomes possible.

According to the seventh embodiment, as in the first embodiment, even when the main station 9 is stopped, the mobile station does not fall into the self-running state, but depends on the SDH network for the synchronization state. , Stable information exchange is maintained.

Although the F1 byte is used for the control information in the seventh embodiment, an undefined Z byte may be used, and the E1 byte is used as in the second to fifth embodiments. May be.

(Embodiment 8) As in Embodiment 8 described below, the above-described Embodiments 5 and 7 are combined, a voice signal is transmitted simultaneously with control information, and a conference is realized on an order wire. You may make it.

In the eighth embodiment, a ring-shaped SDH network configuration is adopted as in the above-described fifth and seventh embodiments, and each station serving as a node will be described using the same numbers as in FIG. . The internal configuration of each station (SDH transmission device)
20 according to FIG.

FIG. 20 shows an embodiment 8 of the S
FIG. 2 is a block diagram illustrating a main part of the DH transmission device. The main part of the SDH transmission apparatus shown in FIG. 20 has a configuration corresponding to the operation clock information adding means and the operation clock information adding means shown in FIG.

In FIG. 20, the input of the audio / clock information mixing circuit 43 is connected to the audio compression circuit 32, the clock information generation circuit 21, and the conference mode switch 45.
An E1 byte insertion circuit 23 is connected to the output.

This audio / clock information mixing circuit 43
The voice information compressed by the voice compression circuit 32 is input, and the control information having the communication identification code supplied from the clock information generation circuit 21 is mixed with the voice information in the conference mode (when the conference mode switch 45 is on). Then 64
The mixed information having the Kbps bit rate is output to the E1 byte insertion circuit 23.

The clock information extraction circuit 44 receives the E1 byte extraction circuit 24 and the conference mode switch 45 as inputs.
And its output is connected to the audio decompression circuit 35 and the clock information analysis circuit 26.

The clock information extraction circuit 44 inputs and separates the E1 byte mixture information extracted from the E1 byte extraction circuit 24, outputs one audio information to the audio expansion circuit 35, and outputs the other control information. Is output to the clock information analysis circuit 26, and in the conference mode (when the conference mode switch 45 is turned on), the control information is not analyzed by the clock information analysis circuit 26 but directly through the operation clock information adding means. Output to the transmission path.

The conference mode switch 45 is connected to the voice / clock information mixing circuit 43 and the clock information extraction circuit 44. In a mode setting where an order wire is normally used, a communication identification code is exchanged between stations, or In the mode setting for using the order wire in the conference mode, an instruction to change the communication identification code from the slave station to the request to the master station is output to the voice / clock information mixing circuit 43 and the clock information extraction circuit 44.

Now, the E1 byte according to the eighth embodiment will be described. FIG. 21 shows a data structure of the E1 byte according to the eighth embodiment.

As shown in FIG. 21, the E1 byte is composed of compressed audio information (for example, 2 bits) and control information (for example, 6 bits), and two or more bits in the control information are used as a communication identification code. Have been assigned.

Next, the operation will be described. In the circuit configuration shown in FIG. 20, the switching operation of the clock path is the same as that of the above-described seventh embodiment, and thus the description is omitted.

In the SDH network shown in FIG. 2, in the normal use state, the conference mode switch 45 is set to the normal mode.
Thus, a communication identification code having an instruction content for performing communication between stations is added to the control information. Thereby, S
In a DH network, order wires operate as usual.

[0210] When a conference is to be held between stations in the SDH network, the conference mode switch 45 is switched to the conference mode.
The slave station outputs an instruction to the clock information mixing circuit 43 to set a communication identification code indicating a request to the master station in the control information.

When the communication identification code is set in the control signal, the audio / clock information mixing circuit 43 mixes the control signal with the compressed audio information, and outputs the mixed information to the E1 byte insertion circuit 23. Is done. This mixed information is inserted into the E1 byte by the E1 byte insertion circuit 23 and then sent out to the transmission path.

When the next station is a slave station, and the slave station receives the mixed information, the control information detecting means 39
A or 39B determines the content of the communication identification code in the control information in the mixed information. In this case, since the request is from the slave station to the master station, the mixed information received from the preceding slave station is added with the operation clock information. It is sent directly to the transmission line by means 40A or 40B.

When the next station becomes the master station and the master station receives the mixed information, the control information detecting means 39A
Alternatively, the content of the communication identification code in the control information in the mixed information is determined by 39B. In this case, since the request is from the slave station to the master station, it is confirmed that the transmission is to its own station.

Therefore, the control information detecting means 39A or 3
In 9B, when the control information is detected from the received mixed information, the content of the communication identification code is changed from the master station to the request to the slave station, and the control information having the communication identification code is changed to the operation clock information adding means 40A or 40A. It is mixed with the audio information compressed by 40B and transmitted to the transmission path.

When the next station is a slave station, and the slave station receives the mixed information, the control information detecting means 39
A or 39B determines the content of the communication identification code in the control information in the mixed information.

In this case, since the request is from the master station to the slave station, the mixed information received from the preceding master station is separated from the audio information by the clock information extraction circuit 44 and then expanded by the audio expansion circuit 35. , And the control information is sent directly to the transmission line by the operation clock information adding means 40A or 40B without being analyzed by the clock information analysis circuit 26.

As described above, according to the eighth embodiment, E1
It is possible to realize a conference on an order wire by voice information transmitted simultaneously with a control signal using a byte.

Further, since control information is communicated using the E1 byte for the order wire, which should be unused except at the time of installation or construction, the F1 byte of the SOH is used for another purpose such as phase control. It can be used for

According to the eighth embodiment, as in the first embodiment, even when the main station 9 stops, the mobile station does not fall into the self-running state, and is dependent on the SDH network. , Stable information exchange is maintained.

Although the eighth embodiment is realized by the same means as that of the fifth embodiment, it may be realized by the same means as that of the fourth embodiment.

In the eighth embodiment, the E1 byte is used. However, the present invention is not limited to this.
The E2 byte may be used by means equivalent to.

[0222]

As described above, according to the present invention, in the SDH network, even when the main station is stopped, each station does not fall into a self-running state, and the slave stations other than the main station are connected. Since use of the supplied clock path results in a state of synchronization dependent on the SDH network, it is possible to obtain an SDH transmission system in which stable transmission and reception of information is maintained.

According to the next invention, in the SDH network,
Even when the master station stops, the own station does not fall into a free-running state. By selecting a clock path supplied to a slave station other than the master station as a clock operated by the own station, S
Since the state is synchronized in accordance with the DH network, an effect is obtained that an SDH transmission apparatus in which stable transmission and reception of information is held can be obtained.

According to the next invention, the control information is communicated using the E1 byte for the order wire which should be unused except at the time of installation or construction.
The SDH transmission device that can use the F1 byte of the OH for another purpose such as phase control is obtained.

According to the next invention, the PCM code of the sound pressure level frequently used in the order wire is used as the speech information of the order wire, and the PCM code corresponding to the sound pressure level which is not normally output in the order wire is controlled. Information, and both voice information and control information
By inserting and using the E1 byte in OH, SO
It is possible to use the F1 byte in H for another purpose such as phase control, and to obtain an SDH transmission device capable of exchanging control information between stations even during construction or installation. To play.

According to the following invention, E1 not normally used
Since the control information is exchanged by using the byte periodically, the F1 byte in the SOH can be used for another purpose such as phase control, and the audio level is not limited. In addition, an SDH transmission device capable of transmitting information such as a machine voice in the E1 byte can be obtained.

According to the next invention, since the amount of control information per byte increases, control information can be transmitted and received between stations at high speed, whereby control information for clock path control can be obtained. In other applications, an SDH transmission apparatus capable of exchanging a large amount of control information is obtained.

According to the next invention, when control information (information unique to the inter-device) cannot be transmitted by the SOH in the ring-type SDH network including the SDH transmission device that terminates the VC path simultaneously with the section. Even
Since the control information can be transmitted on the POH,
Even if the master station stops, it will not fall into a self-propelled state,
Since the synchronous state follows the SDH network, an SDH transmission device that can stably transmit and receive information is obtained.

According to the next invention, even if each station changes the clock path for maintenance or the like, all the stations follow the clock path selected by the master station. Since any station does not fall out of synchronization with the entire SDH network and maintains a state dependent on the SDH network, there is an effect that an SDH transmission device capable of transmitting and receiving information stably in the SDH network is obtained. .

According to the next invention, it is possible to obtain an SDH transmission device capable of realizing a conference on an order wire by voice information transmitted simultaneously with a control signal using the E1 byte.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an SDH transmission apparatus according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing an SDH transmission system according to Embodiment 1 of the present invention.

FIG. 3 is a diagram showing an example of an SDH frame format according to the first embodiment.

FIG. 4 is a diagram showing a configuration of an F1 byte according to the first embodiment.

FIG. 5 is a block diagram showing a main part of an SDH transmission apparatus according to a second embodiment of the present invention.

FIG. 6 is a block diagram showing a main part of an SDH transmission device according to a second embodiment of the present invention.

FIG. 7 is a block diagram showing another main part of the SDH transmission apparatus according to Embodiment 2 of the present invention.

FIG. 8 shows a PCM level comparison circuit 2 according to a third embodiment.
8 is a diagram illustrating a comparison method of FIG.

FIG. 9 is a block diagram showing a main part of an SDH transmission apparatus according to Embodiment 4 of the present invention.

FIG. 10 is a block diagram showing another main part of the SDH transmission apparatus according to Embodiment 4 of the present invention.

FIG. 11 is a diagram showing a configuration example of a synchronization pattern according to a fourth embodiment.

FIG. 12 is a diagram for explaining an insertion position of a synchronization pattern according to the fourth embodiment.

FIG. 13 is a diagram for explaining a position where a synchronization pattern is inserted according to a modification of the fourth embodiment.

FIG. 14 is a block diagram showing a main part of an SDH transmission apparatus according to Embodiment 5 of the present invention.

FIG. 15 shows a data structure of an E1 byte according to the fifth embodiment.

FIG. 16 is a block diagram showing another main part of the SDH transmission apparatus according to Embodiment 5 of the present invention.

FIG. 17 is a block diagram showing a main part of an SDH transmission apparatus according to Embodiment 6 of the present invention.

FIG. 18 is a block diagram showing an SDH transmission apparatus according to Embodiment 7 of the present invention.

FIG. 19 is a diagram showing a format example of control information according to the seventh embodiment.

FIG. 20 is a block diagram showing a main part of an SDH transmission apparatus according to Embodiment 8 of the present invention.

FIG. 21 shows a data structure of an E1 byte according to the eighth embodiment.

FIG. 22 is a configuration diagram showing a conventional SDH transmission system.

[Explanation of symbols]

2A, 2B clock supply means, 5A, 5B control information detection means, 6 clock state comparison means, 7 clock selection means, 8A, 8B operation clock information addition means, 9
Main station, 10, 11 upper station, 12 lower station, 18 control information, 19A, 19B order wire interface, 20 switch, 21 clock information generation circuit, 22 input side audio / clock information switching circuit, 23
E1 byte insertion circuit, 24 E1 byte extraction circuit, 25
Input side audio / clock information switching circuit, 26 clock information analysis circuit, 27 clock information / audio information mixing circuit, 28 PCM level comparison circuit, 29 synchronization counter, 30 synchronization pattern insertion circuit, 31 synchronization pattern detection circuit, 32 audio compression circuit , 33 voice / clock information mixing circuit, 34 clock information extraction circuit, 35 voice expansion circuit, 36 VC position indicating switch, 37 F2
Byte insertion circuit, 38 F2 byte extraction circuit, 39A,
39B control information detecting means, 40A, 40B operating clock information adding means, 41 control means, 42 communication identification code, 43 voice / clock information mixing circuit, 44 clock information extracting circuit, 45 conference mode switch.

Claims (9)

[Claims] 1. An SDH transmission system for forming an SDH network by connecting a master station and a plurality of slave stations in a ring by a transmission path, generating a clock path in the SDH network and transmitting information, First clock supply means for supplying a clock to a station; second clock supply means for supplying a clock different from the clock supplied by the first supply means to a specific slave station of the plurality of slave stations; First synchronizing means for forming a clockwise or counterclockwise clock path of the SDH network starting from the master station in accordance with a clock supplied by the first clock supplying means to synchronize the SDH network; 1 If the clock path by the synchronization means is not normal, the specific slave station is started toward the master station according to the clock supplied by the second clock supply means. The S form clockwise and counterclockwise both clock path
And a second synchronizing means for synchronizing the DH network. 2. An SDH transmission apparatus applied to the SDH transmission system according to claim 1, wherein when transmitting information to a next station through a transmission line, information of a clock operated by the own station is transmitted. Adding means for adding as control information, detecting means for detecting control information added by the adding means of the preceding station from the information when information is received from a preceding station via a transmission line, Comparing means for comparing clockwise or counterclockwise clocks of the SDH network by the first synchronization means based on the detected control information; and clockwise and counterclockwise clocks in the SDH network by the comparing means. Selecting means for selecting a clock by the second synchronizing means as a clock operated by the own station when a comparison result that an abnormality has occurred in any clock path is obtained; SDH transmission apparatus characterized by comprising a. 3. The adding means inserts the control information into the position of the E1 byte of the SOH for inserting voice information when the order wire is not used or when the order wire is used, and the detecting means uses the order wire not used. Sometimes,
The SDH transmission apparatus according to claim 2, wherein the control information is detected from a position of the E1 byte. 4. The transmitting device according to claim 1, wherein, when transmitting the control information, the control information sets the control information at a sound pressure of a PCM code equal to or higher than a predetermined value higher than the voice information, and then inserts the voice information when using an order wire. The information is inserted into the position of the E1 byte of the SOH, and the information is detected as control information when information equal to or greater than a certain value is extracted from the position of the E1 byte by the sound pressure of the PCM code. 3. The SDH transmission apparatus according to claim 2, wherein when information equal to or less than the value is extracted, the information is detected as voice information. 5. The adding means inserts the control information into an E1 byte of an SOH for inserting voice information when using an order wire by using a predetermined frame in a fixed SDH frame cycle, and 3. The control device according to claim 2, wherein the control unit detects the control information from the position of the E1 byte at the timing of the predetermined frame.
DH transmission device. 6. When the control information is transmitted when using an order wire, the adding means compresses audio information,
S for mixing the compressed audio information and the control information and then inserting the audio information when using the order wire
OH is inserted into the position of the E1 byte, and the detecting unit separates the information of the position of the E1 byte into the compressed audio information and the control information, and after the separation, expands the compressed audio information. 3. The SDH transmission device according to claim 2, wherein: 7. The adding means inserts the control information at an arbitrary F2 byte position in a virtual container path, and the detecting means detects the control information from an arbitrary position of the F2 byte. The SDH transmission device according to claim 2, wherein: 8. An adding means for adding information of a clock operated by the own station as control information when transmitting information to a next station through a transmission path, and when adding control information by said adding means. Control means for arbitrarily allocating at least information indicating a bridge-through in the control information; and control added by the adding means of the preceding station from the information when the information is received from a preceding station via a transmission line. Detecting means for detecting information and determining whether or not the information indicating the bridge through is assigned; and detecting the information by the detecting means when a result of determination that the information is not assigned is obtained by the detecting means. Comparison means for comparing clockwise or counterclockwise clocks of the SDH network by the first synchronization means based on the control information obtained by the first synchronization means; The received control information is sent directly to the next station only when the result of the determination has been obtained that the signal has been allocated, while when the result of the determination that the signal has not been allocated is obtained by the detecting means. If the comparison unit obtains a comparison result indicating that an abnormality has occurred in either the clockwise clockwise or counterclockwise clock path in the SDH network, the clock by the second synchronization unit is operated by the own station. An SDH transmission device comprising: a selection unit that selects a clock. 9. The method according to claim 8, wherein the adding unit compresses the audio information when transmitting the control information when using the order wire.
S for mixing the compressed audio information and the control information and then inserting the audio information when using the order wire
OH is inserted at the position of the E1 byte, and the detecting unit separates the information of the position of the E1 byte into the compressed audio information and the control information, and after the separation, expands the compressed audio information. The SDH transmission device according to claim 8, wherein: