JP3104490B2 - Dependent synchronization control method for dual loop LAN - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the dependent synchronization control of a dual loop path LAN (hereinafter referred to as a dual loop LAN) in which a plurality of node devices are connected in a ring by two bidirectional communication lines. About the method.

[0002]

2. Description of the Related Art FIG. 6 shows a configuration of a conventional node device of a synchronous control system of a duplex loop LAN. Next, the operation of the above conventional example will be described.

In FIG. 6, reference numeral 10 denotes a right system loop, and reference numeral 20 denotes a left system loop. In each node, data receivers 11 and 21 for receiving data on respective loop routes are data transmitters 14 and 24 for transmitting data. Is connected.
The data multiplexing / demultiplexing units 32 and 42 demultiplex data from signals on the transmission path, and the data multiplexing units 33 and 43 are functional units for multiplexing data constituting a frame to be transmitted on the transmission path. The clock receiving units 15 and 25 receive the clocks e and f on the transmission lines of the right system loop and the left system loop, respectively, and use them as data determination clocks in the data demultiplexing units 32 and 42.

[0006] The clock switching units 16 and 26 send either the output clock e extracted from the clock receiving unit 15 or the output clock f extracted from the clock receiving unit 25 to the instruction of the monitoring control unit 3. Select by
PLO (Phase Loc) for Regenerating Transmission Line Clock
k Oscillator) circuit 17 and 27 as a reference clock source. The output clock g of the PLO circuit 17 is sent to the data multiplexing circuit 33 and the clock transmission unit 18, and the output clock h of the PLO circuit 27 is sent to the data multiplexing circuit 43 and the clock transmission unit 28. At this time, the route of the add / drop for extracting and processing the user data is switched by the data correspondence interface unit 2 in a loop form. The data-corresponding interface unit 2 performs a through process for transmitting other data as it is, and a loopback process for transmitting the data by returning to the receiving side.

The states of the reception clocks of the right system loop 10 and the left system loop 20 are determined by detecting the frame cycle deviation detectors 31 and 41.
And the monitor control unit 3 is notified when a frame pattern is not detected, and the monitor control unit 3 instructs the clock switching units 16 and 26 to select the reference clock of the PLO circuit as the clock e or f. . Therefore, when the signal synchronization or the data error occurs frequently and the frame synchronization is lost, the control for switching the loop path of the dependent synchronization is performed.

[0006]

However, such a conventional dependent synchronization control method has the following problems.

[0007] The received clock is PLO from the operation loop path.
In the method using the transmission line clock recovery, when the synchronization abnormality or the frequency abnormality occurs in the PLO of the upstream node, at the time of recovery from a failure, or at the time of recovery from a failure, the loop path is set from the loopback state at the time of adding or removing the node. If the synchronization state is unstable when changing, it will also affect the synchronization state of the PLO circuit of the downstream node that is subordinately synchronized, and will be momentarily interrupted when the loop form is switched or the clock synchronization state is disturbed for a long time. The period becomes long or frame synchronization is lost frequently during that period, and the clock switching operation becomes unstable. For this purpose, measures such as providing a long protection period in the clock switching operation must be taken. In addition, such a protection period is set to a long time in consideration of the maximum number of subordinate nodes.

[0008] In order to solve the above-mentioned conventional problem, an invention according to claim 1 is an apparatus according to claim 1, wherein a slave node of a redundant loop LAN selects a stable loop path when selecting a stable loop path.
Maintenance and monitoring information between LAN node devices (overhead
SDH (Synchronous Digital Hierarchy)
The purpose of the present invention is to apply the method and to perform dependent synchronization control.

[0009]

[0010]

In order to achieve the above-mentioned object, a function of monitoring the state of a transmission / reception clock in a node device and separating the state into frames on a transmission path as information.
By providing a function of inserting / relaying and a function of selecting / switching a duplicated clock, there is provided a means for performing dependent synchronization control of a duplicated loop LAN,
Applied to the redundant loop LAN,
Overhead data generation function and data receiver
Head information termination function, transmission / reception clock of node device
A function to monitor the status is provided so that the clock
Means for allocating state monitoring information to overhead information and performing dependent synchronization control.

[0011]

[0012]

Therefore, according to the first aspect of the present invention, the function of monitoring the transmission / reception clock state of each loop is provided in the node device, and is used as a criterion for selecting a dependent synchronization destination loop. By providing the function of separating / inserting / relaying the status into the frame on the transmission line as the information and the function of selecting / switching the duplicated clock, it notifies the downstream node of the clock monitoring status of the upstream node and selects the subordinate synchronization. -It has the effect that switching can be performed promptly, and the data transmission unit of the node device
DH overhead information generation function, data receiving unit
A function to terminate overhead information is provided.
The clock status information area is assigned to a part of the
The data demultiplexing function of SDH and SD
This has the effect that the multiplexing function of H can be used .

[0013]

[0014]

FIG. 1 shows an embodiment of the present invention. The details will be described below.

FIG. 1 is a schematic diagram of a configuration of a frame data transmission / reception system of a node device according to an embodiment of the present invention . In FIG. 1, reference numeral 10 denotes a right loop, and 20 denotes a left loop. In each node, data receivers 11 and 21 and data transmitters 14 and 24 are connected to respective loop paths. The data demultiplexing units 12 and 22 demultiplex the data from the signal on the transmission path, and the data demultiplexing units 13 and 23
Is a functional unit for multiplexing data constituting a frame to be transmitted on a transmission path. Clock receiving circuits 15 and 25
Receives the clocks on the transmission lines of the right system loop and the left system loop, respectively, and uses them as clocks for data discrimination in the data demultiplexing units 12 and 22.

The clock switching units 16 and 26 select either the output clock a extracted from the clock reception unit 15 or the output clock b extracted from the clock reception unit 25 in accordance with an instruction from the monitoring control unit 1. , As a reference clock source to PLO circuits 17 and 27 for reproducing the transmission line clock. The output clock c of the PLO circuit 17 is sent to the data multiplexing circuit 13 and the clock transmission unit 18, respectively. The exchange data is sent from the data interface unit 2 to the data multiplexing unit 13 and multiplexed including the clock state information sent by the clock monitoring unit 19 and other monitoring information and control information.

Similarly, the output clock d of the PLO circuit 27
Are sent to the data multiplexing circuit 23 and the clock transmitting unit 28, respectively. The exchange data is sent from the data interface unit 2 to the data multiplexing unit 13 and multiplexed including the clock state information sent by the clock monitoring unit 19 and other monitoring information and control information. The multiplexed frame data is transmitted from the data transmitters 14 and 24 to the right and left transmission lines in synchronization with the output clocks from the clock transmission units 18 and 28, respectively.

At this time, the clock status information indicates the clock status of the clock transmitting units 18 and 28, the clock receiving units 15 and 25, and the PLO circuits 17 and 27 by the clock monitoring units 19 and 2.
9 respectively monitor and monitor the clock state information
Send to When the clock switching units 16 and 26 switch / select the right system reception clock a and the left system reception clock b, the contents of the clock state information shown in Table 1 are notified to the clock monitoring unit. That is, when the logical value to be notified is "0", it is normal, and when the logical value is "1", the failure detection and the logical sum of the notification result of the adjacent node are taken.

[0019]

[Table 1]

According to the contents of the clock state signal shown in Table 1,
As shown in Table 2, a loop path is selected corresponding to each of the state numbers 1 to 4.

[0021]

[Table 2]

In the state number 4 in Table 2, the term "right system or self-running" refers to a loopback point node in an isolated loop so that communication in the isolated loop can be secured when an isolated loop is formed. Shows a case where one of the vehicles runs by itself.

FIG. 2 shows an outline of the in-node processing of the clock status information of one system. The clock state information is extracted from the clock state information area 37 of the received frame RF, and the extracted information is summed as it is with the clock state information of the own node, and multiplexed in the clock state information area 38 of the transmission frame TF. Become Further, the extracted clock state information is sent to a clock monitoring unit 36 that monitors the clock state of its own node after the information protection function unit 34 performs an information protection function. In the clock switching control unit 35, dependent synchronization control is performed at each node as shown in Table 2 by the state logic of the clock monitoring unit 36 of each system of the duplex loop.

The node which has detected an abnormality or failure in the clock state generates abnormality information relating to the synchronization control and sends it to a node downstream of the loop path. In addition, when the state is restored to normal, the generated node returns the clock state information to normal. Other nodes relay the information. The master clock node generates normal information and does not relay information received from the loop path.

FIG. 3 is a system configuration diagram of a duplicated loop LAN synchronized with an external network according to the present embodiment. One master node MN and five sub-nodes (slave nodes) SN1 to SN5 are connected to the right loop 10 and the right loop 10. Connected with left loop. In FIG. 3, 60 is a master node,
61 to 65 are subnodes, and 67 is an external network. In this figure, the loop indicated by a thick line indicates a loop in a synchronized state.

The master node 60 receives a clock from the external network 67 and sends out a LAN synchronous clock to the right loop 10 and the left loop node 20. Now, a failure m occurs between the node 61 and the node 62, and the node is in a loopback state. The failure detection nodes in the clock state are 61 and 62, and the node 61 sends "1" to the left transmission line as an abnormal clock state. The node 62 sends “1” to the transmission line of the right system as an abnormal clock state. The other downstream nodes relay the clock status information, and the master node 60 deletes the clock status information without relaying it. Finally, as shown in FIG. 2, the clock status information at each node is transmitted to each node to form a subordinate synchronization mode.

Next , FIG. 4 shows a functional configuration diagram of the present invention.
FIG. 5 shows a structure of overhead information of the STM-N SDH frame configuration. The SDH frame configuration shown in FIG. 5 is defined by the international standard (CCITT),
There is an OH and a payload section for user data. Although the overhead information SOH is standardized, there are some undefined bytes and some unique specifications. By allocating the clock state information of the node devices, the transfer of the clock state information between the node devices is performed between the node devices. Thus, it can be realized by the configuration shown in FIG.

In FIG. 4, the SOH demultiplexer 51 extracts section overhead information, extracts clock state information from the area allocated by the clock state information separator 54 from the information, and sends it to the clock state monitor controller 55. I do. Reference numeral 55 denotes the result of the clock state information received from the upstream node and the result of the clock state monitored by the own node. If both are normal, it is normal, otherwise, it is abnormal. The information is stored in the clock state information insertion unit 56.
Then, the SOH multiplexing unit 53 multiplexes the user data and the information data transmitted from the data demultiplexing unit 52 so as to allocate the data to the clock state information area. In this case, S
Since the data is transmitted to the transmission line in the DH frame configuration, the transmission line clock has a transmission speed conforming to the SDH.

[0029]

According to the present invention, as is apparent from the above embodiment , the overhead section in the SDH frame configuration
In the SOH and the payload section for user data,
Undefined bytes and some unique specifications
By allocating clock state information, node devices
Clock state information transfer between
For SDH-compliant optical interfaces and clock circuits
Circuit around the SDH can be used, miniaturizing the circuit,
This has the effect of cost reduction and the advancement of maintenance alarm information .

[0030]

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a frame data transmission / reception system of a node device according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of processing in one node of clock status information of one system in the embodiment;

FIG. 3 is a diagram showing a duplex loop L synchronized with an external network according to the embodiment;
AN system configuration diagram

FIG. 4 is a functional configuration diagram of the present invention.

FIG. 5 is a frame configuration diagram of SDH.

FIG. 6 is a configuration diagram of a conventional node device of a synchronous control system of a redundant loop LAN.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Monitoring control part 2 Data correspondence interface part 10 Right system loop 11 Data receiver 12 Data demultiplexing part 13 Data multiplexing part 14 Data transmitter 15 Clock receiving part 16 Clock switching part 17 PLO part 18 Clock receiving part 19 Clock monitoring part Reference Signs List 20 left system loop 21 data receiver 22 data demultiplexing unit 23 data multiplexing unit 24 data transmitter 25 clock receiving unit 26 clock switching unit 27 PLO unit 28 clock receiving unit 29 clock monitoring unit 3 monitoring control unit 31 frame loss detection Unit 32 data demultiplexing unit 33 data multiplexing unit 41 out-of-synchronization detection unit 42 data demultiplexing unit 43 data multiplexing unit 34 information protection function unit 35 clock switching control unit 36 clock monitoring unit 37 reception frame clock status signal area 38 transmission Frame clock status area 51 SOH demultiplexing unit 52 Data demultiplexing unit 53 SOH multiplexing unit 54 Clock status information demultiplexing unit 55 Clock status monitoring control unit 56 Clock status information inserting unit 60 Master node 61 to 65 Slave node 67 External network interface unit

Claims (1)

(57) [Claims] 1. A dual-loop path LAN in which a node device including a master node and a plurality of slave nodes is connected in a loop by two optical fiber communication lines, wherein the slave node supplies a master clock. Means for synchronizing with the clock signal of the master node, means for receiving and reproducing the transmission path clock, means for transmitting the transmission path clock, means for selecting and switching control of the reception clock from the duplicated loop path, Means for multiplexing information on the synchronization state in a transmission frame for monitoring the synchronization state, wherein the transmission method between the node devices is SD.
H (Synchronous Digital Hie)
end the section between each node
And a frame SOH (SectionOv).
erHead) Allocates synchronization status information to a specific area
Means for receiving, generating and relaying synchronization information to each node
Wherein each node selects and determines a loop path, and switches the loop path of the subordinate synchronization.